add uart
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17 changed files
with
3082 additions
and
39 deletions
1 | [PreviousGenFiles] | 1 | [PreviousGenFiles] |
2 | AdvancedFolderStructure=true | 2 | AdvancedFolderStructure=true |
3 | HeaderFileListSize=6 | 3 | HeaderFileListSize=7 |
4 | HeaderFiles#0=F:/IoT/STM32/workspace/STM32Test/Core/Inc/gpio.h | 4 | HeaderFiles#0=F:/IoT/STM32/workspace/STM32Test/Core/Inc/gpio.h |
5 | HeaderFiles#1=F:/IoT/STM32/workspace/STM32Test/Core/Inc/FreeRTOSConfig.h | 5 | HeaderFiles#1=F:/IoT/STM32/workspace/STM32Test/Core/Inc/FreeRTOSConfig.h |
6 | HeaderFiles#2=F:/IoT/STM32/workspace/STM32Test/Core/Inc/sys.h | 6 | HeaderFiles#2=F:/IoT/STM32/workspace/STM32Test/Core/Inc/sys.h |
7 | HeaderFolderListSize=1 | 7 | HeaderFolderListSize=1 |
8 | HeaderPath#0=F:/IoT/STM32/workspace/STM32Test/Core/Inc | 8 | HeaderPath#0=F:/IoT/STM32/workspace/STM32Test/Core/Inc |
9 | SourceFileListSize=7 | 9 | SourceFileListSize=8 |
10 | SourceFiles#0=F:/IoT/STM32/workspace/STM32Test/Core/Src/gpio.c | 10 | SourceFiles#0=F:/IoT/STM32/workspace/STM32Test/Core/Src/gpio.c |
11 | SourceFiles#1=F:/IoT/STM32/workspace/STM32Test/Core/Src/freertos.c | 11 | SourceFiles#1=F:/IoT/STM32/workspace/STM32Test/Core/Src/freertos.c |
12 | SourceFiles#2=F:/IoT/STM32/workspace/STM32Test/Core/Src/sys.c | 12 | SourceFiles#2=F:/IoT/STM32/workspace/STM32Test/Core/Src/sys.c |
13 | SourceFolderListSize=1 | 13 | SourceFolderListSize=1 |
14 | SourcePath#0=F:/IoT/STM32/workspace/STM32Test/Core/Src | 14 | SourcePath#0=F:/IoT/STM32/workspace/STM32Test/Core/Src |
15 | HeaderFiles#3=F:/IoT/STM32/workspace/STM32Test/Core/Inc/stm32f0xx_it.h | 15 | HeaderFiles#3=F:/IoT/STM32/workspace/STM32Test/Core/Inc/usart.h |
16 | HeaderFiles#4=F:/IoT/STM32/workspace/STM32Test/Core/Inc/stm32f0xx_hal_conf.h | 16 | HeaderFiles#4=F:/IoT/STM32/workspace/STM32Test/Core/Inc/stm32f0xx_it.h |
17 | HeaderFiles#5=F:/IoT/STM32/workspace/STM32Test/Core/Inc/main.h | 17 | HeaderFiles#5=F:/IoT/STM32/workspace/STM32Test/Core/Inc/stm32f0xx_hal_conf.h |
18 | SourceFiles#3=F:/IoT/STM32/workspace/STM32Test/Core/Src/stm32f0xx_hal_timebase_tim.c | 18 | SourceFiles#3=F:/IoT/STM32/workspace/STM32Test/Core/Src/stm32f0xx_hal_timebase_tim.c |
19 | SourceFiles#4=F:/IoT/STM32/workspace/STM32Test/Core/Src/stm32f0xx_it.c | 19 | SourceFiles#4=F:/IoT/STM32/workspace/STM32Test/Core/Src/usart.c |
20 | SourceFiles#5=F:/IoT/STM32/workspace/STM32Test/Core/Src/stm32f0xx_hal_msp.c | 20 | SourceFiles#5=F:/IoT/STM32/workspace/STM32Test/Core/Src/stm32f0xx_it.c |
21 | SourceFiles#6=F:/IoT/STM32/workspace/STM32Test/Core/Src/main.c | 21 | SourceFiles#6=F:/IoT/STM32/workspace/STM32Test/Core/Src/stm32f0xx_hal_msp.c |
22 | HeaderFiles=; | 22 | HeaderFiles#6=F:/IoT/STM32/workspace/STM32Test/Core/Inc/main.h |
23 | SourceFiles=; | 23 | SourceFiles#7=F:/IoT/STM32/workspace/STM32Test/Core/Src/main.c |
24 | 24 | ||
25 | [PreviousLibFiles] | 25 | [PreviousLibFiles] |
26 | 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| 26 | LibFiles=Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h;Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_uart.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_uart_ex.h;Middlewares/Third_Party/FreeRTOS/Source/include/croutine.h;Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h;Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h;Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h;Middlewares/Third_Party/FreeRTOS/Source/include/list.h;Middlewares/Third_Party/FreeRTOS/Source/include/message_buffer.h;Middlewares/Third_Party/FreeRTOS/Source/include/mpu_prototypes.h;Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h;Middlewares/Third_Party/FreeRTOS/Source/include/portable.h;Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h;Middlewares/Third_Party/FreeRTOS/Source/include/queue.h;Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h;Middlewares/Third_Party/FreeRTOS/Source/include/stack_macros.h;Middlewares/Third_Party/FreeRTOS/Source/include/StackMacros.h;Middlewares/Third_Party/FreeRTOS/Source/include/stream_buffer.h;Middlewares/Third_Party/FreeRTOS/Source/include/task.h;Middlewares/Third_Party/FreeRTOS/Source/include/timers.h;Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.h;Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os.h;Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM0/portmacro.h;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_uart.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_uart_ex.c;Middlewares/Third_Party/FreeRTOS/Source/croutine.c;Middlewares/Third_Party/FreeRTOS/Source/event_groups.c;Middlewares/Third_Party/FreeRTOS/Source/list.c;Middlewares/Third_Party/FreeRTOS/Source/queue.c;Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c;Middlewares/Third_Party/FreeRTOS/Source/tasks.c;Middlewares/Third_Party/FreeRTOS/Source/timers.c;Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.c;Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c;Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM0/port.c;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h;Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_uart.h;Drivers/STM32F0xx_HAL_Driver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|
27 | 27 | ||
28 | [PreviousUsedCubeIDEFiles] | 28 | [PreviousUsedCubeIDEFiles] |
29 | SourceFiles=Core\Src\main.c;Core\Src\gpio.c;Core\Src\freertos.c;Core\Src\sys.c;Core\Src\stm32f0xx_hal_timebase_tim.c;Core\Src\stm32f0xx_it.c;Core\Src\stm32f0xx_hal_msp.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c;Middlewares/Third_Party/FreeRTOS/Source/croutine.c;Middlewares/Third_Party/FreeRTOS/Source/event_groups.c;Middlewares/Third_Party/FreeRTOS/Source/list.c;Middlewares/Third_Party/FreeRTOS/Source/queue.c;Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c;Middlewares/Third_Party/FreeRTOS/Source/tasks.c;Middlewares/Third_Party/FreeRTOS/Source/timers.c;Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.c;Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c;Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM0/port.c;Core\Src/system_stm32f0xx.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c;Middlewares/Third_Party/FreeRTOS/Source/croutine.c;Middlewares/Third_Party/FreeRTOS/Source/event_groups.c;Middlewares/Third_Party/FreeRTOS/Source/list.c;Middlewares/Third_Party/FreeRTOS/Source/queue.c;Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c;Middlewares/Third_Party/FreeRTOS/Source/tasks.c;Middlewares/Third_Party/FreeRTOS/Source/timers.c;Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.c;Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c;Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM0/port.c;Core\Src/system_stm32f0xx.c;Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/system_stm32f0xx.c;;Middlewares/Third_Party/FreeRTOS/Source/croutine.c;Middlewares/Third_Party/FreeRTOS/Source/event_groups.c;Middlewares/Third_Party/FreeRTOS/Source/list.c;Middlewares/Third_Party/FreeRTOS/Source/queue.c;Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c;Middlewares/Third_Party/FreeRTOS/Source/tasks.c;Middlewares/Third_Party/FreeRTOS/Source/timers.c;Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.c;Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c;Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM0/port.c; | 29 | SourceFiles=Core\Src\main.c;Core\Src\gpio.c;Core\Src\freertos.c;Core\Src\sys.c;Core\Src\stm32f0xx_hal_timebase_tim.c;Core\Src\usart.c;Core\Src\stm32f0xx_it.c;Core\Src\stm32f0xx_hal_msp.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_uart.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_uart_ex.c;Middlewares/Third_Party/FreeRTOS/Source/croutine.c;Middlewares/Third_Party/FreeRTOS/Source/event_groups.c;Middlewares/Third_Party/FreeRTOS/Source/list.c;Middlewares/Third_Party/FreeRTOS/Source/queue.c;Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c;Middlewares/Third_Party/FreeRTOS/Source/tasks.c;Middlewares/Third_Party/FreeRTOS/Source/timers.c;Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.c;Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c;Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM0/port.c;Core\Src/system_stm32f0xx.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_uart.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_uart_ex.c;Middlewares/Third_Party/FreeRTOS/Source/croutine.c;Middlewares/Third_Party/FreeRTOS/Source/event_groups.c;Middlewares/Third_Party/FreeRTOS/Source/list.c;Middlewares/Third_Party/FreeRTOS/Source/queue.c;Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c;Middlewares/Third_Party/FreeRTOS/Source/tasks.c;Middlewares/Third_Party/FreeRTOS/Source/timers.c;Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.c;Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c;Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM0/port.c;Core\Src/system_stm32f0xx.c;Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/system_stm32f0xx.c;;Middlewares/Third_Party/FreeRTOS/Source/croutine.c;Middlewares/Third_Party/FreeRTOS/Source/event_groups.c;Middlewares/Third_Party/FreeRTOS/Source/list.c;Middlewares/Third_Party/FreeRTOS/Source/queue.c;Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c;Middlewares/Third_Party/FreeRTOS/Source/tasks.c;Middlewares/Third_Party/FreeRTOS/Source/timers.c;Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.c;Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c;Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM0/port.c; |
30 | HeaderPath=Drivers\STM32F0xx_HAL_Driver\Inc;Drivers\STM32F0xx_HAL_Driver\Inc\Legacy;Middlewares\Third_Party\FreeRTOS\Source\include;Middlewares\Third_Party\FreeRTOS\Source\CMSIS_RTOS_V2;Middlewares\Third_Party\FreeRTOS\Source\portable\GCC\ARM_CM0;Drivers\CMSIS\Device\ST\STM32F0xx\Include;Drivers\CMSIS\Include;Core\Inc; | 30 | HeaderPath=Drivers\STM32F0xx_HAL_Driver\Inc;Drivers\STM32F0xx_HAL_Driver\Inc\Legacy;Middlewares\Third_Party\FreeRTOS\Source\include;Middlewares\Third_Party\FreeRTOS\Source\CMSIS_RTOS_V2;Middlewares\Third_Party\FreeRTOS\Source\portable\GCC\ARM_CM0;Drivers\CMSIS\Device\ST\STM32F0xx\Include;Drivers\CMSIS\Include;Core\Inc; |
31 | CDefines=USE_HAL_DRIVER;STM32F030x8;USE_HAL_DRIVER;USE_HAL_DRIVER; | 31 | CDefines=USE_HAL_DRIVER;STM32F030x8;USE_HAL_DRIVER;USE_HAL_DRIVER; |
32 | 32 | ... | ... |
... | @@ -6,7 +6,7 @@ | ... | @@ -6,7 +6,7 @@ |
6 | <provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/> | 6 | <provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/> |
7 | <provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/> | 7 | <provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/> |
8 | <provider copy-of="extension" id="org.eclipse.cdt.managedbuilder.core.GCCBuildCommandParser"/> | 8 | <provider copy-of="extension" id="org.eclipse.cdt.managedbuilder.core.GCCBuildCommandParser"/> |
9 | <provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="175442219548387224" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true"> | 9 | <provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="-1285976871464041894" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true"> |
10 | <language-scope id="org.eclipse.cdt.core.gcc"/> | 10 | <language-scope id="org.eclipse.cdt.core.gcc"/> |
11 | <language-scope id="org.eclipse.cdt.core.g++"/> | 11 | <language-scope id="org.eclipse.cdt.core.g++"/> |
12 | </provider> | 12 | </provider> |
... | @@ -18,7 +18,7 @@ | ... | @@ -18,7 +18,7 @@ |
18 | <provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/> | 18 | <provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/> |
19 | <provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/> | 19 | <provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/> |
20 | <provider copy-of="extension" id="org.eclipse.cdt.managedbuilder.core.GCCBuildCommandParser"/> | 20 | <provider copy-of="extension" id="org.eclipse.cdt.managedbuilder.core.GCCBuildCommandParser"/> |
21 | <provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="175442219548387224" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true"> | 21 | <provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="-1285976871464041894" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true"> |
22 | <language-scope id="org.eclipse.cdt.core.gcc"/> | 22 | <language-scope id="org.eclipse.cdt.core.gcc"/> |
23 | <language-scope id="org.eclipse.cdt.core.g++"/> | 23 | <language-scope id="org.eclipse.cdt.core.g++"/> |
24 | </provider> | 24 | </provider> | ... | ... |
... | @@ -59,8 +59,8 @@ | ... | @@ -59,8 +59,8 @@ |
59 | #define configCPU_CLOCK_HZ ( SystemCoreClock ) | 59 | #define configCPU_CLOCK_HZ ( SystemCoreClock ) |
60 | #define configTICK_RATE_HZ ((TickType_t)1000) | 60 | #define configTICK_RATE_HZ ((TickType_t)1000) |
61 | #define configMAX_PRIORITIES ( 56 ) | 61 | #define configMAX_PRIORITIES ( 56 ) |
62 | #define configMINIMAL_STACK_SIZE ((uint16_t)128) | 62 | #define configMINIMAL_STACK_SIZE ((uint16_t)64) |
63 | #define configTOTAL_HEAP_SIZE ((size_t)3072) | 63 | #define configTOTAL_HEAP_SIZE ((size_t)2560) |
64 | #define configMAX_TASK_NAME_LEN ( 16 ) | 64 | #define configMAX_TASK_NAME_LEN ( 16 ) |
65 | #define configUSE_TRACE_FACILITY 1 | 65 | #define configUSE_TRACE_FACILITY 1 |
66 | #define configUSE_16_BIT_TICKS 0 | 66 | #define configUSE_16_BIT_TICKS 0 | ... | ... |
... | @@ -32,9 +32,11 @@ extern "C" { | ... | @@ -32,9 +32,11 @@ extern "C" { |
32 | 32 | ||
33 | /* Private includes ----------------------------------------------------------*/ | 33 | /* Private includes ----------------------------------------------------------*/ |
34 | /* USER CODE BEGIN Includes */ | 34 | /* USER CODE BEGIN Includes */ |
35 | #include <stdio.h> | ||
35 | #include "led.h" | 36 | #include "led.h" |
36 | #include "beep.h" | 37 | #include "beep.h" |
37 | #include "key.h" | 38 | #include "key.h" |
39 | #include "usart.h" | ||
38 | /* USER CODE END Includes */ | 40 | /* USER CODE END Includes */ |
39 | 41 | ||
40 | /* Exported types ------------------------------------------------------------*/ | 42 | /* Exported types ------------------------------------------------------------*/ |
... | @@ -60,6 +62,10 @@ void Error_Handler(void); | ... | @@ -60,6 +62,10 @@ void Error_Handler(void); |
60 | /* USER CODE END EFP */ | 62 | /* USER CODE END EFP */ |
61 | 63 | ||
62 | /* Private defines -----------------------------------------------------------*/ | 64 | /* Private defines -----------------------------------------------------------*/ |
65 | #define DEBUG_TX_Pin GPIO_PIN_9 | ||
66 | #define DEBUG_TX_GPIO_Port GPIOA | ||
67 | #define DEBUG_RX_Pin GPIO_PIN_10 | ||
68 | #define DEBUG_RX_GPIO_Port GPIOA | ||
63 | #define BEEP_Pin GPIO_PIN_12 | 69 | #define BEEP_Pin GPIO_PIN_12 |
64 | #define BEEP_GPIO_Port GPIOA | 70 | #define BEEP_GPIO_Port GPIOA |
65 | #define LED2_Pin GPIO_PIN_6 | 71 | #define LED2_Pin GPIO_PIN_6 | ... | ... |
... | @@ -49,7 +49,7 @@ | ... | @@ -49,7 +49,7 @@ |
49 | /*#define HAL_RTC_MODULE_ENABLED */ | 49 | /*#define HAL_RTC_MODULE_ENABLED */ |
50 | /*#define HAL_SPI_MODULE_ENABLED */ | 50 | /*#define HAL_SPI_MODULE_ENABLED */ |
51 | #define HAL_TIM_MODULE_ENABLED | 51 | #define HAL_TIM_MODULE_ENABLED |
52 | /*#define HAL_UART_MODULE_ENABLED */ | 52 | #define HAL_UART_MODULE_ENABLED |
53 | /*#define HAL_USART_MODULE_ENABLED */ | 53 | /*#define HAL_USART_MODULE_ENABLED */ |
54 | /*#define HAL_IRDA_MODULE_ENABLED */ | 54 | /*#define HAL_IRDA_MODULE_ENABLED */ |
55 | /*#define HAL_SMARTCARD_MODULE_ENABLED */ | 55 | /*#define HAL_SMARTCARD_MODULE_ENABLED */ | ... | ... |
... | @@ -50,6 +50,7 @@ | ... | @@ -50,6 +50,7 @@ |
50 | void NMI_Handler(void); | 50 | void NMI_Handler(void); |
51 | void HardFault_Handler(void); | 51 | void HardFault_Handler(void); |
52 | void TIM1_BRK_UP_TRG_COM_IRQHandler(void); | 52 | void TIM1_BRK_UP_TRG_COM_IRQHandler(void); |
53 | void USART2_IRQHandler(void); | ||
53 | /* USER CODE BEGIN EFP */ | 54 | /* USER CODE BEGIN EFP */ |
54 | 55 | ||
55 | /* USER CODE END EFP */ | 56 | /* USER CODE END EFP */ | ... | ... |
Core/Inc/usart.h
0 → 100644
1 | /** | ||
2 | ****************************************************************************** | ||
3 | * File Name : USART.h | ||
4 | * Description : This file provides code for the configuration | ||
5 | * of the USART instances. | ||
6 | ****************************************************************************** | ||
7 | * @attention | ||
8 | * | ||
9 | * <h2><center>© Copyright (c) 2019 STMicroelectronics. | ||
10 | * All rights reserved.</center></h2> | ||
11 | * | ||
12 | * This software component is licensed by ST under Ultimate Liberty license | ||
13 | * SLA0044, the "License"; You may not use this file except in compliance with | ||
14 | * the License. You may obtain a copy of the License at: | ||
15 | * www.st.com/SLA0044 | ||
16 | * | ||
17 | ****************************************************************************** | ||
18 | */ | ||
19 | /* Define to prevent recursive inclusion -------------------------------------*/ | ||
20 | #ifndef __usart_H | ||
21 | #define __usart_H | ||
22 | #ifdef __cplusplus | ||
23 | extern "C" { | ||
24 | #endif | ||
25 | |||
26 | /* Includes ------------------------------------------------------------------*/ | ||
27 | #include "main.h" | ||
28 | |||
29 | /* USER CODE BEGIN Includes */ | ||
30 | #define USART_REC_LEN 200 // 最大接收字节数 | ||
31 | |||
32 | extern uint8_t USART_RX_BUF[USART_REC_LEN]; // 接收缓冲,最大USART_REC_LEN个字节,末字节为换行 | ||
33 | extern uint16_t USART_RX_STA; // 接收状态 | ||
34 | |||
35 | #define RXBUFFERSIZE 1 // 缓存大小 | ||
36 | extern uint8_t aRxBuffer[RXBUFFERSIZE]; // HAL库USART接收Buffer | ||
37 | |||
38 | /* USER CODE END Includes */ | ||
39 | |||
40 | extern UART_HandleTypeDef huart1; | ||
41 | extern UART_HandleTypeDef huart2; | ||
42 | |||
43 | /* USER CODE BEGIN Private defines */ | ||
44 | |||
45 | /* USER CODE END Private defines */ | ||
46 | |||
47 | void MX_USART1_UART_Init(void); | ||
48 | void MX_USART2_UART_Init(void); | ||
49 | |||
50 | /* USER CODE BEGIN Prototypes */ | ||
51 | |||
52 | /* USER CODE END Prototypes */ | ||
53 | |||
54 | #ifdef __cplusplus | ||
55 | } | ||
56 | #endif | ||
57 | #endif /*__ usart_H */ | ||
58 | |||
59 | /** | ||
60 | * @} | ||
61 | */ | ||
62 | |||
63 | /** | ||
64 | * @} | ||
65 | */ | ||
66 | |||
67 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
... | @@ -49,6 +49,8 @@ | ... | @@ -49,6 +49,8 @@ |
49 | /* USER CODE END Variables */ | 49 | /* USER CODE END Variables */ |
50 | osThreadId_t LEDTaskHandle; | 50 | osThreadId_t LEDTaskHandle; |
51 | osThreadId_t KeyScanTaskHandle; | 51 | osThreadId_t KeyScanTaskHandle; |
52 | osThreadId_t UartTaskHandle; | ||
53 | osThreadId_t CoreTaskHandle; | ||
52 | 54 | ||
53 | /* Private function prototypes -----------------------------------------------*/ | 55 | /* Private function prototypes -----------------------------------------------*/ |
54 | /* USER CODE BEGIN FunctionPrototypes */ | 56 | /* USER CODE BEGIN FunctionPrototypes */ |
... | @@ -57,6 +59,8 @@ osThreadId_t KeyScanTaskHandle; | ... | @@ -57,6 +59,8 @@ osThreadId_t KeyScanTaskHandle; |
57 | 59 | ||
58 | void StartLEDTask(void *argument); | 60 | void StartLEDTask(void *argument); |
59 | void StartKeyScanTask(void *argument); | 61 | void StartKeyScanTask(void *argument); |
62 | void StartUartTask(void *argument); | ||
63 | void StartCoreTask(void *argument); | ||
60 | 64 | ||
61 | void MX_FREERTOS_Init(void); /* (MISRA C 2004 rule 8.1) */ | 65 | void MX_FREERTOS_Init(void); /* (MISRA C 2004 rule 8.1) */ |
62 | 66 | ||
... | @@ -92,18 +96,34 @@ osKernelInitialize(); | ... | @@ -92,18 +96,34 @@ osKernelInitialize(); |
92 | const osThreadAttr_t LEDTask_attributes = { | 96 | const osThreadAttr_t LEDTask_attributes = { |
93 | .name = "LEDTask", | 97 | .name = "LEDTask", |
94 | .priority = (osPriority_t) osPriorityNormal, | 98 | .priority = (osPriority_t) osPriorityNormal, |
95 | .stack_size = 128 | 99 | .stack_size = 64 |
96 | }; | 100 | }; |
97 | LEDTaskHandle = osThreadNew(StartLEDTask, NULL, &LEDTask_attributes); | 101 | LEDTaskHandle = osThreadNew(StartLEDTask, NULL, &LEDTask_attributes); |
98 | 102 | ||
99 | /* definition and creation of KeyScanTask */ | 103 | /* definition and creation of KeyScanTask */ |
100 | const osThreadAttr_t KeyScanTask_attributes = { | 104 | const osThreadAttr_t KeyScanTask_attributes = { |
101 | .name = "KeyScanTask", | 105 | .name = "KeyScanTask", |
102 | .priority = (osPriority_t) osPriorityBelowNormal1, | 106 | .priority = (osPriority_t) osPriorityNormal, |
103 | .stack_size = 128 | 107 | .stack_size = 64 |
104 | }; | 108 | }; |
105 | KeyScanTaskHandle = osThreadNew(StartKeyScanTask, NULL, &KeyScanTask_attributes); | 109 | KeyScanTaskHandle = osThreadNew(StartKeyScanTask, NULL, &KeyScanTask_attributes); |
106 | 110 | ||
111 | /* definition and creation of UartTask */ | ||
112 | const osThreadAttr_t UartTask_attributes = { | ||
113 | .name = "UartTask", | ||
114 | .priority = (osPriority_t) osPriorityNormal, | ||
115 | .stack_size = 128 | ||
116 | }; | ||
117 | UartTaskHandle = osThreadNew(StartUartTask, NULL, &UartTask_attributes); | ||
118 | |||
119 | /* definition and creation of CoreTask */ | ||
120 | const osThreadAttr_t CoreTask_attributes = { | ||
121 | .name = "CoreTask", | ||
122 | .priority = (osPriority_t) osPriorityLow, | ||
123 | .stack_size = 128 | ||
124 | }; | ||
125 | CoreTaskHandle = osThreadNew(StartCoreTask, NULL, &CoreTask_attributes); | ||
126 | |||
107 | /* USER CODE BEGIN RTOS_THREADS */ | 127 | /* USER CODE BEGIN RTOS_THREADS */ |
108 | /* add threads, ... */ | 128 | /* add threads, ... */ |
109 | /* USER CODE END RTOS_THREADS */ | 129 | /* USER CODE END RTOS_THREADS */ |
... | @@ -153,6 +173,64 @@ void StartKeyScanTask(void *argument) | ... | @@ -153,6 +173,64 @@ void StartKeyScanTask(void *argument) |
153 | /* USER CODE END StartKeyScanTask */ | 173 | /* USER CODE END StartKeyScanTask */ |
154 | } | 174 | } |
155 | 175 | ||
176 | /* USER CODE BEGIN Header_StartUartTask */ | ||
177 | /** | ||
178 | * @brief Function implementing the UartTask thread. | ||
179 | * @param argument: Not used | ||
180 | * @retval None | ||
181 | */ | ||
182 | /* USER CODE END Header_StartUartTask */ | ||
183 | void StartUartTask(void *argument) | ||
184 | { | ||
185 | /* USER CODE BEGIN StartUartTask */ | ||
186 | uint8_t len; | ||
187 | uint16_t times; | ||
188 | /* Infinite loop */ | ||
189 | for(;;) | ||
190 | { | ||
191 | if (USART_RX_STA & 0x8000) | ||
192 | { | ||
193 | len = USART_RX_STA & 0x3fff; // 获取接收到的数据长度 | ||
194 | printf("\r\n接收到的数据:\r\n"); | ||
195 | HAL_UART_Transmit(&huart1, (uint8_t*)USART_RX_BUF, len, 1000); | ||
196 | while (__HAL_UART_GET_FLAG(&huart1, UART_FLAG_TC) != SET); | ||
197 | printf("\r\n\r\n"); // 插入换行 | ||
198 | USART_RX_STA=0; | ||
199 | } | ||
200 | else | ||
201 | { | ||
202 | times++; | ||
203 | if (times % 5000 == 0) | ||
204 | { | ||
205 | printf("\r\n串口实验\r\n"); | ||
206 | } | ||
207 | if (times % 200 == 0) | ||
208 | printf("请输入数据,以回车键结束\r\n"); | ||
209 | } | ||
210 | |||
211 | osDelay(1); | ||
212 | } | ||
213 | /* USER CODE END StartUartTask */ | ||
214 | } | ||
215 | |||
216 | /* USER CODE BEGIN Header_StartCoreTask */ | ||
217 | /** | ||
218 | * @brief Function implementing the CoreTask thread. | ||
219 | * @param argument: Not used | ||
220 | * @retval None | ||
221 | */ | ||
222 | /* USER CODE END Header_StartCoreTask */ | ||
223 | void StartCoreTask(void *argument) | ||
224 | { | ||
225 | /* USER CODE BEGIN StartCoreTask */ | ||
226 | /* Infinite loop */ | ||
227 | for(;;) | ||
228 | { | ||
229 | osDelay(1); | ||
230 | } | ||
231 | /* USER CODE END StartCoreTask */ | ||
232 | } | ||
233 | |||
156 | /* Private application code --------------------------------------------------*/ | 234 | /* Private application code --------------------------------------------------*/ |
157 | /* USER CODE BEGIN Application */ | 235 | /* USER CODE BEGIN Application */ |
158 | 236 | ... | ... |
... | @@ -57,8 +57,8 @@ void MX_GPIO_Init(void) | ... | @@ -57,8 +57,8 @@ void MX_GPIO_Init(void) |
57 | /*Configure GPIO pin : PtPin */ | 57 | /*Configure GPIO pin : PtPin */ |
58 | GPIO_InitStruct.Pin = BEEP_Pin; | 58 | GPIO_InitStruct.Pin = BEEP_Pin; |
59 | GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; | 59 | GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; |
60 | GPIO_InitStruct.Pull = GPIO_PULLDOWN; | 60 | GPIO_InitStruct.Pull = GPIO_NOPULL; |
61 | GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; | 61 | GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; |
62 | HAL_GPIO_Init(BEEP_GPIO_Port, &GPIO_InitStruct); | 62 | HAL_GPIO_Init(BEEP_GPIO_Port, &GPIO_InitStruct); |
63 | 63 | ||
64 | /*Configure GPIO pins : PBPin PBPin */ | 64 | /*Configure GPIO pins : PBPin PBPin */ | ... | ... |
... | @@ -21,6 +21,7 @@ | ... | @@ -21,6 +21,7 @@ |
21 | /* Includes ------------------------------------------------------------------*/ | 21 | /* Includes ------------------------------------------------------------------*/ |
22 | #include "main.h" | 22 | #include "main.h" |
23 | #include "cmsis_os.h" | 23 | #include "cmsis_os.h" |
24 | #include "usart.h" | ||
24 | #include "gpio.h" | 25 | #include "gpio.h" |
25 | 26 | ||
26 | /* Private includes ----------------------------------------------------------*/ | 27 | /* Private includes ----------------------------------------------------------*/ |
... | @@ -89,8 +90,11 @@ int main(void) | ... | @@ -89,8 +90,11 @@ int main(void) |
89 | 90 | ||
90 | /* Initialize all configured peripherals */ | 91 | /* Initialize all configured peripherals */ |
91 | MX_GPIO_Init(); | 92 | MX_GPIO_Init(); |
93 | MX_USART1_UART_Init(); | ||
94 | MX_USART2_UART_Init(); | ||
92 | /* USER CODE BEGIN 2 */ | 95 | /* USER CODE BEGIN 2 */ |
93 | 96 | // 使能UART1中断 | |
97 | HAL_UART_Receive_IT(&huart2, (uint8_t*)aRxBuffer, RXBUFFERSIZE); | ||
94 | /* USER CODE END 2 */ | 98 | /* USER CODE END 2 */ |
95 | 99 | ||
96 | /* Call init function for freertos objects (in freertos.c) */ | 100 | /* Call init function for freertos objects (in freertos.c) */ |
... | @@ -120,6 +124,7 @@ void SystemClock_Config(void) | ... | @@ -120,6 +124,7 @@ void SystemClock_Config(void) |
120 | { | 124 | { |
121 | RCC_OscInitTypeDef RCC_OscInitStruct = {0}; | 125 | RCC_OscInitTypeDef RCC_OscInitStruct = {0}; |
122 | RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; | 126 | RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; |
127 | RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; | ||
123 | 128 | ||
124 | /** Initializes the CPU, AHB and APB busses clocks | 129 | /** Initializes the CPU, AHB and APB busses clocks |
125 | */ | 130 | */ |
... | @@ -146,6 +151,12 @@ void SystemClock_Config(void) | ... | @@ -146,6 +151,12 @@ void SystemClock_Config(void) |
146 | { | 151 | { |
147 | Error_Handler(); | 152 | Error_Handler(); |
148 | } | 153 | } |
154 | PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1; | ||
155 | PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK1; | ||
156 | if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) | ||
157 | { | ||
158 | Error_Handler(); | ||
159 | } | ||
149 | } | 160 | } |
150 | 161 | ||
151 | /* USER CODE BEGIN 4 */ | 162 | /* USER CODE BEGIN 4 */ | ... | ... |
... | @@ -58,6 +58,7 @@ | ... | @@ -58,6 +58,7 @@ |
58 | /* USER CODE END 0 */ | 58 | /* USER CODE END 0 */ |
59 | 59 | ||
60 | /* External variables --------------------------------------------------------*/ | 60 | /* External variables --------------------------------------------------------*/ |
61 | extern UART_HandleTypeDef huart2; | ||
61 | extern TIM_HandleTypeDef htim1; | 62 | extern TIM_HandleTypeDef htim1; |
62 | 63 | ||
63 | /* USER CODE BEGIN EV */ | 64 | /* USER CODE BEGIN EV */ |
... | @@ -116,6 +117,20 @@ void TIM1_BRK_UP_TRG_COM_IRQHandler(void) | ... | @@ -116,6 +117,20 @@ void TIM1_BRK_UP_TRG_COM_IRQHandler(void) |
116 | /* USER CODE END TIM1_BRK_UP_TRG_COM_IRQn 1 */ | 117 | /* USER CODE END TIM1_BRK_UP_TRG_COM_IRQn 1 */ |
117 | } | 118 | } |
118 | 119 | ||
120 | /** | ||
121 | * @brief This function handles USART2 global interrupt. | ||
122 | */ | ||
123 | void USART2_IRQHandler(void) | ||
124 | { | ||
125 | /* USER CODE BEGIN USART2_IRQn 0 */ | ||
126 | |||
127 | /* USER CODE END USART2_IRQn 0 */ | ||
128 | HAL_UART_IRQHandler(&huart2); | ||
129 | /* USER CODE BEGIN USART2_IRQn 1 */ | ||
130 | |||
131 | /* USER CODE END USART2_IRQn 1 */ | ||
132 | } | ||
133 | |||
119 | /* USER CODE BEGIN 1 */ | 134 | /* USER CODE BEGIN 1 */ |
120 | 135 | ||
121 | /* USER CODE END 1 */ | 136 | /* USER CODE END 1 */ | ... | ... |
Core/Src/usart.c
0 → 100644
1 | /** | ||
2 | ****************************************************************************** | ||
3 | * File Name : USART.c | ||
4 | * Description : This file provides code for the configuration | ||
5 | * of the USART instances. | ||
6 | ****************************************************************************** | ||
7 | * @attention | ||
8 | * | ||
9 | * <h2><center>© Copyright (c) 2019 STMicroelectronics. | ||
10 | * All rights reserved.</center></h2> | ||
11 | * | ||
12 | * This software component is licensed by ST under Ultimate Liberty license | ||
13 | * SLA0044, the "License"; You may not use this file except in compliance with | ||
14 | * the License. You may obtain a copy of the License at: | ||
15 | * www.st.com/SLA0044 | ||
16 | * | ||
17 | ****************************************************************************** | ||
18 | */ | ||
19 | |||
20 | /* Includes ------------------------------------------------------------------*/ | ||
21 | #include "usart.h" | ||
22 | |||
23 | /* USER CODE BEGIN 0 */ | ||
24 | // 标准库需要的支持函数 | ||
25 | struct __FILE | ||
26 | { | ||
27 | int handle; | ||
28 | }; | ||
29 | |||
30 | FILE __stdout; | ||
31 | |||
32 | uint8_t USART_RX_BUF[USART_REC_LEN]; | ||
33 | |||
34 | uint16_t USART_RX_STA = 0; | ||
35 | |||
36 | uint8_t aRxBuffer[RXBUFFERSIZE]; | ||
37 | |||
38 | /* USER CODE END 0 */ | ||
39 | |||
40 | UART_HandleTypeDef huart1; | ||
41 | UART_HandleTypeDef huart2; | ||
42 | |||
43 | /* USART1 init function */ | ||
44 | |||
45 | void MX_USART1_UART_Init(void) | ||
46 | { | ||
47 | |||
48 | huart1.Instance = USART1; | ||
49 | huart1.Init.BaudRate = 115200; | ||
50 | huart1.Init.WordLength = UART_WORDLENGTH_8B; | ||
51 | huart1.Init.StopBits = UART_STOPBITS_1; | ||
52 | huart1.Init.Parity = UART_PARITY_NONE; | ||
53 | huart1.Init.Mode = UART_MODE_TX_RX; | ||
54 | huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; | ||
55 | huart1.Init.OverSampling = UART_OVERSAMPLING_16; | ||
56 | huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; | ||
57 | huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; | ||
58 | if (HAL_UART_Init(&huart1) != HAL_OK) | ||
59 | { | ||
60 | Error_Handler(); | ||
61 | } | ||
62 | |||
63 | } | ||
64 | /* USART2 init function */ | ||
65 | |||
66 | void MX_USART2_UART_Init(void) | ||
67 | { | ||
68 | |||
69 | huart2.Instance = USART2; | ||
70 | huart2.Init.BaudRate = 115200; | ||
71 | huart2.Init.WordLength = UART_WORDLENGTH_8B; | ||
72 | huart2.Init.StopBits = UART_STOPBITS_1; | ||
73 | huart2.Init.Parity = UART_PARITY_NONE; | ||
74 | huart2.Init.Mode = UART_MODE_TX_RX; | ||
75 | huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE; | ||
76 | huart2.Init.OverSampling = UART_OVERSAMPLING_16; | ||
77 | huart2.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; | ||
78 | huart2.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; | ||
79 | if (HAL_UART_Init(&huart2) != HAL_OK) | ||
80 | { | ||
81 | Error_Handler(); | ||
82 | } | ||
83 | |||
84 | } | ||
85 | |||
86 | void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle) | ||
87 | { | ||
88 | |||
89 | GPIO_InitTypeDef GPIO_InitStruct = {0}; | ||
90 | if(uartHandle->Instance==USART1) | ||
91 | { | ||
92 | /* USER CODE BEGIN USART1_MspInit 0 */ | ||
93 | |||
94 | /* USER CODE END USART1_MspInit 0 */ | ||
95 | /* USART1 clock enable */ | ||
96 | __HAL_RCC_USART1_CLK_ENABLE(); | ||
97 | |||
98 | __HAL_RCC_GPIOA_CLK_ENABLE(); | ||
99 | /**USART1 GPIO Configuration | ||
100 | PA9 ------> USART1_TX | ||
101 | PA10 ------> USART1_RX | ||
102 | */ | ||
103 | GPIO_InitStruct.Pin = DEBUG_TX_Pin|DEBUG_RX_Pin; | ||
104 | GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; | ||
105 | GPIO_InitStruct.Pull = GPIO_PULLUP; | ||
106 | GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_MEDIUM; | ||
107 | GPIO_InitStruct.Alternate = GPIO_AF1_USART1; | ||
108 | HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); | ||
109 | |||
110 | /* USER CODE BEGIN USART1_MspInit 1 */ | ||
111 | |||
112 | /* USER CODE END USART1_MspInit 1 */ | ||
113 | } | ||
114 | else if(uartHandle->Instance==USART2) | ||
115 | { | ||
116 | /* USER CODE BEGIN USART2_MspInit 0 */ | ||
117 | |||
118 | /* USER CODE END USART2_MspInit 0 */ | ||
119 | /* USART2 clock enable */ | ||
120 | __HAL_RCC_USART2_CLK_ENABLE(); | ||
121 | |||
122 | __HAL_RCC_GPIOA_CLK_ENABLE(); | ||
123 | /**USART2 GPIO Configuration | ||
124 | PA2 ------> USART2_TX | ||
125 | PA3 ------> USART2_RX | ||
126 | */ | ||
127 | GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_3; | ||
128 | GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; | ||
129 | GPIO_InitStruct.Pull = GPIO_NOPULL; | ||
130 | GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; | ||
131 | GPIO_InitStruct.Alternate = GPIO_AF1_USART2; | ||
132 | HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); | ||
133 | |||
134 | /* USART2 interrupt Init */ | ||
135 | HAL_NVIC_SetPriority(USART2_IRQn, 3, 0); | ||
136 | HAL_NVIC_EnableIRQ(USART2_IRQn); | ||
137 | /* USER CODE BEGIN USART2_MspInit 1 */ | ||
138 | |||
139 | /* USER CODE END USART2_MspInit 1 */ | ||
140 | } | ||
141 | } | ||
142 | |||
143 | void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle) | ||
144 | { | ||
145 | |||
146 | if(uartHandle->Instance==USART1) | ||
147 | { | ||
148 | /* USER CODE BEGIN USART1_MspDeInit 0 */ | ||
149 | |||
150 | /* USER CODE END USART1_MspDeInit 0 */ | ||
151 | /* Peripheral clock disable */ | ||
152 | __HAL_RCC_USART1_CLK_DISABLE(); | ||
153 | |||
154 | /**USART1 GPIO Configuration | ||
155 | PA9 ------> USART1_TX | ||
156 | PA10 ------> USART1_RX | ||
157 | */ | ||
158 | HAL_GPIO_DeInit(GPIOA, DEBUG_TX_Pin|DEBUG_RX_Pin); | ||
159 | |||
160 | /* USER CODE BEGIN USART1_MspDeInit 1 */ | ||
161 | |||
162 | /* USER CODE END USART1_MspDeInit 1 */ | ||
163 | } | ||
164 | else if(uartHandle->Instance==USART2) | ||
165 | { | ||
166 | /* USER CODE BEGIN USART2_MspDeInit 0 */ | ||
167 | |||
168 | /* USER CODE END USART2_MspDeInit 0 */ | ||
169 | /* Peripheral clock disable */ | ||
170 | __HAL_RCC_USART2_CLK_DISABLE(); | ||
171 | |||
172 | /**USART2 GPIO Configuration | ||
173 | PA2 ------> USART2_TX | ||
174 | PA3 ------> USART2_RX | ||
175 | */ | ||
176 | HAL_GPIO_DeInit(GPIOA, GPIO_PIN_2|GPIO_PIN_3); | ||
177 | |||
178 | /* USART2 interrupt Deinit */ | ||
179 | HAL_NVIC_DisableIRQ(USART2_IRQn); | ||
180 | /* USER CODE BEGIN USART2_MspDeInit 1 */ | ||
181 | |||
182 | /* USER CODE END USART2_MspDeInit 1 */ | ||
183 | } | ||
184 | } | ||
185 | |||
186 | /* USER CODE BEGIN 1 */ | ||
187 | /** | ||
188 | * 定义_sys_exit以避免使用半主机模式 | ||
189 | */ | ||
190 | void _sys_exit(int x) | ||
191 | { | ||
192 | x = x; | ||
193 | } | ||
194 | |||
195 | /** | ||
196 | * 重定义fputc函数 | ||
197 | */ | ||
198 | int fputc(int ch, FILE *f) | ||
199 | { | ||
200 | while ((USART1->ISR & 0X40) == 0); // 循环发送 | ||
201 | USART1->RDR = (uint8_t) ch; | ||
202 | return ch; | ||
203 | } | ||
204 | |||
205 | /** | ||
206 | * 串口接收回调函数 | ||
207 | */ | ||
208 | void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) | ||
209 | { | ||
210 | if (huart->Instance == USART2) // 串口1 | ||
211 | { | ||
212 | if ((USART_RX_STA & 0x8000) == 0) // 接收未完�? | ||
213 | { | ||
214 | if (USART_RX_STA & 0x4000) // 接收到了0x0D | ||
215 | { | ||
216 | if (aRxBuffer[0] != 0x0a) | ||
217 | USART_RX_STA = 0; // 接收错误,重新接�? | ||
218 | else | ||
219 | USART_RX_STA |= 0x8000; // 接收完成 | ||
220 | } | ||
221 | else // 还没接收�?0x0D | ||
222 | { | ||
223 | if (aRxBuffer[0] == 0x0d) | ||
224 | { | ||
225 | USART_RX_STA |= 0x4000; | ||
226 | } | ||
227 | else | ||
228 | { | ||
229 | USART_RX_BUF[USART_RX_STA & 0X3FFF] = aRxBuffer[0] ; | ||
230 | USART_RX_STA++; | ||
231 | if (USART_RX_STA > (USART_REC_LEN-1)) | ||
232 | { | ||
233 | USART_RX_STA = 0; // 接收错误,重新开始接�? | ||
234 | } | ||
235 | } | ||
236 | } | ||
237 | } | ||
238 | } | ||
239 | } | ||
240 | /* USER CODE END 1 */ | ||
241 | |||
242 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
1 | /** | ||
2 | ****************************************************************************** | ||
3 | * @file stm32f0xx_hal_uart.h | ||
4 | * @author MCD Application Team | ||
5 | * @brief Header file of UART HAL module. | ||
6 | ****************************************************************************** | ||
7 | * @attention | ||
8 | * | ||
9 | * <h2><center>© Copyright (c) 2016 STMicroelectronics. | ||
10 | * All rights reserved.</center></h2> | ||
11 | * | ||
12 | * This software component is licensed by ST under BSD 3-Clause license, | ||
13 | * the "License"; You may not use this file except in compliance with the | ||
14 | * License. You may obtain a copy of the License at: | ||
15 | * opensource.org/licenses/BSD-3-Clause | ||
16 | * | ||
17 | ****************************************************************************** | ||
18 | */ | ||
19 | |||
20 | /* Define to prevent recursive inclusion -------------------------------------*/ | ||
21 | #ifndef STM32F0xx_HAL_UART_H | ||
22 | #define STM32F0xx_HAL_UART_H | ||
23 | |||
24 | #ifdef __cplusplus | ||
25 | extern "C" { | ||
26 | #endif | ||
27 | |||
28 | /* Includes ------------------------------------------------------------------*/ | ||
29 | #include "stm32f0xx_hal_def.h" | ||
30 | |||
31 | /** @addtogroup STM32F0xx_HAL_Driver | ||
32 | * @{ | ||
33 | */ | ||
34 | |||
35 | /** @addtogroup UART | ||
36 | * @{ | ||
37 | */ | ||
38 | |||
39 | /* Exported types ------------------------------------------------------------*/ | ||
40 | /** @defgroup UART_Exported_Types UART Exported Types | ||
41 | * @{ | ||
42 | */ | ||
43 | |||
44 | /** | ||
45 | * @brief UART Init Structure definition | ||
46 | */ | ||
47 | typedef struct | ||
48 | { | ||
49 | uint32_t BaudRate; /*!< This member configures the UART communication baud rate. | ||
50 | The baud rate register is computed using the following formula: | ||
51 | - If oversampling is 16 or in LIN mode, | ||
52 | Baud Rate Register = ((uart_ker_ck) / ((huart->Init.BaudRate))) | ||
53 | - If oversampling is 8, | ||
54 | Baud Rate Register[15:4] = ((2 * uart_ker_ck) / ((huart->Init.BaudRate)))[15:4] | ||
55 | Baud Rate Register[3] = 0 | ||
56 | Baud Rate Register[2:0] = (((2 * uart_ker_ck) / ((huart->Init.BaudRate)))[3:0]) >> 1 | ||
57 | where uart_ker_ck is the UART input clock */ | ||
58 | |||
59 | uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. | ||
60 | This parameter can be a value of @ref UARTEx_Word_Length. */ | ||
61 | |||
62 | uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. | ||
63 | This parameter can be a value of @ref UART_Stop_Bits. */ | ||
64 | |||
65 | uint32_t Parity; /*!< Specifies the parity mode. | ||
66 | This parameter can be a value of @ref UART_Parity | ||
67 | @note When parity is enabled, the computed parity is inserted | ||
68 | at the MSB position of the transmitted data (9th bit when | ||
69 | the word length is set to 9 data bits; 8th bit when the | ||
70 | word length is set to 8 data bits). */ | ||
71 | |||
72 | uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled. | ||
73 | This parameter can be a value of @ref UART_Mode. */ | ||
74 | |||
75 | uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled | ||
76 | or disabled. | ||
77 | This parameter can be a value of @ref UART_Hardware_Flow_Control. */ | ||
78 | |||
79 | uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to f_PCLK/8). | ||
80 | This parameter can be a value of @ref UART_Over_Sampling. */ | ||
81 | |||
82 | uint32_t OneBitSampling; /*!< Specifies whether a single sample or three samples' majority vote is selected. | ||
83 | Selecting the single sample method increases the receiver tolerance to clock | ||
84 | deviations. This parameter can be a value of @ref UART_OneBit_Sampling. */ | ||
85 | |||
86 | |||
87 | } UART_InitTypeDef; | ||
88 | |||
89 | /** | ||
90 | * @brief UART Advanced Features initialization structure definition | ||
91 | */ | ||
92 | typedef struct | ||
93 | { | ||
94 | uint32_t AdvFeatureInit; /*!< Specifies which advanced UART features is initialized. Several | ||
95 | Advanced Features may be initialized at the same time . | ||
96 | This parameter can be a value of @ref UART_Advanced_Features_Initialization_Type. */ | ||
97 | |||
98 | uint32_t TxPinLevelInvert; /*!< Specifies whether the TX pin active level is inverted. | ||
99 | This parameter can be a value of @ref UART_Tx_Inv. */ | ||
100 | |||
101 | uint32_t RxPinLevelInvert; /*!< Specifies whether the RX pin active level is inverted. | ||
102 | This parameter can be a value of @ref UART_Rx_Inv. */ | ||
103 | |||
104 | uint32_t DataInvert; /*!< Specifies whether data are inverted (positive/direct logic | ||
105 | vs negative/inverted logic). | ||
106 | This parameter can be a value of @ref UART_Data_Inv. */ | ||
107 | |||
108 | uint32_t Swap; /*!< Specifies whether TX and RX pins are swapped. | ||
109 | This parameter can be a value of @ref UART_Rx_Tx_Swap. */ | ||
110 | |||
111 | uint32_t OverrunDisable; /*!< Specifies whether the reception overrun detection is disabled. | ||
112 | This parameter can be a value of @ref UART_Overrun_Disable. */ | ||
113 | |||
114 | uint32_t DMADisableonRxError; /*!< Specifies whether the DMA is disabled in case of reception error. | ||
115 | This parameter can be a value of @ref UART_DMA_Disable_on_Rx_Error. */ | ||
116 | |||
117 | uint32_t AutoBaudRateEnable; /*!< Specifies whether auto Baud rate detection is enabled. | ||
118 | This parameter can be a value of @ref UART_AutoBaudRate_Enable. */ | ||
119 | |||
120 | uint32_t AutoBaudRateMode; /*!< If auto Baud rate detection is enabled, specifies how the rate | ||
121 | detection is carried out. | ||
122 | This parameter can be a value of @ref UART_AutoBaud_Rate_Mode. */ | ||
123 | |||
124 | uint32_t MSBFirst; /*!< Specifies whether MSB is sent first on UART line. | ||
125 | This parameter can be a value of @ref UART_MSB_First. */ | ||
126 | } UART_AdvFeatureInitTypeDef; | ||
127 | |||
128 | /** | ||
129 | * @brief HAL UART State definition | ||
130 | * @note HAL UART State value is a combination of 2 different substates: gState and RxState (see @ref UART_State_Definition). | ||
131 | * - gState contains UART state information related to global Handle management | ||
132 | * and also information related to Tx operations. | ||
133 | * gState value coding follow below described bitmap : | ||
134 | * b7-b6 Error information | ||
135 | * 00 : No Error | ||
136 | * 01 : (Not Used) | ||
137 | * 10 : Timeout | ||
138 | * 11 : Error | ||
139 | * b5 Peripheral initialization status | ||
140 | * 0 : Reset (Peripheral not initialized) | ||
141 | * 1 : Init done (Peripheral not initialized. HAL UART Init function already called) | ||
142 | * b4-b3 (not used) | ||
143 | * xx : Should be set to 00 | ||
144 | * b2 Intrinsic process state | ||
145 | * 0 : Ready | ||
146 | * 1 : Busy (Peripheral busy with some configuration or internal operations) | ||
147 | * b1 (not used) | ||
148 | * x : Should be set to 0 | ||
149 | * b0 Tx state | ||
150 | * 0 : Ready (no Tx operation ongoing) | ||
151 | * 1 : Busy (Tx operation ongoing) | ||
152 | * - RxState contains information related to Rx operations. | ||
153 | * RxState value coding follow below described bitmap : | ||
154 | * b7-b6 (not used) | ||
155 | * xx : Should be set to 00 | ||
156 | * b5 Peripheral initialization status | ||
157 | * 0 : Reset (Peripheral not initialized) | ||
158 | * 1 : Init done (Peripheral not initialized) | ||
159 | * b4-b2 (not used) | ||
160 | * xxx : Should be set to 000 | ||
161 | * b1 Rx state | ||
162 | * 0 : Ready (no Rx operation ongoing) | ||
163 | * 1 : Busy (Rx operation ongoing) | ||
164 | * b0 (not used) | ||
165 | * x : Should be set to 0. | ||
166 | */ | ||
167 | typedef uint32_t HAL_UART_StateTypeDef; | ||
168 | |||
169 | /** | ||
170 | * @brief UART clock sources definition | ||
171 | */ | ||
172 | typedef enum | ||
173 | { | ||
174 | UART_CLOCKSOURCE_PCLK1 = 0x00U, /*!< PCLK1 clock source */ | ||
175 | UART_CLOCKSOURCE_HSI = 0x02U, /*!< HSI clock source */ | ||
176 | UART_CLOCKSOURCE_SYSCLK = 0x04U, /*!< SYSCLK clock source */ | ||
177 | UART_CLOCKSOURCE_LSE = 0x08U, /*!< LSE clock source */ | ||
178 | UART_CLOCKSOURCE_UNDEFINED = 0x10U /*!< Undefined clock source */ | ||
179 | } UART_ClockSourceTypeDef; | ||
180 | |||
181 | /** | ||
182 | * @brief UART handle Structure definition | ||
183 | */ | ||
184 | typedef struct __UART_HandleTypeDef | ||
185 | { | ||
186 | USART_TypeDef *Instance; /*!< UART registers base address */ | ||
187 | |||
188 | UART_InitTypeDef Init; /*!< UART communication parameters */ | ||
189 | |||
190 | UART_AdvFeatureInitTypeDef AdvancedInit; /*!< UART Advanced Features initialization parameters */ | ||
191 | |||
192 | uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */ | ||
193 | |||
194 | uint16_t TxXferSize; /*!< UART Tx Transfer size */ | ||
195 | |||
196 | __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */ | ||
197 | |||
198 | uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */ | ||
199 | |||
200 | uint16_t RxXferSize; /*!< UART Rx Transfer size */ | ||
201 | |||
202 | __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */ | ||
203 | |||
204 | uint16_t Mask; /*!< UART Rx RDR register mask */ | ||
205 | |||
206 | void (*RxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Rx IRQ handler */ | ||
207 | |||
208 | void (*TxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Tx IRQ handler */ | ||
209 | |||
210 | DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */ | ||
211 | |||
212 | DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */ | ||
213 | |||
214 | HAL_LockTypeDef Lock; /*!< Locking object */ | ||
215 | |||
216 | __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management | ||
217 | and also related to Tx operations. | ||
218 | This parameter can be a value of @ref HAL_UART_StateTypeDef */ | ||
219 | |||
220 | __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations. | ||
221 | This parameter can be a value of @ref HAL_UART_StateTypeDef */ | ||
222 | |||
223 | __IO uint32_t ErrorCode; /*!< UART Error code */ | ||
224 | |||
225 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) | ||
226 | void (* TxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Half Complete Callback */ | ||
227 | void (* TxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Complete Callback */ | ||
228 | void (* RxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Half Complete Callback */ | ||
229 | void (* RxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Complete Callback */ | ||
230 | void (* ErrorCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Error Callback */ | ||
231 | void (* AbortCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Complete Callback */ | ||
232 | void (* AbortTransmitCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Transmit Complete Callback */ | ||
233 | void (* AbortReceiveCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Receive Complete Callback */ | ||
234 | void (* WakeupCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Wakeup Callback */ | ||
235 | |||
236 | void (* MspInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp Init callback */ | ||
237 | void (* MspDeInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp DeInit callback */ | ||
238 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ | ||
239 | |||
240 | } UART_HandleTypeDef; | ||
241 | |||
242 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) | ||
243 | /** | ||
244 | * @brief HAL UART Callback ID enumeration definition | ||
245 | */ | ||
246 | typedef enum | ||
247 | { | ||
248 | HAL_UART_TX_HALFCOMPLETE_CB_ID = 0x00U, /*!< UART Tx Half Complete Callback ID */ | ||
249 | HAL_UART_TX_COMPLETE_CB_ID = 0x01U, /*!< UART Tx Complete Callback ID */ | ||
250 | HAL_UART_RX_HALFCOMPLETE_CB_ID = 0x02U, /*!< UART Rx Half Complete Callback ID */ | ||
251 | HAL_UART_RX_COMPLETE_CB_ID = 0x03U, /*!< UART Rx Complete Callback ID */ | ||
252 | HAL_UART_ERROR_CB_ID = 0x04U, /*!< UART Error Callback ID */ | ||
253 | HAL_UART_ABORT_COMPLETE_CB_ID = 0x05U, /*!< UART Abort Complete Callback ID */ | ||
254 | HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID = 0x06U, /*!< UART Abort Transmit Complete Callback ID */ | ||
255 | HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID = 0x07U, /*!< UART Abort Receive Complete Callback ID */ | ||
256 | HAL_UART_WAKEUP_CB_ID = 0x08U, /*!< UART Wakeup Callback ID */ | ||
257 | |||
258 | HAL_UART_MSPINIT_CB_ID = 0x0BU, /*!< UART MspInit callback ID */ | ||
259 | HAL_UART_MSPDEINIT_CB_ID = 0x0CU /*!< UART MspDeInit callback ID */ | ||
260 | |||
261 | } HAL_UART_CallbackIDTypeDef; | ||
262 | |||
263 | /** | ||
264 | * @brief HAL UART Callback pointer definition | ||
265 | */ | ||
266 | typedef void (*pUART_CallbackTypeDef)(UART_HandleTypeDef *huart); /*!< pointer to an UART callback function */ | ||
267 | |||
268 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ | ||
269 | |||
270 | /** | ||
271 | * @} | ||
272 | */ | ||
273 | |||
274 | /* Exported constants --------------------------------------------------------*/ | ||
275 | /** @defgroup UART_Exported_Constants UART Exported Constants | ||
276 | * @{ | ||
277 | */ | ||
278 | |||
279 | /** @defgroup UART_State_Definition UART State Code Definition | ||
280 | * @{ | ||
281 | */ | ||
282 | #define HAL_UART_STATE_RESET 0x00000000U /*!< Peripheral is not initialized | ||
283 | Value is allowed for gState and RxState */ | ||
284 | #define HAL_UART_STATE_READY 0x00000020U /*!< Peripheral Initialized and ready for use | ||
285 | Value is allowed for gState and RxState */ | ||
286 | #define HAL_UART_STATE_BUSY 0x00000024U /*!< an internal process is ongoing | ||
287 | Value is allowed for gState only */ | ||
288 | #define HAL_UART_STATE_BUSY_TX 0x00000021U /*!< Data Transmission process is ongoing | ||
289 | Value is allowed for gState only */ | ||
290 | #define HAL_UART_STATE_BUSY_RX 0x00000022U /*!< Data Reception process is ongoing | ||
291 | Value is allowed for RxState only */ | ||
292 | #define HAL_UART_STATE_BUSY_TX_RX 0x00000023U /*!< Data Transmission and Reception process is ongoing | ||
293 | Not to be used for neither gState nor RxState. | ||
294 | Value is result of combination (Or) between gState and RxState values */ | ||
295 | #define HAL_UART_STATE_TIMEOUT 0x000000A0U /*!< Timeout state | ||
296 | Value is allowed for gState only */ | ||
297 | #define HAL_UART_STATE_ERROR 0x000000E0U /*!< Error | ||
298 | Value is allowed for gState only */ | ||
299 | /** | ||
300 | * @} | ||
301 | */ | ||
302 | |||
303 | /** @defgroup UART_Error_Definition UART Error Definition | ||
304 | * @{ | ||
305 | */ | ||
306 | #define HAL_UART_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */ | ||
307 | #define HAL_UART_ERROR_PE ((uint32_t)0x00000001U) /*!< Parity error */ | ||
308 | #define HAL_UART_ERROR_NE ((uint32_t)0x00000002U) /*!< Noise error */ | ||
309 | #define HAL_UART_ERROR_FE ((uint32_t)0x00000004U) /*!< Frame error */ | ||
310 | #define HAL_UART_ERROR_ORE ((uint32_t)0x00000008U) /*!< Overrun error */ | ||
311 | #define HAL_UART_ERROR_DMA ((uint32_t)0x00000010U) /*!< DMA transfer error */ | ||
312 | #define HAL_UART_ERROR_RTO ((uint32_t)0x00000020U) /*!< Receiver Timeout error */ | ||
313 | |||
314 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) | ||
315 | #define HAL_UART_ERROR_INVALID_CALLBACK ((uint32_t)0x00000040U) /*!< Invalid Callback error */ | ||
316 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ | ||
317 | /** | ||
318 | * @} | ||
319 | */ | ||
320 | |||
321 | /** @defgroup UART_Stop_Bits UART Number of Stop Bits | ||
322 | * @{ | ||
323 | */ | ||
324 | #define UART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< UART frame with 0.5 stop bit */ | ||
325 | #define UART_STOPBITS_1 0x00000000U /*!< UART frame with 1 stop bit */ | ||
326 | #define UART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< UART frame with 1.5 stop bits */ | ||
327 | #define UART_STOPBITS_2 USART_CR2_STOP_1 /*!< UART frame with 2 stop bits */ | ||
328 | /** | ||
329 | * @} | ||
330 | */ | ||
331 | |||
332 | /** @defgroup UART_Parity UART Parity | ||
333 | * @{ | ||
334 | */ | ||
335 | #define UART_PARITY_NONE 0x00000000U /*!< No parity */ | ||
336 | #define UART_PARITY_EVEN USART_CR1_PCE /*!< Even parity */ | ||
337 | #define UART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Odd parity */ | ||
338 | /** | ||
339 | * @} | ||
340 | */ | ||
341 | |||
342 | /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control | ||
343 | * @{ | ||
344 | */ | ||
345 | #define UART_HWCONTROL_NONE 0x00000000U /*!< No hardware control */ | ||
346 | #define UART_HWCONTROL_RTS USART_CR3_RTSE /*!< Request To Send */ | ||
347 | #define UART_HWCONTROL_CTS USART_CR3_CTSE /*!< Clear To Send */ | ||
348 | #define UART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< Request and Clear To Send */ | ||
349 | /** | ||
350 | * @} | ||
351 | */ | ||
352 | |||
353 | /** @defgroup UART_Mode UART Transfer Mode | ||
354 | * @{ | ||
355 | */ | ||
356 | #define UART_MODE_RX USART_CR1_RE /*!< RX mode */ | ||
357 | #define UART_MODE_TX USART_CR1_TE /*!< TX mode */ | ||
358 | #define UART_MODE_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< RX and TX mode */ | ||
359 | /** | ||
360 | * @} | ||
361 | */ | ||
362 | |||
363 | /** @defgroup UART_State UART State | ||
364 | * @{ | ||
365 | */ | ||
366 | #define UART_STATE_DISABLE 0x00000000U /*!< UART disabled */ | ||
367 | #define UART_STATE_ENABLE USART_CR1_UE /*!< UART enabled */ | ||
368 | /** | ||
369 | * @} | ||
370 | */ | ||
371 | |||
372 | /** @defgroup UART_Over_Sampling UART Over Sampling | ||
373 | * @{ | ||
374 | */ | ||
375 | #define UART_OVERSAMPLING_16 0x00000000U /*!< Oversampling by 16 */ | ||
376 | #define UART_OVERSAMPLING_8 USART_CR1_OVER8 /*!< Oversampling by 8 */ | ||
377 | /** | ||
378 | * @} | ||
379 | */ | ||
380 | |||
381 | /** @defgroup UART_OneBit_Sampling UART One Bit Sampling Method | ||
382 | * @{ | ||
383 | */ | ||
384 | #define UART_ONE_BIT_SAMPLE_DISABLE 0x00000000U /*!< One-bit sampling disable */ | ||
385 | #define UART_ONE_BIT_SAMPLE_ENABLE USART_CR3_ONEBIT /*!< One-bit sampling enable */ | ||
386 | /** | ||
387 | * @} | ||
388 | */ | ||
389 | |||
390 | /** @defgroup UART_AutoBaud_Rate_Mode UART Advanced Feature AutoBaud Rate Mode | ||
391 | * @{ | ||
392 | */ | ||
393 | #define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT 0x00000000U /*!< Auto Baud rate detection on start bit */ | ||
394 | #define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE USART_CR2_ABRMODE_0 /*!< Auto Baud rate detection on falling edge */ | ||
395 | #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME USART_CR2_ABRMODE_1 /*!< Auto Baud rate detection on 0x7F frame detection */ | ||
396 | #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME USART_CR2_ABRMODE /*!< Auto Baud rate detection on 0x55 frame detection */ | ||
397 | /** | ||
398 | * @} | ||
399 | */ | ||
400 | |||
401 | /** @defgroup UART_Receiver_Timeout UART Receiver Timeout | ||
402 | * @{ | ||
403 | */ | ||
404 | #define UART_RECEIVER_TIMEOUT_DISABLE 0x00000000U /*!< UART Receiver Timeout disable */ | ||
405 | #define UART_RECEIVER_TIMEOUT_ENABLE USART_CR2_RTOEN /*!< UART Receiver Timeout enable */ | ||
406 | /** | ||
407 | * @} | ||
408 | */ | ||
409 | |||
410 | /** @defgroup UART_LIN UART Local Interconnection Network mode | ||
411 | * @{ | ||
412 | */ | ||
413 | #define UART_LIN_DISABLE 0x00000000U /*!< Local Interconnect Network disable */ | ||
414 | #define UART_LIN_ENABLE USART_CR2_LINEN /*!< Local Interconnect Network enable */ | ||
415 | /** | ||
416 | * @} | ||
417 | */ | ||
418 | |||
419 | /** @defgroup UART_LIN_Break_Detection UART LIN Break Detection | ||
420 | * @{ | ||
421 | */ | ||
422 | #define UART_LINBREAKDETECTLENGTH_10B 0x00000000U /*!< LIN 10-bit break detection length */ | ||
423 | #define UART_LINBREAKDETECTLENGTH_11B USART_CR2_LBDL /*!< LIN 11-bit break detection length */ | ||
424 | /** | ||
425 | * @} | ||
426 | */ | ||
427 | |||
428 | /** @defgroup UART_DMA_Tx UART DMA Tx | ||
429 | * @{ | ||
430 | */ | ||
431 | #define UART_DMA_TX_DISABLE 0x00000000U /*!< UART DMA TX disabled */ | ||
432 | #define UART_DMA_TX_ENABLE USART_CR3_DMAT /*!< UART DMA TX enabled */ | ||
433 | /** | ||
434 | * @} | ||
435 | */ | ||
436 | |||
437 | /** @defgroup UART_DMA_Rx UART DMA Rx | ||
438 | * @{ | ||
439 | */ | ||
440 | #define UART_DMA_RX_DISABLE 0x00000000U /*!< UART DMA RX disabled */ | ||
441 | #define UART_DMA_RX_ENABLE USART_CR3_DMAR /*!< UART DMA RX enabled */ | ||
442 | /** | ||
443 | * @} | ||
444 | */ | ||
445 | |||
446 | /** @defgroup UART_Half_Duplex_Selection UART Half Duplex Selection | ||
447 | * @{ | ||
448 | */ | ||
449 | #define UART_HALF_DUPLEX_DISABLE 0x00000000U /*!< UART half-duplex disabled */ | ||
450 | #define UART_HALF_DUPLEX_ENABLE USART_CR3_HDSEL /*!< UART half-duplex enabled */ | ||
451 | /** | ||
452 | * @} | ||
453 | */ | ||
454 | |||
455 | /** @defgroup UART_WakeUp_Methods UART WakeUp Methods | ||
456 | * @{ | ||
457 | */ | ||
458 | #define UART_WAKEUPMETHOD_IDLELINE 0x00000000U /*!< UART wake-up on idle line */ | ||
459 | #define UART_WAKEUPMETHOD_ADDRESSMARK USART_CR1_WAKE /*!< UART wake-up on address mark */ | ||
460 | /** | ||
461 | * @} | ||
462 | */ | ||
463 | |||
464 | /** @defgroup UART_Request_Parameters UART Request Parameters | ||
465 | * @{ | ||
466 | */ | ||
467 | #define UART_AUTOBAUD_REQUEST USART_RQR_ABRRQ /*!< Auto-Baud Rate Request */ | ||
468 | #define UART_SENDBREAK_REQUEST USART_RQR_SBKRQ /*!< Send Break Request */ | ||
469 | #define UART_MUTE_MODE_REQUEST USART_RQR_MMRQ /*!< Mute Mode Request */ | ||
470 | #define UART_RXDATA_FLUSH_REQUEST USART_RQR_RXFRQ /*!< Receive Data flush Request */ | ||
471 | #define UART_TXDATA_FLUSH_REQUEST USART_RQR_TXFRQ /*!< Transmit data flush Request */ | ||
472 | /** | ||
473 | * @} | ||
474 | */ | ||
475 | |||
476 | /** @defgroup UART_Advanced_Features_Initialization_Type UART Advanced Feature Initialization Type | ||
477 | * @{ | ||
478 | */ | ||
479 | #define UART_ADVFEATURE_NO_INIT 0x00000000U /*!< No advanced feature initialization */ | ||
480 | #define UART_ADVFEATURE_TXINVERT_INIT 0x00000001U /*!< TX pin active level inversion */ | ||
481 | #define UART_ADVFEATURE_RXINVERT_INIT 0x00000002U /*!< RX pin active level inversion */ | ||
482 | #define UART_ADVFEATURE_DATAINVERT_INIT 0x00000004U /*!< Binary data inversion */ | ||
483 | #define UART_ADVFEATURE_SWAP_INIT 0x00000008U /*!< TX/RX pins swap */ | ||
484 | #define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT 0x00000010U /*!< RX overrun disable */ | ||
485 | #define UART_ADVFEATURE_DMADISABLEONERROR_INIT 0x00000020U /*!< DMA disable on Reception Error */ | ||
486 | #define UART_ADVFEATURE_AUTOBAUDRATE_INIT 0x00000040U /*!< Auto Baud rate detection initialization */ | ||
487 | #define UART_ADVFEATURE_MSBFIRST_INIT 0x00000080U /*!< Most significant bit sent/received first */ | ||
488 | /** | ||
489 | * @} | ||
490 | */ | ||
491 | |||
492 | /** @defgroup UART_Tx_Inv UART Advanced Feature TX Pin Active Level Inversion | ||
493 | * @{ | ||
494 | */ | ||
495 | #define UART_ADVFEATURE_TXINV_DISABLE 0x00000000U /*!< TX pin active level inversion disable */ | ||
496 | #define UART_ADVFEATURE_TXINV_ENABLE USART_CR2_TXINV /*!< TX pin active level inversion enable */ | ||
497 | /** | ||
498 | * @} | ||
499 | */ | ||
500 | |||
501 | /** @defgroup UART_Rx_Inv UART Advanced Feature RX Pin Active Level Inversion | ||
502 | * @{ | ||
503 | */ | ||
504 | #define UART_ADVFEATURE_RXINV_DISABLE 0x00000000U /*!< RX pin active level inversion disable */ | ||
505 | #define UART_ADVFEATURE_RXINV_ENABLE USART_CR2_RXINV /*!< RX pin active level inversion enable */ | ||
506 | /** | ||
507 | * @} | ||
508 | */ | ||
509 | |||
510 | /** @defgroup UART_Data_Inv UART Advanced Feature Binary Data Inversion | ||
511 | * @{ | ||
512 | */ | ||
513 | #define UART_ADVFEATURE_DATAINV_DISABLE 0x00000000U /*!< Binary data inversion disable */ | ||
514 | #define UART_ADVFEATURE_DATAINV_ENABLE USART_CR2_DATAINV /*!< Binary data inversion enable */ | ||
515 | /** | ||
516 | * @} | ||
517 | */ | ||
518 | |||
519 | /** @defgroup UART_Rx_Tx_Swap UART Advanced Feature RX TX Pins Swap | ||
520 | * @{ | ||
521 | */ | ||
522 | #define UART_ADVFEATURE_SWAP_DISABLE 0x00000000U /*!< TX/RX pins swap disable */ | ||
523 | #define UART_ADVFEATURE_SWAP_ENABLE USART_CR2_SWAP /*!< TX/RX pins swap enable */ | ||
524 | /** | ||
525 | * @} | ||
526 | */ | ||
527 | |||
528 | /** @defgroup UART_Overrun_Disable UART Advanced Feature Overrun Disable | ||
529 | * @{ | ||
530 | */ | ||
531 | #define UART_ADVFEATURE_OVERRUN_ENABLE 0x00000000U /*!< RX overrun enable */ | ||
532 | #define UART_ADVFEATURE_OVERRUN_DISABLE USART_CR3_OVRDIS /*!< RX overrun disable */ | ||
533 | /** | ||
534 | * @} | ||
535 | */ | ||
536 | |||
537 | /** @defgroup UART_AutoBaudRate_Enable UART Advanced Feature Auto BaudRate Enable | ||
538 | * @{ | ||
539 | */ | ||
540 | #define UART_ADVFEATURE_AUTOBAUDRATE_DISABLE 0x00000000U /*!< RX Auto Baud rate detection enable */ | ||
541 | #define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE USART_CR2_ABREN /*!< RX Auto Baud rate detection disable */ | ||
542 | /** | ||
543 | * @} | ||
544 | */ | ||
545 | |||
546 | /** @defgroup UART_DMA_Disable_on_Rx_Error UART Advanced Feature DMA Disable On Rx Error | ||
547 | * @{ | ||
548 | */ | ||
549 | #define UART_ADVFEATURE_DMA_ENABLEONRXERROR 0x00000000U /*!< DMA enable on Reception Error */ | ||
550 | #define UART_ADVFEATURE_DMA_DISABLEONRXERROR USART_CR3_DDRE /*!< DMA disable on Reception Error */ | ||
551 | /** | ||
552 | * @} | ||
553 | */ | ||
554 | |||
555 | /** @defgroup UART_MSB_First UART Advanced Feature MSB First | ||
556 | * @{ | ||
557 | */ | ||
558 | #define UART_ADVFEATURE_MSBFIRST_DISABLE 0x00000000U /*!< Most significant bit sent/received first disable */ | ||
559 | #define UART_ADVFEATURE_MSBFIRST_ENABLE USART_CR2_MSBFIRST /*!< Most significant bit sent/received first enable */ | ||
560 | /** | ||
561 | * @} | ||
562 | */ | ||
563 | #if defined(USART_CR1_UESM) | ||
564 | |||
565 | /** @defgroup UART_Stop_Mode_Enable UART Advanced Feature Stop Mode Enable | ||
566 | * @{ | ||
567 | */ | ||
568 | #define UART_ADVFEATURE_STOPMODE_DISABLE 0x00000000U /*!< UART stop mode disable */ | ||
569 | #define UART_ADVFEATURE_STOPMODE_ENABLE USART_CR1_UESM /*!< UART stop mode enable */ | ||
570 | /** | ||
571 | * @} | ||
572 | */ | ||
573 | #endif /* USART_CR1_UESM */ | ||
574 | |||
575 | /** @defgroup UART_Mute_Mode UART Advanced Feature Mute Mode Enable | ||
576 | * @{ | ||
577 | */ | ||
578 | #define UART_ADVFEATURE_MUTEMODE_DISABLE 0x00000000U /*!< UART mute mode disable */ | ||
579 | #define UART_ADVFEATURE_MUTEMODE_ENABLE USART_CR1_MME /*!< UART mute mode enable */ | ||
580 | /** | ||
581 | * @} | ||
582 | */ | ||
583 | |||
584 | /** @defgroup UART_CR2_ADDRESS_LSB_POS UART Address-matching LSB Position In CR2 Register | ||
585 | * @{ | ||
586 | */ | ||
587 | #define UART_CR2_ADDRESS_LSB_POS 24U /*!< UART address-matching LSB position in CR2 register */ | ||
588 | /** | ||
589 | * @} | ||
590 | */ | ||
591 | #if defined(USART_CR1_UESM) | ||
592 | |||
593 | /** @defgroup UART_WakeUp_from_Stop_Selection UART WakeUp From Stop Selection | ||
594 | * @{ | ||
595 | */ | ||
596 | #define UART_WAKEUP_ON_ADDRESS 0x00000000U /*!< UART wake-up on address */ | ||
597 | #define UART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1 /*!< UART wake-up on start bit */ | ||
598 | #define UART_WAKEUP_ON_READDATA_NONEMPTY USART_CR3_WUS /*!< UART wake-up on receive data register not empty or RXFIFO is not empty */ | ||
599 | /** | ||
600 | * @} | ||
601 | */ | ||
602 | #endif /* USART_CR1_UESM */ | ||
603 | |||
604 | /** @defgroup UART_DriverEnable_Polarity UART DriverEnable Polarity | ||
605 | * @{ | ||
606 | */ | ||
607 | #define UART_DE_POLARITY_HIGH 0x00000000U /*!< Driver enable signal is active high */ | ||
608 | #define UART_DE_POLARITY_LOW USART_CR3_DEP /*!< Driver enable signal is active low */ | ||
609 | /** | ||
610 | * @} | ||
611 | */ | ||
612 | |||
613 | /** @defgroup UART_CR1_DEAT_ADDRESS_LSB_POS UART Driver Enable Assertion Time LSB Position In CR1 Register | ||
614 | * @{ | ||
615 | */ | ||
616 | #define UART_CR1_DEAT_ADDRESS_LSB_POS 21U /*!< UART Driver Enable assertion time LSB position in CR1 register */ | ||
617 | /** | ||
618 | * @} | ||
619 | */ | ||
620 | |||
621 | /** @defgroup UART_CR1_DEDT_ADDRESS_LSB_POS UART Driver Enable DeAssertion Time LSB Position In CR1 Register | ||
622 | * @{ | ||
623 | */ | ||
624 | #define UART_CR1_DEDT_ADDRESS_LSB_POS 16U /*!< UART Driver Enable de-assertion time LSB position in CR1 register */ | ||
625 | /** | ||
626 | * @} | ||
627 | */ | ||
628 | |||
629 | /** @defgroup UART_Interruption_Mask UART Interruptions Flag Mask | ||
630 | * @{ | ||
631 | */ | ||
632 | #define UART_IT_MASK 0x001FU /*!< UART interruptions flags mask */ | ||
633 | /** | ||
634 | * @} | ||
635 | */ | ||
636 | |||
637 | /** @defgroup UART_TimeOut_Value UART polling-based communications time-out value | ||
638 | * @{ | ||
639 | */ | ||
640 | #define HAL_UART_TIMEOUT_VALUE 0x1FFFFFFU /*!< UART polling-based communications time-out value */ | ||
641 | /** | ||
642 | * @} | ||
643 | */ | ||
644 | |||
645 | /** @defgroup UART_Flags UART Status Flags | ||
646 | * Elements values convention: 0xXXXX | ||
647 | * - 0xXXXX : Flag mask in the ISR register | ||
648 | * @{ | ||
649 | */ | ||
650 | #define UART_FLAG_REACK USART_ISR_REACK /*!< UART receive enable acknowledge flag */ | ||
651 | #define UART_FLAG_TEACK USART_ISR_TEACK /*!< UART transmit enable acknowledge flag */ | ||
652 | #if defined(USART_CR1_UESM) | ||
653 | #define UART_FLAG_WUF USART_ISR_WUF /*!< UART wake-up from stop mode flag */ | ||
654 | #endif /* USART_CR1_UESM */ | ||
655 | #define UART_FLAG_RWU USART_ISR_RWU /*!< UART receiver wake-up from mute mode flag */ | ||
656 | #define UART_FLAG_SBKF USART_ISR_SBKF /*!< UART send break flag */ | ||
657 | #define UART_FLAG_CMF USART_ISR_CMF /*!< UART character match flag */ | ||
658 | #define UART_FLAG_BUSY USART_ISR_BUSY /*!< UART busy flag */ | ||
659 | #define UART_FLAG_ABRF USART_ISR_ABRF /*!< UART auto Baud rate flag */ | ||
660 | #define UART_FLAG_ABRE USART_ISR_ABRE /*!< UART auto Baud rate error */ | ||
661 | #define UART_FLAG_RTOF USART_ISR_RTOF /*!< UART receiver timeout flag */ | ||
662 | #define UART_FLAG_CTS USART_ISR_CTS /*!< UART clear to send flag */ | ||
663 | #define UART_FLAG_CTSIF USART_ISR_CTSIF /*!< UART clear to send interrupt flag */ | ||
664 | #define UART_FLAG_LBDF USART_ISR_LBDF /*!< UART LIN break detection flag */ | ||
665 | #define UART_FLAG_TXE USART_ISR_TXE /*!< UART transmit data register empty */ | ||
666 | #define UART_FLAG_TC USART_ISR_TC /*!< UART transmission complete */ | ||
667 | #define UART_FLAG_RXNE USART_ISR_RXNE /*!< UART read data register not empty */ | ||
668 | #define UART_FLAG_IDLE USART_ISR_IDLE /*!< UART idle flag */ | ||
669 | #define UART_FLAG_ORE USART_ISR_ORE /*!< UART overrun error */ | ||
670 | #define UART_FLAG_NE USART_ISR_NE /*!< UART noise error */ | ||
671 | #define UART_FLAG_FE USART_ISR_FE /*!< UART frame error */ | ||
672 | #define UART_FLAG_PE USART_ISR_PE /*!< UART parity error */ | ||
673 | /** | ||
674 | * @} | ||
675 | */ | ||
676 | |||
677 | /** @defgroup UART_Interrupt_definition UART Interrupts Definition | ||
678 | * Elements values convention: 000ZZZZZ0XXYYYYYb | ||
679 | * - YYYYY : Interrupt source position in the XX register (5bits) | ||
680 | * - XX : Interrupt source register (2bits) | ||
681 | * - 01: CR1 register | ||
682 | * - 10: CR2 register | ||
683 | * - 11: CR3 register | ||
684 | * - ZZZZZ : Flag position in the ISR register(5bits) | ||
685 | * Elements values convention: 000000000XXYYYYYb | ||
686 | * - YYYYY : Interrupt source position in the XX register (5bits) | ||
687 | * - XX : Interrupt source register (2bits) | ||
688 | * - 01: CR1 register | ||
689 | * - 10: CR2 register | ||
690 | * - 11: CR3 register | ||
691 | * Elements values convention: 0000ZZZZ00000000b | ||
692 | * - ZZZZ : Flag position in the ISR register(4bits) | ||
693 | * @{ | ||
694 | */ | ||
695 | #define UART_IT_PE 0x0028U /*!< UART parity error interruption */ | ||
696 | #define UART_IT_TXE 0x0727U /*!< UART transmit data register empty interruption */ | ||
697 | #define UART_IT_TC 0x0626U /*!< UART transmission complete interruption */ | ||
698 | #define UART_IT_RXNE 0x0525U /*!< UART read data register not empty interruption */ | ||
699 | #define UART_IT_IDLE 0x0424U /*!< UART idle interruption */ | ||
700 | #define UART_IT_LBD 0x0846U /*!< UART LIN break detection interruption */ | ||
701 | #define UART_IT_CTS 0x096AU /*!< UART CTS interruption */ | ||
702 | #define UART_IT_CM 0x112EU /*!< UART character match interruption */ | ||
703 | #if defined(USART_CR1_UESM) | ||
704 | #define UART_IT_WUF 0x1476U /*!< UART wake-up from stop mode interruption */ | ||
705 | #endif /* USART_CR1_UESM */ | ||
706 | #define UART_IT_RTO 0x0B3AU /*!< UART receiver timeout interruption */ | ||
707 | |||
708 | #define UART_IT_ERR 0x0060U /*!< UART error interruption */ | ||
709 | |||
710 | #define UART_IT_ORE 0x0300U /*!< UART overrun error interruption */ | ||
711 | #define UART_IT_NE 0x0200U /*!< UART noise error interruption */ | ||
712 | #define UART_IT_FE 0x0100U /*!< UART frame error interruption */ | ||
713 | /** | ||
714 | * @} | ||
715 | */ | ||
716 | |||
717 | /** @defgroup UART_IT_CLEAR_Flags UART Interruption Clear Flags | ||
718 | * @{ | ||
719 | */ | ||
720 | #define UART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */ | ||
721 | #define UART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */ | ||
722 | #define UART_CLEAR_NEF USART_ICR_NCF /*!< Noise Error detected Clear Flag */ | ||
723 | #define UART_CLEAR_OREF USART_ICR_ORECF /*!< Overrun Error Clear Flag */ | ||
724 | #define UART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */ | ||
725 | #define UART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */ | ||
726 | #define UART_CLEAR_LBDF USART_ICR_LBDCF /*!< LIN Break Detection Clear Flag */ | ||
727 | #define UART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */ | ||
728 | #define UART_CLEAR_CMF USART_ICR_CMCF /*!< Character Match Clear Flag */ | ||
729 | #if defined(USART_CR1_UESM) | ||
730 | #define UART_CLEAR_WUF USART_ICR_WUCF /*!< Wake Up from stop mode Clear Flag */ | ||
731 | #endif /* USART_CR1_UESM */ | ||
732 | #define UART_CLEAR_RTOF USART_ICR_RTOCF /*!< UART receiver timeout clear flag */ | ||
733 | /** | ||
734 | * @} | ||
735 | */ | ||
736 | |||
737 | |||
738 | /** | ||
739 | * @} | ||
740 | */ | ||
741 | |||
742 | /* Exported macros -----------------------------------------------------------*/ | ||
743 | /** @defgroup UART_Exported_Macros UART Exported Macros | ||
744 | * @{ | ||
745 | */ | ||
746 | |||
747 | /** @brief Reset UART handle states. | ||
748 | * @param __HANDLE__ UART handle. | ||
749 | * @retval None | ||
750 | */ | ||
751 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) | ||
752 | #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ | ||
753 | (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ | ||
754 | (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ | ||
755 | (__HANDLE__)->MspInitCallback = NULL; \ | ||
756 | (__HANDLE__)->MspDeInitCallback = NULL; \ | ||
757 | } while(0U) | ||
758 | #else | ||
759 | #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ | ||
760 | (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ | ||
761 | (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ | ||
762 | } while(0U) | ||
763 | #endif /*USE_HAL_UART_REGISTER_CALLBACKS */ | ||
764 | |||
765 | /** @brief Flush the UART Data registers. | ||
766 | * @param __HANDLE__ specifies the UART Handle. | ||
767 | * @retval None | ||
768 | */ | ||
769 | #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \ | ||
770 | do{ \ | ||
771 | SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \ | ||
772 | SET_BIT((__HANDLE__)->Instance->RQR, UART_TXDATA_FLUSH_REQUEST); \ | ||
773 | } while(0U) | ||
774 | |||
775 | /** @brief Clear the specified UART pending flag. | ||
776 | * @param __HANDLE__ specifies the UART Handle. | ||
777 | * @param __FLAG__ specifies the flag to check. | ||
778 | * This parameter can be any combination of the following values: | ||
779 | * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag | ||
780 | * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag | ||
781 | * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag | ||
782 | * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag | ||
783 | * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag | ||
784 | * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag | ||
785 | * @arg @ref UART_CLEAR_RTOF Receiver Timeout clear flag | ||
786 | * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag | ||
787 | * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag | ||
788 | * @arg @ref UART_CLEAR_CMF Character Match Clear Flag | ||
789 | #if defined(USART_CR1_UESM) | ||
790 | * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag | ||
791 | #endif | ||
792 | * @retval None | ||
793 | */ | ||
794 | #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) | ||
795 | |||
796 | /** @brief Clear the UART PE pending flag. | ||
797 | * @param __HANDLE__ specifies the UART Handle. | ||
798 | * @retval None | ||
799 | */ | ||
800 | #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_PEF) | ||
801 | |||
802 | /** @brief Clear the UART FE pending flag. | ||
803 | * @param __HANDLE__ specifies the UART Handle. | ||
804 | * @retval None | ||
805 | */ | ||
806 | #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_FEF) | ||
807 | |||
808 | /** @brief Clear the UART NE pending flag. | ||
809 | * @param __HANDLE__ specifies the UART Handle. | ||
810 | * @retval None | ||
811 | */ | ||
812 | #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_NEF) | ||
813 | |||
814 | /** @brief Clear the UART ORE pending flag. | ||
815 | * @param __HANDLE__ specifies the UART Handle. | ||
816 | * @retval None | ||
817 | */ | ||
818 | #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_OREF) | ||
819 | |||
820 | /** @brief Clear the UART IDLE pending flag. | ||
821 | * @param __HANDLE__ specifies the UART Handle. | ||
822 | * @retval None | ||
823 | */ | ||
824 | #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_IDLEF) | ||
825 | |||
826 | |||
827 | /** @brief Check whether the specified UART flag is set or not. | ||
828 | * @param __HANDLE__ specifies the UART Handle. | ||
829 | * @param __FLAG__ specifies the flag to check. | ||
830 | * This parameter can be one of the following values: | ||
831 | * @arg @ref UART_FLAG_REACK Receive enable acknowledge flag | ||
832 | * @arg @ref UART_FLAG_TEACK Transmit enable acknowledge flag | ||
833 | #if defined(USART_CR1_UESM) | ||
834 | * @arg @ref UART_FLAG_WUF Wake up from stop mode flag | ||
835 | #endif | ||
836 | * @arg @ref UART_FLAG_RWU Receiver wake up flag (if the UART in mute mode) | ||
837 | * @arg @ref UART_FLAG_SBKF Send Break flag | ||
838 | * @arg @ref UART_FLAG_CMF Character match flag | ||
839 | * @arg @ref UART_FLAG_BUSY Busy flag | ||
840 | * @arg @ref UART_FLAG_ABRF Auto Baud rate detection flag | ||
841 | * @arg @ref UART_FLAG_ABRE Auto Baud rate detection error flag | ||
842 | * @arg @ref UART_FLAG_CTS CTS Change flag | ||
843 | * @arg @ref UART_FLAG_LBDF LIN Break detection flag | ||
844 | * @arg @ref UART_FLAG_TXE Transmit data register empty flag | ||
845 | * @arg @ref UART_FLAG_TC Transmission Complete flag | ||
846 | * @arg @ref UART_FLAG_RXNE Receive data register not empty flag | ||
847 | * @arg @ref UART_FLAG_RTOF Receiver Timeout flag | ||
848 | * @arg @ref UART_FLAG_IDLE Idle Line detection flag | ||
849 | * @arg @ref UART_FLAG_ORE Overrun Error flag | ||
850 | * @arg @ref UART_FLAG_NE Noise Error flag | ||
851 | * @arg @ref UART_FLAG_FE Framing Error flag | ||
852 | * @arg @ref UART_FLAG_PE Parity Error flag | ||
853 | * @retval The new state of __FLAG__ (TRUE or FALSE). | ||
854 | */ | ||
855 | #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) | ||
856 | |||
857 | /** @brief Enable the specified UART interrupt. | ||
858 | * @param __HANDLE__ specifies the UART Handle. | ||
859 | * @param __INTERRUPT__ specifies the UART interrupt source to enable. | ||
860 | * This parameter can be one of the following values: | ||
861 | #if defined(USART_CR1_UESM) | ||
862 | * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt | ||
863 | #endif | ||
864 | * @arg @ref UART_IT_CM Character match interrupt | ||
865 | * @arg @ref UART_IT_CTS CTS change interrupt | ||
866 | * @arg @ref UART_IT_LBD LIN Break detection interrupt | ||
867 | * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt | ||
868 | * @arg @ref UART_IT_TC Transmission complete interrupt | ||
869 | * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt | ||
870 | * @arg @ref UART_IT_RTO Receive Timeout interrupt | ||
871 | * @arg @ref UART_IT_IDLE Idle line detection interrupt | ||
872 | * @arg @ref UART_IT_PE Parity Error interrupt | ||
873 | * @arg @ref UART_IT_ERR Error interrupt (frame error, noise error, overrun error) | ||
874 | * @retval None | ||
875 | */ | ||
876 | #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \ | ||
877 | ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \ | ||
878 | ((__HANDLE__)->Instance->CR3 |= (1U << ((__INTERRUPT__) & UART_IT_MASK)))) | ||
879 | |||
880 | |||
881 | /** @brief Disable the specified UART interrupt. | ||
882 | * @param __HANDLE__ specifies the UART Handle. | ||
883 | * @param __INTERRUPT__ specifies the UART interrupt source to disable. | ||
884 | * This parameter can be one of the following values: | ||
885 | #if defined(USART_CR1_UESM) | ||
886 | * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt | ||
887 | #endif | ||
888 | * @arg @ref UART_IT_CM Character match interrupt | ||
889 | * @arg @ref UART_IT_CTS CTS change interrupt | ||
890 | * @arg @ref UART_IT_LBD LIN Break detection interrupt | ||
891 | * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt | ||
892 | * @arg @ref UART_IT_TC Transmission complete interrupt | ||
893 | * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt | ||
894 | * @arg @ref UART_IT_RTO Receive Timeout interrupt | ||
895 | * @arg @ref UART_IT_IDLE Idle line detection interrupt | ||
896 | * @arg @ref UART_IT_PE Parity Error interrupt | ||
897 | * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) | ||
898 | * @retval None | ||
899 | */ | ||
900 | #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \ | ||
901 | ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \ | ||
902 | ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK)))) | ||
903 | |||
904 | /** @brief Check whether the specified UART interrupt has occurred or not. | ||
905 | * @param __HANDLE__ specifies the UART Handle. | ||
906 | * @param __INTERRUPT__ specifies the UART interrupt to check. | ||
907 | * This parameter can be one of the following values: | ||
908 | #if defined(USART_CR1_UESM) | ||
909 | * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt | ||
910 | #endif | ||
911 | * @arg @ref UART_IT_CM Character match interrupt | ||
912 | * @arg @ref UART_IT_CTS CTS change interrupt | ||
913 | * @arg @ref UART_IT_LBD LIN Break detection interrupt | ||
914 | * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt | ||
915 | * @arg @ref UART_IT_TC Transmission complete interrupt | ||
916 | * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt | ||
917 | * @arg @ref UART_IT_RTO Receive Timeout interrupt | ||
918 | * @arg @ref UART_IT_IDLE Idle line detection interrupt | ||
919 | * @arg @ref UART_IT_PE Parity Error interrupt | ||
920 | * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) | ||
921 | * @retval The new state of __INTERRUPT__ (SET or RESET). | ||
922 | */ | ||
923 | #define __HAL_UART_GET_IT(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISR\ | ||
924 | & (1U << ((__INTERRUPT__)>> 8U))) != RESET) ? SET : RESET) | ||
925 | |||
926 | /** @brief Check whether the specified UART interrupt source is enabled or not. | ||
927 | * @param __HANDLE__ specifies the UART Handle. | ||
928 | * @param __INTERRUPT__ specifies the UART interrupt source to check. | ||
929 | * This parameter can be one of the following values: | ||
930 | #if defined(USART_CR1_UESM) | ||
931 | * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt | ||
932 | #endif | ||
933 | * @arg @ref UART_IT_CM Character match interrupt | ||
934 | * @arg @ref UART_IT_CTS CTS change interrupt | ||
935 | * @arg @ref UART_IT_LBD LIN Break detection interrupt | ||
936 | * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt | ||
937 | * @arg @ref UART_IT_TC Transmission complete interrupt | ||
938 | * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt | ||
939 | * @arg @ref UART_IT_RTO Receive Timeout interrupt | ||
940 | * @arg @ref UART_IT_IDLE Idle line detection interrupt | ||
941 | * @arg @ref UART_IT_PE Parity Error interrupt | ||
942 | * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) | ||
943 | * @retval The new state of __INTERRUPT__ (SET or RESET). | ||
944 | */ | ||
945 | #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U) ? (__HANDLE__)->Instance->CR1 : \ | ||
946 | (((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U) ? (__HANDLE__)->Instance->CR2 : \ | ||
947 | (__HANDLE__)->Instance->CR3)) & (1U << (((uint16_t)(__INTERRUPT__)) & UART_IT_MASK))) != RESET) ? SET : RESET) | ||
948 | |||
949 | /** @brief Clear the specified UART ISR flag, in setting the proper ICR register flag. | ||
950 | * @param __HANDLE__ specifies the UART Handle. | ||
951 | * @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set | ||
952 | * to clear the corresponding interrupt | ||
953 | * This parameter can be one of the following values: | ||
954 | * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag | ||
955 | * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag | ||
956 | * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag | ||
957 | * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag | ||
958 | * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag | ||
959 | * @arg @ref UART_CLEAR_RTOF Receiver timeout clear flag | ||
960 | * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag | ||
961 | * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag | ||
962 | * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag | ||
963 | * @arg @ref UART_CLEAR_CMF Character Match Clear Flag | ||
964 | #if defined(USART_CR1_UESM) | ||
965 | * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag | ||
966 | #endif | ||
967 | * @retval None | ||
968 | */ | ||
969 | #define __HAL_UART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__)) | ||
970 | |||
971 | /** @brief Set a specific UART request flag. | ||
972 | * @param __HANDLE__ specifies the UART Handle. | ||
973 | * @param __REQ__ specifies the request flag to set | ||
974 | * This parameter can be one of the following values: | ||
975 | * @arg @ref UART_AUTOBAUD_REQUEST Auto-Baud Rate Request | ||
976 | * @arg @ref UART_SENDBREAK_REQUEST Send Break Request | ||
977 | * @arg @ref UART_MUTE_MODE_REQUEST Mute Mode Request | ||
978 | * @arg @ref UART_RXDATA_FLUSH_REQUEST Receive Data flush Request | ||
979 | * @arg @ref UART_TXDATA_FLUSH_REQUEST Transmit data flush Request | ||
980 | * @retval None | ||
981 | */ | ||
982 | #define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint16_t)(__REQ__)) | ||
983 | |||
984 | /** @brief Enable the UART one bit sample method. | ||
985 | * @param __HANDLE__ specifies the UART Handle. | ||
986 | * @retval None | ||
987 | */ | ||
988 | #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT) | ||
989 | |||
990 | /** @brief Disable the UART one bit sample method. | ||
991 | * @param __HANDLE__ specifies the UART Handle. | ||
992 | * @retval None | ||
993 | */ | ||
994 | #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= ~USART_CR3_ONEBIT) | ||
995 | |||
996 | /** @brief Enable UART. | ||
997 | * @param __HANDLE__ specifies the UART Handle. | ||
998 | * @retval None | ||
999 | */ | ||
1000 | #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) | ||
1001 | |||
1002 | /** @brief Disable UART. | ||
1003 | * @param __HANDLE__ specifies the UART Handle. | ||
1004 | * @retval None | ||
1005 | */ | ||
1006 | #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) | ||
1007 | |||
1008 | /** @brief Enable CTS flow control. | ||
1009 | * @note This macro allows to enable CTS hardware flow control for a given UART instance, | ||
1010 | * without need to call HAL_UART_Init() function. | ||
1011 | * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. | ||
1012 | * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need | ||
1013 | * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : | ||
1014 | * - UART instance should have already been initialised (through call of HAL_UART_Init() ) | ||
1015 | * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__)) | ||
1016 | * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). | ||
1017 | * @param __HANDLE__ specifies the UART Handle. | ||
1018 | * @retval None | ||
1019 | */ | ||
1020 | #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \ | ||
1021 | do{ \ | ||
1022 | SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ | ||
1023 | (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \ | ||
1024 | } while(0U) | ||
1025 | |||
1026 | /** @brief Disable CTS flow control. | ||
1027 | * @note This macro allows to disable CTS hardware flow control for a given UART instance, | ||
1028 | * without need to call HAL_UART_Init() function. | ||
1029 | * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. | ||
1030 | * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need | ||
1031 | * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : | ||
1032 | * - UART instance should have already been initialised (through call of HAL_UART_Init() ) | ||
1033 | * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__)) | ||
1034 | * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). | ||
1035 | * @param __HANDLE__ specifies the UART Handle. | ||
1036 | * @retval None | ||
1037 | */ | ||
1038 | #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \ | ||
1039 | do{ \ | ||
1040 | CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ | ||
1041 | (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \ | ||
1042 | } while(0U) | ||
1043 | |||
1044 | /** @brief Enable RTS flow control. | ||
1045 | * @note This macro allows to enable RTS hardware flow control for a given UART instance, | ||
1046 | * without need to call HAL_UART_Init() function. | ||
1047 | * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. | ||
1048 | * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need | ||
1049 | * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : | ||
1050 | * - UART instance should have already been initialised (through call of HAL_UART_Init() ) | ||
1051 | * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__)) | ||
1052 | * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). | ||
1053 | * @param __HANDLE__ specifies the UART Handle. | ||
1054 | * @retval None | ||
1055 | */ | ||
1056 | #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \ | ||
1057 | do{ \ | ||
1058 | SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \ | ||
1059 | (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \ | ||
1060 | } while(0U) | ||
1061 | |||
1062 | /** @brief Disable RTS flow control. | ||
1063 | * @note This macro allows to disable RTS hardware flow control for a given UART instance, | ||
1064 | * without need to call HAL_UART_Init() function. | ||
1065 | * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. | ||
1066 | * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need | ||
1067 | * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : | ||
1068 | * - UART instance should have already been initialised (through call of HAL_UART_Init() ) | ||
1069 | * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__)) | ||
1070 | * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). | ||
1071 | * @param __HANDLE__ specifies the UART Handle. | ||
1072 | * @retval None | ||
1073 | */ | ||
1074 | #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \ | ||
1075 | do{ \ | ||
1076 | CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\ | ||
1077 | (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \ | ||
1078 | } while(0U) | ||
1079 | /** | ||
1080 | * @} | ||
1081 | */ | ||
1082 | |||
1083 | /* Private macros --------------------------------------------------------*/ | ||
1084 | /** @defgroup UART_Private_Macros UART Private Macros | ||
1085 | * @{ | ||
1086 | */ | ||
1087 | |||
1088 | |||
1089 | /** @brief BRR division operation to set BRR register in 8-bit oversampling mode. | ||
1090 | * @param __PCLK__ UART clock. | ||
1091 | * @param __BAUD__ Baud rate set by the user. | ||
1092 | * @retval Division result | ||
1093 | */ | ||
1094 | #define UART_DIV_SAMPLING8(__PCLK__, __BAUD__) ((((__PCLK__)*2U) + ((__BAUD__)/2U)) / (__BAUD__)) | ||
1095 | |||
1096 | /** @brief BRR division operation to set BRR register in 16-bit oversampling mode. | ||
1097 | * @param __PCLK__ UART clock. | ||
1098 | * @param __BAUD__ Baud rate set by the user. | ||
1099 | * @retval Division result | ||
1100 | */ | ||
1101 | #define UART_DIV_SAMPLING16(__PCLK__, __BAUD__) (((__PCLK__) + ((__BAUD__)/2U)) / (__BAUD__)) | ||
1102 | |||
1103 | |||
1104 | /** @brief Check UART Baud rate. | ||
1105 | * @param __BAUDRATE__ Baudrate specified by the user. | ||
1106 | * The maximum Baud Rate is derived from the maximum clock on F0 (i.e. 48 MHz) | ||
1107 | * divided by the smallest oversampling used on the USART (i.e. 8) | ||
1108 | * @retval SET (__BAUDRATE__ is valid) or RESET (__BAUDRATE__ is invalid) | ||
1109 | */ | ||
1110 | #define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 6000001U) | ||
1111 | |||
1112 | /** @brief Check UART assertion time. | ||
1113 | * @param __TIME__ 5-bit value assertion time. | ||
1114 | * @retval Test result (TRUE or FALSE). | ||
1115 | */ | ||
1116 | #define IS_UART_ASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) | ||
1117 | |||
1118 | /** @brief Check UART deassertion time. | ||
1119 | * @param __TIME__ 5-bit value deassertion time. | ||
1120 | * @retval Test result (TRUE or FALSE). | ||
1121 | */ | ||
1122 | #define IS_UART_DEASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) | ||
1123 | |||
1124 | /** | ||
1125 | * @brief Ensure that UART frame number of stop bits is valid. | ||
1126 | * @param __STOPBITS__ UART frame number of stop bits. | ||
1127 | * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) | ||
1128 | */ | ||
1129 | #define IS_UART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_0_5) || \ | ||
1130 | ((__STOPBITS__) == UART_STOPBITS_1) || \ | ||
1131 | ((__STOPBITS__) == UART_STOPBITS_1_5) || \ | ||
1132 | ((__STOPBITS__) == UART_STOPBITS_2)) | ||
1133 | |||
1134 | |||
1135 | /** | ||
1136 | * @brief Ensure that UART frame parity is valid. | ||
1137 | * @param __PARITY__ UART frame parity. | ||
1138 | * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid) | ||
1139 | */ | ||
1140 | #define IS_UART_PARITY(__PARITY__) (((__PARITY__) == UART_PARITY_NONE) || \ | ||
1141 | ((__PARITY__) == UART_PARITY_EVEN) || \ | ||
1142 | ((__PARITY__) == UART_PARITY_ODD)) | ||
1143 | |||
1144 | /** | ||
1145 | * @brief Ensure that UART hardware flow control is valid. | ||
1146 | * @param __CONTROL__ UART hardware flow control. | ||
1147 | * @retval SET (__CONTROL__ is valid) or RESET (__CONTROL__ is invalid) | ||
1148 | */ | ||
1149 | #define IS_UART_HARDWARE_FLOW_CONTROL(__CONTROL__)\ | ||
1150 | (((__CONTROL__) == UART_HWCONTROL_NONE) || \ | ||
1151 | ((__CONTROL__) == UART_HWCONTROL_RTS) || \ | ||
1152 | ((__CONTROL__) == UART_HWCONTROL_CTS) || \ | ||
1153 | ((__CONTROL__) == UART_HWCONTROL_RTS_CTS)) | ||
1154 | |||
1155 | /** | ||
1156 | * @brief Ensure that UART communication mode is valid. | ||
1157 | * @param __MODE__ UART communication mode. | ||
1158 | * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) | ||
1159 | */ | ||
1160 | #define IS_UART_MODE(__MODE__) ((((__MODE__) & (~((uint32_t)(UART_MODE_TX_RX)))) == 0x00U) && ((__MODE__) != 0x00U)) | ||
1161 | |||
1162 | /** | ||
1163 | * @brief Ensure that UART state is valid. | ||
1164 | * @param __STATE__ UART state. | ||
1165 | * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid) | ||
1166 | */ | ||
1167 | #define IS_UART_STATE(__STATE__) (((__STATE__) == UART_STATE_DISABLE) || \ | ||
1168 | ((__STATE__) == UART_STATE_ENABLE)) | ||
1169 | |||
1170 | /** | ||
1171 | * @brief Ensure that UART oversampling is valid. | ||
1172 | * @param __SAMPLING__ UART oversampling. | ||
1173 | * @retval SET (__SAMPLING__ is valid) or RESET (__SAMPLING__ is invalid) | ||
1174 | */ | ||
1175 | #define IS_UART_OVERSAMPLING(__SAMPLING__) (((__SAMPLING__) == UART_OVERSAMPLING_16) || \ | ||
1176 | ((__SAMPLING__) == UART_OVERSAMPLING_8)) | ||
1177 | |||
1178 | /** | ||
1179 | * @brief Ensure that UART frame sampling is valid. | ||
1180 | * @param __ONEBIT__ UART frame sampling. | ||
1181 | * @retval SET (__ONEBIT__ is valid) or RESET (__ONEBIT__ is invalid) | ||
1182 | */ | ||
1183 | #define IS_UART_ONE_BIT_SAMPLE(__ONEBIT__) (((__ONEBIT__) == UART_ONE_BIT_SAMPLE_DISABLE) || \ | ||
1184 | ((__ONEBIT__) == UART_ONE_BIT_SAMPLE_ENABLE)) | ||
1185 | |||
1186 | /** | ||
1187 | * @brief Ensure that UART auto Baud rate detection mode is valid. | ||
1188 | * @param __MODE__ UART auto Baud rate detection mode. | ||
1189 | * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) | ||
1190 | */ | ||
1191 | #define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(__MODE__) (((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) || \ | ||
1192 | ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE) || \ | ||
1193 | ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME) || \ | ||
1194 | ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME)) | ||
1195 | |||
1196 | /** | ||
1197 | * @brief Ensure that UART receiver timeout setting is valid. | ||
1198 | * @param __TIMEOUT__ UART receiver timeout setting. | ||
1199 | * @retval SET (__TIMEOUT__ is valid) or RESET (__TIMEOUT__ is invalid) | ||
1200 | */ | ||
1201 | #define IS_UART_RECEIVER_TIMEOUT(__TIMEOUT__) (((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_DISABLE) || \ | ||
1202 | ((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_ENABLE)) | ||
1203 | |||
1204 | /** @brief Check the receiver timeout value. | ||
1205 | * @note The maximum UART receiver timeout value is 0xFFFFFF. | ||
1206 | * @param __TIMEOUTVALUE__ receiver timeout value. | ||
1207 | * @retval Test result (TRUE or FALSE) | ||
1208 | */ | ||
1209 | #define IS_UART_RECEIVER_TIMEOUT_VALUE(__TIMEOUTVALUE__) ((__TIMEOUTVALUE__) <= 0xFFFFFFU) | ||
1210 | |||
1211 | /** | ||
1212 | * @brief Ensure that UART LIN state is valid. | ||
1213 | * @param __LIN__ UART LIN state. | ||
1214 | * @retval SET (__LIN__ is valid) or RESET (__LIN__ is invalid) | ||
1215 | */ | ||
1216 | #define IS_UART_LIN(__LIN__) (((__LIN__) == UART_LIN_DISABLE) || \ | ||
1217 | ((__LIN__) == UART_LIN_ENABLE)) | ||
1218 | |||
1219 | /** | ||
1220 | * @brief Ensure that UART LIN break detection length is valid. | ||
1221 | * @param __LENGTH__ UART LIN break detection length. | ||
1222 | * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) | ||
1223 | */ | ||
1224 | #define IS_UART_LIN_BREAK_DETECT_LENGTH(__LENGTH__) (((__LENGTH__) == UART_LINBREAKDETECTLENGTH_10B) || \ | ||
1225 | ((__LENGTH__) == UART_LINBREAKDETECTLENGTH_11B)) | ||
1226 | |||
1227 | /** | ||
1228 | * @brief Ensure that UART DMA TX state is valid. | ||
1229 | * @param __DMATX__ UART DMA TX state. | ||
1230 | * @retval SET (__DMATX__ is valid) or RESET (__DMATX__ is invalid) | ||
1231 | */ | ||
1232 | #define IS_UART_DMA_TX(__DMATX__) (((__DMATX__) == UART_DMA_TX_DISABLE) || \ | ||
1233 | ((__DMATX__) == UART_DMA_TX_ENABLE)) | ||
1234 | |||
1235 | /** | ||
1236 | * @brief Ensure that UART DMA RX state is valid. | ||
1237 | * @param __DMARX__ UART DMA RX state. | ||
1238 | * @retval SET (__DMARX__ is valid) or RESET (__DMARX__ is invalid) | ||
1239 | */ | ||
1240 | #define IS_UART_DMA_RX(__DMARX__) (((__DMARX__) == UART_DMA_RX_DISABLE) || \ | ||
1241 | ((__DMARX__) == UART_DMA_RX_ENABLE)) | ||
1242 | |||
1243 | /** | ||
1244 | * @brief Ensure that UART half-duplex state is valid. | ||
1245 | * @param __HDSEL__ UART half-duplex state. | ||
1246 | * @retval SET (__HDSEL__ is valid) or RESET (__HDSEL__ is invalid) | ||
1247 | */ | ||
1248 | #define IS_UART_HALF_DUPLEX(__HDSEL__) (((__HDSEL__) == UART_HALF_DUPLEX_DISABLE) || \ | ||
1249 | ((__HDSEL__) == UART_HALF_DUPLEX_ENABLE)) | ||
1250 | |||
1251 | /** | ||
1252 | * @brief Ensure that UART wake-up method is valid. | ||
1253 | * @param __WAKEUP__ UART wake-up method . | ||
1254 | * @retval SET (__WAKEUP__ is valid) or RESET (__WAKEUP__ is invalid) | ||
1255 | */ | ||
1256 | #define IS_UART_WAKEUPMETHOD(__WAKEUP__) (((__WAKEUP__) == UART_WAKEUPMETHOD_IDLELINE) || \ | ||
1257 | ((__WAKEUP__) == UART_WAKEUPMETHOD_ADDRESSMARK)) | ||
1258 | |||
1259 | /** | ||
1260 | * @brief Ensure that UART request parameter is valid. | ||
1261 | * @param __PARAM__ UART request parameter. | ||
1262 | * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid) | ||
1263 | */ | ||
1264 | #define IS_UART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == UART_AUTOBAUD_REQUEST) || \ | ||
1265 | ((__PARAM__) == UART_SENDBREAK_REQUEST) || \ | ||
1266 | ((__PARAM__) == UART_MUTE_MODE_REQUEST) || \ | ||
1267 | ((__PARAM__) == UART_RXDATA_FLUSH_REQUEST) || \ | ||
1268 | ((__PARAM__) == UART_TXDATA_FLUSH_REQUEST)) | ||
1269 | |||
1270 | /** | ||
1271 | * @brief Ensure that UART advanced features initialization is valid. | ||
1272 | * @param __INIT__ UART advanced features initialization. | ||
1273 | * @retval SET (__INIT__ is valid) or RESET (__INIT__ is invalid) | ||
1274 | */ | ||
1275 | #define IS_UART_ADVFEATURE_INIT(__INIT__) ((__INIT__) <= (UART_ADVFEATURE_NO_INIT | \ | ||
1276 | UART_ADVFEATURE_TXINVERT_INIT | \ | ||
1277 | UART_ADVFEATURE_RXINVERT_INIT | \ | ||
1278 | UART_ADVFEATURE_DATAINVERT_INIT | \ | ||
1279 | UART_ADVFEATURE_SWAP_INIT | \ | ||
1280 | UART_ADVFEATURE_RXOVERRUNDISABLE_INIT | \ | ||
1281 | UART_ADVFEATURE_DMADISABLEONERROR_INIT | \ | ||
1282 | UART_ADVFEATURE_AUTOBAUDRATE_INIT | \ | ||
1283 | UART_ADVFEATURE_MSBFIRST_INIT)) | ||
1284 | |||
1285 | /** | ||
1286 | * @brief Ensure that UART frame TX inversion setting is valid. | ||
1287 | * @param __TXINV__ UART frame TX inversion setting. | ||
1288 | * @retval SET (__TXINV__ is valid) or RESET (__TXINV__ is invalid) | ||
1289 | */ | ||
1290 | #define IS_UART_ADVFEATURE_TXINV(__TXINV__) (((__TXINV__) == UART_ADVFEATURE_TXINV_DISABLE) || \ | ||
1291 | ((__TXINV__) == UART_ADVFEATURE_TXINV_ENABLE)) | ||
1292 | |||
1293 | /** | ||
1294 | * @brief Ensure that UART frame RX inversion setting is valid. | ||
1295 | * @param __RXINV__ UART frame RX inversion setting. | ||
1296 | * @retval SET (__RXINV__ is valid) or RESET (__RXINV__ is invalid) | ||
1297 | */ | ||
1298 | #define IS_UART_ADVFEATURE_RXINV(__RXINV__) (((__RXINV__) == UART_ADVFEATURE_RXINV_DISABLE) || \ | ||
1299 | ((__RXINV__) == UART_ADVFEATURE_RXINV_ENABLE)) | ||
1300 | |||
1301 | /** | ||
1302 | * @brief Ensure that UART frame data inversion setting is valid. | ||
1303 | * @param __DATAINV__ UART frame data inversion setting. | ||
1304 | * @retval SET (__DATAINV__ is valid) or RESET (__DATAINV__ is invalid) | ||
1305 | */ | ||
1306 | #define IS_UART_ADVFEATURE_DATAINV(__DATAINV__) (((__DATAINV__) == UART_ADVFEATURE_DATAINV_DISABLE) || \ | ||
1307 | ((__DATAINV__) == UART_ADVFEATURE_DATAINV_ENABLE)) | ||
1308 | |||
1309 | /** | ||
1310 | * @brief Ensure that UART frame RX/TX pins swap setting is valid. | ||
1311 | * @param __SWAP__ UART frame RX/TX pins swap setting. | ||
1312 | * @retval SET (__SWAP__ is valid) or RESET (__SWAP__ is invalid) | ||
1313 | */ | ||
1314 | #define IS_UART_ADVFEATURE_SWAP(__SWAP__) (((__SWAP__) == UART_ADVFEATURE_SWAP_DISABLE) || \ | ||
1315 | ((__SWAP__) == UART_ADVFEATURE_SWAP_ENABLE)) | ||
1316 | |||
1317 | /** | ||
1318 | * @brief Ensure that UART frame overrun setting is valid. | ||
1319 | * @param __OVERRUN__ UART frame overrun setting. | ||
1320 | * @retval SET (__OVERRUN__ is valid) or RESET (__OVERRUN__ is invalid) | ||
1321 | */ | ||
1322 | #define IS_UART_OVERRUN(__OVERRUN__) (((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_ENABLE) || \ | ||
1323 | ((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_DISABLE)) | ||
1324 | |||
1325 | /** | ||
1326 | * @brief Ensure that UART auto Baud rate state is valid. | ||
1327 | * @param __AUTOBAUDRATE__ UART auto Baud rate state. | ||
1328 | * @retval SET (__AUTOBAUDRATE__ is valid) or RESET (__AUTOBAUDRATE__ is invalid) | ||
1329 | */ | ||
1330 | #define IS_UART_ADVFEATURE_AUTOBAUDRATE(__AUTOBAUDRATE__) (((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_DISABLE) || \ | ||
1331 | ((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)) | ||
1332 | |||
1333 | /** | ||
1334 | * @brief Ensure that UART DMA enabling or disabling on error setting is valid. | ||
1335 | * @param __DMA__ UART DMA enabling or disabling on error setting. | ||
1336 | * @retval SET (__DMA__ is valid) or RESET (__DMA__ is invalid) | ||
1337 | */ | ||
1338 | #define IS_UART_ADVFEATURE_DMAONRXERROR(__DMA__) (((__DMA__) == UART_ADVFEATURE_DMA_ENABLEONRXERROR) || \ | ||
1339 | ((__DMA__) == UART_ADVFEATURE_DMA_DISABLEONRXERROR)) | ||
1340 | |||
1341 | /** | ||
1342 | * @brief Ensure that UART frame MSB first setting is valid. | ||
1343 | * @param __MSBFIRST__ UART frame MSB first setting. | ||
1344 | * @retval SET (__MSBFIRST__ is valid) or RESET (__MSBFIRST__ is invalid) | ||
1345 | */ | ||
1346 | #define IS_UART_ADVFEATURE_MSBFIRST(__MSBFIRST__) (((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_DISABLE) || \ | ||
1347 | ((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_ENABLE)) | ||
1348 | |||
1349 | #if defined(USART_CR1_UESM) | ||
1350 | /** | ||
1351 | * @brief Ensure that UART stop mode state is valid. | ||
1352 | * @param __STOPMODE__ UART stop mode state. | ||
1353 | * @retval SET (__STOPMODE__ is valid) or RESET (__STOPMODE__ is invalid) | ||
1354 | */ | ||
1355 | #define IS_UART_ADVFEATURE_STOPMODE(__STOPMODE__) (((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_DISABLE) || \ | ||
1356 | ((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_ENABLE)) | ||
1357 | |||
1358 | #endif /* USART_CR1_UESM */ | ||
1359 | /** | ||
1360 | * @brief Ensure that UART mute mode state is valid. | ||
1361 | * @param __MUTE__ UART mute mode state. | ||
1362 | * @retval SET (__MUTE__ is valid) or RESET (__MUTE__ is invalid) | ||
1363 | */ | ||
1364 | #define IS_UART_MUTE_MODE(__MUTE__) (((__MUTE__) == UART_ADVFEATURE_MUTEMODE_DISABLE) || \ | ||
1365 | ((__MUTE__) == UART_ADVFEATURE_MUTEMODE_ENABLE)) | ||
1366 | #if defined(USART_CR1_UESM) | ||
1367 | |||
1368 | /** | ||
1369 | * @brief Ensure that UART wake-up selection is valid. | ||
1370 | * @param __WAKE__ UART wake-up selection. | ||
1371 | * @retval SET (__WAKE__ is valid) or RESET (__WAKE__ is invalid) | ||
1372 | */ | ||
1373 | #define IS_UART_WAKEUP_SELECTION(__WAKE__) (((__WAKE__) == UART_WAKEUP_ON_ADDRESS) || \ | ||
1374 | ((__WAKE__) == UART_WAKEUP_ON_STARTBIT) || \ | ||
1375 | ((__WAKE__) == UART_WAKEUP_ON_READDATA_NONEMPTY)) | ||
1376 | #endif /* USART_CR1_UESM */ | ||
1377 | |||
1378 | /** | ||
1379 | * @brief Ensure that UART driver enable polarity is valid. | ||
1380 | * @param __POLARITY__ UART driver enable polarity. | ||
1381 | * @retval SET (__POLARITY__ is valid) or RESET (__POLARITY__ is invalid) | ||
1382 | */ | ||
1383 | #define IS_UART_DE_POLARITY(__POLARITY__) (((__POLARITY__) == UART_DE_POLARITY_HIGH) || \ | ||
1384 | ((__POLARITY__) == UART_DE_POLARITY_LOW)) | ||
1385 | |||
1386 | |||
1387 | /** | ||
1388 | * @} | ||
1389 | */ | ||
1390 | |||
1391 | /* Include UART HAL Extended module */ | ||
1392 | #include "stm32f0xx_hal_uart_ex.h" | ||
1393 | |||
1394 | |||
1395 | /* Exported functions --------------------------------------------------------*/ | ||
1396 | /** @addtogroup UART_Exported_Functions UART Exported Functions | ||
1397 | * @{ | ||
1398 | */ | ||
1399 | |||
1400 | /** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions | ||
1401 | * @{ | ||
1402 | */ | ||
1403 | |||
1404 | /* Initialization and de-initialization functions ****************************/ | ||
1405 | HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart); | ||
1406 | HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart); | ||
1407 | #if defined(USART_CR2_LINEN) | ||
1408 | HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength); | ||
1409 | #endif /* USART_CR2_LINEN */ | ||
1410 | HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod); | ||
1411 | HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart); | ||
1412 | void HAL_UART_MspInit(UART_HandleTypeDef *huart); | ||
1413 | void HAL_UART_MspDeInit(UART_HandleTypeDef *huart); | ||
1414 | |||
1415 | /* Callbacks Register/UnRegister functions ***********************************/ | ||
1416 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) | ||
1417 | HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID, | ||
1418 | pUART_CallbackTypeDef pCallback); | ||
1419 | HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID); | ||
1420 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ | ||
1421 | |||
1422 | /** | ||
1423 | * @} | ||
1424 | */ | ||
1425 | |||
1426 | /** @addtogroup UART_Exported_Functions_Group2 IO operation functions | ||
1427 | * @{ | ||
1428 | */ | ||
1429 | |||
1430 | /* IO operation functions *****************************************************/ | ||
1431 | HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); | ||
1432 | HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); | ||
1433 | HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); | ||
1434 | HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); | ||
1435 | HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); | ||
1436 | HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); | ||
1437 | HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart); | ||
1438 | HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart); | ||
1439 | HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart); | ||
1440 | /* Transfer Abort functions */ | ||
1441 | HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart); | ||
1442 | HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart); | ||
1443 | HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart); | ||
1444 | HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart); | ||
1445 | HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart); | ||
1446 | HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart); | ||
1447 | |||
1448 | void HAL_UART_IRQHandler(UART_HandleTypeDef *huart); | ||
1449 | void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart); | ||
1450 | void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart); | ||
1451 | void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart); | ||
1452 | void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart); | ||
1453 | void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart); | ||
1454 | void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart); | ||
1455 | void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart); | ||
1456 | void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart); | ||
1457 | |||
1458 | /** | ||
1459 | * @} | ||
1460 | */ | ||
1461 | |||
1462 | /** @addtogroup UART_Exported_Functions_Group3 Peripheral Control functions | ||
1463 | * @{ | ||
1464 | */ | ||
1465 | |||
1466 | /* Peripheral Control functions ************************************************/ | ||
1467 | void HAL_UART_ReceiverTimeout_Config(UART_HandleTypeDef *huart, uint32_t TimeoutValue); | ||
1468 | HAL_StatusTypeDef HAL_UART_EnableReceiverTimeout(UART_HandleTypeDef *huart); | ||
1469 | HAL_StatusTypeDef HAL_UART_DisableReceiverTimeout(UART_HandleTypeDef *huart); | ||
1470 | |||
1471 | #if defined(USART_CR2_LINEN) | ||
1472 | HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart); | ||
1473 | #endif /* USART_CR2_LINEN */ | ||
1474 | HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart); | ||
1475 | HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart); | ||
1476 | void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart); | ||
1477 | HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart); | ||
1478 | HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart); | ||
1479 | |||
1480 | /** | ||
1481 | * @} | ||
1482 | */ | ||
1483 | |||
1484 | /** @addtogroup UART_Exported_Functions_Group4 Peripheral State and Error functions | ||
1485 | * @{ | ||
1486 | */ | ||
1487 | |||
1488 | /* Peripheral State and Errors functions **************************************************/ | ||
1489 | HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart); | ||
1490 | uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart); | ||
1491 | |||
1492 | /** | ||
1493 | * @} | ||
1494 | */ | ||
1495 | |||
1496 | /** | ||
1497 | * @} | ||
1498 | */ | ||
1499 | |||
1500 | /* Private functions -----------------------------------------------------------*/ | ||
1501 | /** @addtogroup UART_Private_Functions UART Private Functions | ||
1502 | * @{ | ||
1503 | */ | ||
1504 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) | ||
1505 | void UART_InitCallbacksToDefault(UART_HandleTypeDef *huart); | ||
1506 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ | ||
1507 | HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart); | ||
1508 | HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart); | ||
1509 | HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, | ||
1510 | uint32_t Tickstart, uint32_t Timeout); | ||
1511 | void UART_AdvFeatureConfig(UART_HandleTypeDef *huart); | ||
1512 | |||
1513 | /** | ||
1514 | * @} | ||
1515 | */ | ||
1516 | |||
1517 | /** | ||
1518 | * @} | ||
1519 | */ | ||
1520 | |||
1521 | /** | ||
1522 | * @} | ||
1523 | */ | ||
1524 | |||
1525 | #ifdef __cplusplus | ||
1526 | } | ||
1527 | #endif | ||
1528 | |||
1529 | #endif /* STM32F0xx_HAL_UART_H */ | ||
1530 | |||
1531 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
1 | /** | ||
2 | ****************************************************************************** | ||
3 | * @file stm32f0xx_hal_uart_ex.h | ||
4 | * @author MCD Application Team | ||
5 | * @brief Header file of UART HAL Extended module. | ||
6 | ****************************************************************************** | ||
7 | * @attention | ||
8 | * | ||
9 | * <h2><center>© Copyright (c) 2016 STMicroelectronics. | ||
10 | * All rights reserved.</center></h2> | ||
11 | * | ||
12 | * This software component is licensed by ST under BSD 3-Clause license, | ||
13 | * the "License"; You may not use this file except in compliance with the | ||
14 | * License. You may obtain a copy of the License at: | ||
15 | * opensource.org/licenses/BSD-3-Clause | ||
16 | * | ||
17 | ****************************************************************************** | ||
18 | */ | ||
19 | |||
20 | /* Define to prevent recursive inclusion -------------------------------------*/ | ||
21 | #ifndef STM32F0xx_HAL_UART_EX_H | ||
22 | #define STM32F0xx_HAL_UART_EX_H | ||
23 | |||
24 | #ifdef __cplusplus | ||
25 | extern "C" { | ||
26 | #endif | ||
27 | |||
28 | /* Includes ------------------------------------------------------------------*/ | ||
29 | #include "stm32f0xx_hal_def.h" | ||
30 | |||
31 | /** @addtogroup STM32F0xx_HAL_Driver | ||
32 | * @{ | ||
33 | */ | ||
34 | |||
35 | /** @addtogroup UARTEx | ||
36 | * @{ | ||
37 | */ | ||
38 | |||
39 | /* Exported types ------------------------------------------------------------*/ | ||
40 | /** @defgroup UARTEx_Exported_Types UARTEx Exported Types | ||
41 | * @{ | ||
42 | */ | ||
43 | |||
44 | #if defined(USART_CR1_UESM) | ||
45 | /** | ||
46 | * @brief UART wake up from stop mode parameters | ||
47 | */ | ||
48 | typedef struct | ||
49 | { | ||
50 | uint32_t WakeUpEvent; /*!< Specifies which event will activate the Wakeup from Stop mode flag (WUF). | ||
51 | This parameter can be a value of @ref UART_WakeUp_from_Stop_Selection. | ||
52 | If set to UART_WAKEUP_ON_ADDRESS, the two other fields below must | ||
53 | be filled up. */ | ||
54 | |||
55 | uint16_t AddressLength; /*!< Specifies whether the address is 4 or 7-bit long. | ||
56 | This parameter can be a value of @ref UARTEx_WakeUp_Address_Length. */ | ||
57 | |||
58 | uint8_t Address; /*!< UART/USART node address (7-bit long max). */ | ||
59 | } UART_WakeUpTypeDef; | ||
60 | |||
61 | #endif /* USART_CR1_UESM */ | ||
62 | /** | ||
63 | * @} | ||
64 | */ | ||
65 | |||
66 | /* Exported constants --------------------------------------------------------*/ | ||
67 | /** @defgroup UARTEx_Exported_Constants UARTEx Exported Constants | ||
68 | * @{ | ||
69 | */ | ||
70 | |||
71 | /** @defgroup UARTEx_Word_Length UARTEx Word Length | ||
72 | * @{ | ||
73 | */ | ||
74 | #if defined(USART_CR1_M1) | ||
75 | #define UART_WORDLENGTH_7B USART_CR1_M1 /*!< 7-bit long UART frame */ | ||
76 | #endif /* USART_CR1_M1 */ | ||
77 | #define UART_WORDLENGTH_8B 0x00000000U /*!< 8-bit long UART frame */ | ||
78 | #if defined (USART_CR1_M0) | ||
79 | #define UART_WORDLENGTH_9B USART_CR1_M0 /*!< 9-bit long UART frame */ | ||
80 | #else | ||
81 | #define UART_WORDLENGTH_9B USART_CR1_M /*!< 9-bit long UART frame */ | ||
82 | #endif /* USART_CR1_M0 */ | ||
83 | /** | ||
84 | * @} | ||
85 | */ | ||
86 | |||
87 | /** @defgroup UARTEx_WakeUp_Address_Length UARTEx WakeUp Address Length | ||
88 | * @{ | ||
89 | */ | ||
90 | #define UART_ADDRESS_DETECT_4B 0x00000000U /*!< 4-bit long wake-up address */ | ||
91 | #define UART_ADDRESS_DETECT_7B USART_CR2_ADDM7 /*!< 7-bit long wake-up address */ | ||
92 | /** | ||
93 | * @} | ||
94 | */ | ||
95 | |||
96 | /** | ||
97 | * @} | ||
98 | */ | ||
99 | |||
100 | /* Exported macros -----------------------------------------------------------*/ | ||
101 | /* Exported functions --------------------------------------------------------*/ | ||
102 | /** @addtogroup UARTEx_Exported_Functions | ||
103 | * @{ | ||
104 | */ | ||
105 | |||
106 | /** @addtogroup UARTEx_Exported_Functions_Group1 | ||
107 | * @{ | ||
108 | */ | ||
109 | |||
110 | /* Initialization and de-initialization functions ****************************/ | ||
111 | HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t AssertionTime, | ||
112 | uint32_t DeassertionTime); | ||
113 | |||
114 | /** | ||
115 | * @} | ||
116 | */ | ||
117 | |||
118 | /** @addtogroup UARTEx_Exported_Functions_Group2 | ||
119 | * @{ | ||
120 | */ | ||
121 | |||
122 | #if defined(USART_CR1_UESM) | ||
123 | void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart); | ||
124 | |||
125 | #endif /* USART_CR1_UESM */ | ||
126 | |||
127 | /** | ||
128 | * @} | ||
129 | */ | ||
130 | |||
131 | /** @addtogroup UARTEx_Exported_Functions_Group3 | ||
132 | * @{ | ||
133 | */ | ||
134 | |||
135 | /* Peripheral Control functions **********************************************/ | ||
136 | #if defined(USART_CR1_UESM) | ||
137 | HAL_StatusTypeDef HAL_UARTEx_StopModeWakeUpSourceConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection); | ||
138 | HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart); | ||
139 | HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart); | ||
140 | |||
141 | #endif/* USART_CR1_UESM */ | ||
142 | HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t AddressLength); | ||
143 | |||
144 | |||
145 | /** | ||
146 | * @} | ||
147 | */ | ||
148 | |||
149 | /** | ||
150 | * @} | ||
151 | */ | ||
152 | |||
153 | /* Private macros ------------------------------------------------------------*/ | ||
154 | /** @defgroup UARTEx_Private_Macros UARTEx Private Macros | ||
155 | * @{ | ||
156 | */ | ||
157 | |||
158 | /** @brief Report the UART clock source. | ||
159 | * @param __HANDLE__ specifies the UART Handle. | ||
160 | * @param __CLOCKSOURCE__ output variable. | ||
161 | * @retval UART clocking source, written in __CLOCKSOURCE__. | ||
162 | */ | ||
163 | |||
164 | #if defined(STM32F030x6) || defined(STM32F031x6) || defined(STM32F038xx) | ||
165 | #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ | ||
166 | do { \ | ||
167 | switch(__HAL_RCC_GET_USART1_SOURCE()) \ | ||
168 | { \ | ||
169 | case RCC_USART1CLKSOURCE_PCLK1: \ | ||
170 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ | ||
171 | break; \ | ||
172 | case RCC_USART1CLKSOURCE_HSI: \ | ||
173 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ | ||
174 | break; \ | ||
175 | case RCC_USART1CLKSOURCE_SYSCLK: \ | ||
176 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ | ||
177 | break; \ | ||
178 | case RCC_USART1CLKSOURCE_LSE: \ | ||
179 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ | ||
180 | break; \ | ||
181 | default: \ | ||
182 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ | ||
183 | break; \ | ||
184 | } \ | ||
185 | } while(0) | ||
186 | #elif defined (STM32F030x8) || defined (STM32F070x6) || defined (STM32F042x6) || defined (STM32F048xx) || defined (STM32F051x8) || defined (STM32F058xx) | ||
187 | #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ | ||
188 | do { \ | ||
189 | if((__HANDLE__)->Instance == USART1) \ | ||
190 | { \ | ||
191 | switch(__HAL_RCC_GET_USART1_SOURCE()) \ | ||
192 | { \ | ||
193 | case RCC_USART1CLKSOURCE_PCLK1: \ | ||
194 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ | ||
195 | break; \ | ||
196 | case RCC_USART1CLKSOURCE_HSI: \ | ||
197 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ | ||
198 | break; \ | ||
199 | case RCC_USART1CLKSOURCE_SYSCLK: \ | ||
200 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ | ||
201 | break; \ | ||
202 | case RCC_USART1CLKSOURCE_LSE: \ | ||
203 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ | ||
204 | break; \ | ||
205 | default: \ | ||
206 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ | ||
207 | break; \ | ||
208 | } \ | ||
209 | } \ | ||
210 | else if((__HANDLE__)->Instance == USART2) \ | ||
211 | { \ | ||
212 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ | ||
213 | } \ | ||
214 | else \ | ||
215 | { \ | ||
216 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ | ||
217 | } \ | ||
218 | } while(0) | ||
219 | #elif defined(STM32F070xB) | ||
220 | #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ | ||
221 | do { \ | ||
222 | if((__HANDLE__)->Instance == USART1) \ | ||
223 | { \ | ||
224 | switch(__HAL_RCC_GET_USART1_SOURCE()) \ | ||
225 | { \ | ||
226 | case RCC_USART1CLKSOURCE_PCLK1: \ | ||
227 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ | ||
228 | break; \ | ||
229 | case RCC_USART1CLKSOURCE_HSI: \ | ||
230 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ | ||
231 | break; \ | ||
232 | case RCC_USART1CLKSOURCE_SYSCLK: \ | ||
233 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ | ||
234 | break; \ | ||
235 | case RCC_USART1CLKSOURCE_LSE: \ | ||
236 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ | ||
237 | break; \ | ||
238 | default: \ | ||
239 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ | ||
240 | break; \ | ||
241 | } \ | ||
242 | } \ | ||
243 | else if((__HANDLE__)->Instance == USART2) \ | ||
244 | { \ | ||
245 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ | ||
246 | } \ | ||
247 | else if((__HANDLE__)->Instance == USART3) \ | ||
248 | { \ | ||
249 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ | ||
250 | } \ | ||
251 | else if((__HANDLE__)->Instance == USART4) \ | ||
252 | { \ | ||
253 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ | ||
254 | } \ | ||
255 | else \ | ||
256 | { \ | ||
257 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ | ||
258 | } \ | ||
259 | } while(0) | ||
260 | #elif defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) | ||
261 | #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ | ||
262 | do { \ | ||
263 | if((__HANDLE__)->Instance == USART1) \ | ||
264 | { \ | ||
265 | switch(__HAL_RCC_GET_USART1_SOURCE()) \ | ||
266 | { \ | ||
267 | case RCC_USART1CLKSOURCE_PCLK1: \ | ||
268 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ | ||
269 | break; \ | ||
270 | case RCC_USART1CLKSOURCE_HSI: \ | ||
271 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ | ||
272 | break; \ | ||
273 | case RCC_USART1CLKSOURCE_SYSCLK: \ | ||
274 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ | ||
275 | break; \ | ||
276 | case RCC_USART1CLKSOURCE_LSE: \ | ||
277 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ | ||
278 | break; \ | ||
279 | default: \ | ||
280 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ | ||
281 | break; \ | ||
282 | } \ | ||
283 | } \ | ||
284 | else if((__HANDLE__)->Instance == USART2) \ | ||
285 | { \ | ||
286 | switch(__HAL_RCC_GET_USART2_SOURCE()) \ | ||
287 | { \ | ||
288 | case RCC_USART2CLKSOURCE_PCLK1: \ | ||
289 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ | ||
290 | break; \ | ||
291 | case RCC_USART2CLKSOURCE_HSI: \ | ||
292 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ | ||
293 | break; \ | ||
294 | case RCC_USART2CLKSOURCE_SYSCLK: \ | ||
295 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ | ||
296 | break; \ | ||
297 | case RCC_USART2CLKSOURCE_LSE: \ | ||
298 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ | ||
299 | break; \ | ||
300 | default: \ | ||
301 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ | ||
302 | break; \ | ||
303 | } \ | ||
304 | } \ | ||
305 | else if((__HANDLE__)->Instance == USART3) \ | ||
306 | { \ | ||
307 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ | ||
308 | } \ | ||
309 | else if((__HANDLE__)->Instance == USART4) \ | ||
310 | { \ | ||
311 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ | ||
312 | } \ | ||
313 | else \ | ||
314 | { \ | ||
315 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ | ||
316 | } \ | ||
317 | } while(0) | ||
318 | #elif defined(STM32F091xC) || defined (STM32F098xx) | ||
319 | #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ | ||
320 | do { \ | ||
321 | if((__HANDLE__)->Instance == USART1) \ | ||
322 | { \ | ||
323 | switch(__HAL_RCC_GET_USART1_SOURCE()) \ | ||
324 | { \ | ||
325 | case RCC_USART1CLKSOURCE_PCLK1: \ | ||
326 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ | ||
327 | break; \ | ||
328 | case RCC_USART1CLKSOURCE_HSI: \ | ||
329 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ | ||
330 | break; \ | ||
331 | case RCC_USART1CLKSOURCE_SYSCLK: \ | ||
332 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ | ||
333 | break; \ | ||
334 | case RCC_USART1CLKSOURCE_LSE: \ | ||
335 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ | ||
336 | break; \ | ||
337 | default: \ | ||
338 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ | ||
339 | break; \ | ||
340 | } \ | ||
341 | } \ | ||
342 | else if((__HANDLE__)->Instance == USART2) \ | ||
343 | { \ | ||
344 | switch(__HAL_RCC_GET_USART2_SOURCE()) \ | ||
345 | { \ | ||
346 | case RCC_USART2CLKSOURCE_PCLK1: \ | ||
347 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ | ||
348 | break; \ | ||
349 | case RCC_USART2CLKSOURCE_HSI: \ | ||
350 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ | ||
351 | break; \ | ||
352 | case RCC_USART2CLKSOURCE_SYSCLK: \ | ||
353 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ | ||
354 | break; \ | ||
355 | case RCC_USART2CLKSOURCE_LSE: \ | ||
356 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ | ||
357 | break; \ | ||
358 | default: \ | ||
359 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ | ||
360 | break; \ | ||
361 | } \ | ||
362 | } \ | ||
363 | else if((__HANDLE__)->Instance == USART3) \ | ||
364 | { \ | ||
365 | switch(__HAL_RCC_GET_USART3_SOURCE()) \ | ||
366 | { \ | ||
367 | case RCC_USART3CLKSOURCE_PCLK1: \ | ||
368 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ | ||
369 | break; \ | ||
370 | case RCC_USART3CLKSOURCE_HSI: \ | ||
371 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ | ||
372 | break; \ | ||
373 | case RCC_USART3CLKSOURCE_SYSCLK: \ | ||
374 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ | ||
375 | break; \ | ||
376 | case RCC_USART3CLKSOURCE_LSE: \ | ||
377 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ | ||
378 | break; \ | ||
379 | default: \ | ||
380 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ | ||
381 | break; \ | ||
382 | } \ | ||
383 | } \ | ||
384 | else if((__HANDLE__)->Instance == USART4) \ | ||
385 | { \ | ||
386 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ | ||
387 | } \ | ||
388 | else if((__HANDLE__)->Instance == USART5) \ | ||
389 | { \ | ||
390 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ | ||
391 | } \ | ||
392 | else if((__HANDLE__)->Instance == USART6) \ | ||
393 | { \ | ||
394 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ | ||
395 | } \ | ||
396 | else if((__HANDLE__)->Instance == USART7) \ | ||
397 | { \ | ||
398 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ | ||
399 | } \ | ||
400 | else if((__HANDLE__)->Instance == USART8) \ | ||
401 | { \ | ||
402 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ | ||
403 | } \ | ||
404 | else \ | ||
405 | { \ | ||
406 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ | ||
407 | } \ | ||
408 | } while(0) | ||
409 | #elif defined(STM32F030xC) | ||
410 | #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ | ||
411 | do { \ | ||
412 | if((__HANDLE__)->Instance == USART1) \ | ||
413 | { \ | ||
414 | switch(__HAL_RCC_GET_USART1_SOURCE()) \ | ||
415 | { \ | ||
416 | case RCC_USART1CLKSOURCE_PCLK1: \ | ||
417 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ | ||
418 | break; \ | ||
419 | case RCC_USART1CLKSOURCE_HSI: \ | ||
420 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ | ||
421 | break; \ | ||
422 | case RCC_USART1CLKSOURCE_SYSCLK: \ | ||
423 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ | ||
424 | break; \ | ||
425 | case RCC_USART1CLKSOURCE_LSE: \ | ||
426 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ | ||
427 | break; \ | ||
428 | default: \ | ||
429 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ | ||
430 | break; \ | ||
431 | } \ | ||
432 | } \ | ||
433 | else if((__HANDLE__)->Instance == USART2) \ | ||
434 | { \ | ||
435 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ | ||
436 | } \ | ||
437 | else if((__HANDLE__)->Instance == USART3) \ | ||
438 | { \ | ||
439 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ | ||
440 | } \ | ||
441 | else if((__HANDLE__)->Instance == USART4) \ | ||
442 | { \ | ||
443 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ | ||
444 | } \ | ||
445 | else if((__HANDLE__)->Instance == USART5) \ | ||
446 | { \ | ||
447 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ | ||
448 | } \ | ||
449 | else if((__HANDLE__)->Instance == USART6) \ | ||
450 | { \ | ||
451 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ | ||
452 | } \ | ||
453 | else \ | ||
454 | { \ | ||
455 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ | ||
456 | } \ | ||
457 | } while(0) | ||
458 | |||
459 | #endif /* defined(STM32F030x6) || defined(STM32F031x6) || defined(STM32F038xx) */ | ||
460 | |||
461 | /** @brief Report the UART mask to apply to retrieve the received data | ||
462 | * according to the word length and to the parity bits activation. | ||
463 | * @note If PCE = 1, the parity bit is not included in the data extracted | ||
464 | * by the reception API(). | ||
465 | * This masking operation is not carried out in the case of | ||
466 | * DMA transfers. | ||
467 | * @param __HANDLE__ specifies the UART Handle. | ||
468 | * @retval None, the mask to apply to UART RDR register is stored in (__HANDLE__)->Mask field. | ||
469 | */ | ||
470 | #if defined (USART_CR1_M1) | ||
471 | #define UART_MASK_COMPUTATION(__HANDLE__) \ | ||
472 | do { \ | ||
473 | if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_9B) \ | ||
474 | { \ | ||
475 | if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ | ||
476 | { \ | ||
477 | (__HANDLE__)->Mask = 0x01FFU ; \ | ||
478 | } \ | ||
479 | else \ | ||
480 | { \ | ||
481 | (__HANDLE__)->Mask = 0x00FFU ; \ | ||
482 | } \ | ||
483 | } \ | ||
484 | else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_8B) \ | ||
485 | { \ | ||
486 | if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ | ||
487 | { \ | ||
488 | (__HANDLE__)->Mask = 0x00FFU ; \ | ||
489 | } \ | ||
490 | else \ | ||
491 | { \ | ||
492 | (__HANDLE__)->Mask = 0x007FU ; \ | ||
493 | } \ | ||
494 | } \ | ||
495 | else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_7B) \ | ||
496 | { \ | ||
497 | if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ | ||
498 | { \ | ||
499 | (__HANDLE__)->Mask = 0x007FU ; \ | ||
500 | } \ | ||
501 | else \ | ||
502 | { \ | ||
503 | (__HANDLE__)->Mask = 0x003FU ; \ | ||
504 | } \ | ||
505 | } \ | ||
506 | else \ | ||
507 | { \ | ||
508 | (__HANDLE__)->Mask = 0x0000U; \ | ||
509 | } \ | ||
510 | } while(0U) | ||
511 | |||
512 | #else | ||
513 | #define UART_MASK_COMPUTATION(__HANDLE__) \ | ||
514 | do { \ | ||
515 | if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_9B) \ | ||
516 | { \ | ||
517 | if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ | ||
518 | { \ | ||
519 | (__HANDLE__)->Mask = 0x01FFU ; \ | ||
520 | } \ | ||
521 | else \ | ||
522 | { \ | ||
523 | (__HANDLE__)->Mask = 0x00FFU ; \ | ||
524 | } \ | ||
525 | } \ | ||
526 | else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_8B) \ | ||
527 | { \ | ||
528 | if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ | ||
529 | { \ | ||
530 | (__HANDLE__)->Mask = 0x00FFU ; \ | ||
531 | } \ | ||
532 | else \ | ||
533 | { \ | ||
534 | (__HANDLE__)->Mask = 0x007FU ; \ | ||
535 | } \ | ||
536 | } \ | ||
537 | else \ | ||
538 | { \ | ||
539 | (__HANDLE__)->Mask = 0x0000U; \ | ||
540 | } \ | ||
541 | } while(0U) | ||
542 | |||
543 | #endif /* USART_CR1_M1 */ | ||
544 | |||
545 | /** | ||
546 | * @brief Ensure that UART frame length is valid. | ||
547 | * @param __LENGTH__ UART frame length. | ||
548 | * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) | ||
549 | */ | ||
550 | #if defined (USART_CR1_M1) | ||
551 | #define IS_UART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == UART_WORDLENGTH_7B) || \ | ||
552 | ((__LENGTH__) == UART_WORDLENGTH_8B) || \ | ||
553 | ((__LENGTH__) == UART_WORDLENGTH_9B)) | ||
554 | #else | ||
555 | #define IS_UART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == UART_WORDLENGTH_8B) || \ | ||
556 | ((__LENGTH__) == UART_WORDLENGTH_9B)) | ||
557 | #endif /* USART_CR1_M1 */ | ||
558 | |||
559 | /** | ||
560 | * @brief Ensure that UART wake-up address length is valid. | ||
561 | * @param __ADDRESS__ UART wake-up address length. | ||
562 | * @retval SET (__ADDRESS__ is valid) or RESET (__ADDRESS__ is invalid) | ||
563 | */ | ||
564 | #define IS_UART_ADDRESSLENGTH_DETECT(__ADDRESS__) (((__ADDRESS__) == UART_ADDRESS_DETECT_4B) || \ | ||
565 | ((__ADDRESS__) == UART_ADDRESS_DETECT_7B)) | ||
566 | |||
567 | /** | ||
568 | * @} | ||
569 | */ | ||
570 | |||
571 | /* Private functions ---------------------------------------------------------*/ | ||
572 | |||
573 | /** | ||
574 | * @} | ||
575 | */ | ||
576 | |||
577 | /** | ||
578 | * @} | ||
579 | */ | ||
580 | |||
581 | #ifdef __cplusplus | ||
582 | } | ||
583 | #endif | ||
584 | |||
585 | #endif /* STM32F0xx_HAL_UART_EX_H */ | ||
586 | |||
587 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
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1 | /** | ||
2 | ****************************************************************************** | ||
3 | * @file stm32f0xx_hal_uart_ex.c | ||
4 | * @author MCD Application Team | ||
5 | * @brief Extended UART HAL module driver. | ||
6 | * This file provides firmware functions to manage the following extended | ||
7 | * functionalities of the Universal Asynchronous Receiver Transmitter Peripheral (UART). | ||
8 | * + Initialization and de-initialization functions | ||
9 | * + Peripheral Control functions | ||
10 | * | ||
11 | * | ||
12 | @verbatim | ||
13 | ============================================================================== | ||
14 | ##### UART peripheral extended features ##### | ||
15 | ============================================================================== | ||
16 | |||
17 | (#) Declare a UART_HandleTypeDef handle structure. | ||
18 | |||
19 | (#) For the UART RS485 Driver Enable mode, initialize the UART registers | ||
20 | by calling the HAL_RS485Ex_Init() API. | ||
21 | |||
22 | @endverbatim | ||
23 | ****************************************************************************** | ||
24 | * @attention | ||
25 | * | ||
26 | * <h2><center>© Copyright (c) 2016 STMicroelectronics. | ||
27 | * All rights reserved.</center></h2> | ||
28 | * | ||
29 | * This software component is licensed by ST under BSD 3-Clause license, | ||
30 | * the "License"; You may not use this file except in compliance with the | ||
31 | * License. You may obtain a copy of the License at: | ||
32 | * opensource.org/licenses/BSD-3-Clause | ||
33 | * | ||
34 | ****************************************************************************** | ||
35 | */ | ||
36 | |||
37 | /* Includes ------------------------------------------------------------------*/ | ||
38 | #include "stm32f0xx_hal.h" | ||
39 | |||
40 | /** @addtogroup STM32F0xx_HAL_Driver | ||
41 | * @{ | ||
42 | */ | ||
43 | |||
44 | /** @defgroup UARTEx UARTEx | ||
45 | * @brief UART Extended HAL module driver | ||
46 | * @{ | ||
47 | */ | ||
48 | |||
49 | #ifdef HAL_UART_MODULE_ENABLED | ||
50 | |||
51 | /* Private typedef -----------------------------------------------------------*/ | ||
52 | /* Private define ------------------------------------------------------------*/ | ||
53 | |||
54 | /* Private macros ------------------------------------------------------------*/ | ||
55 | /* Private variables ---------------------------------------------------------*/ | ||
56 | /* Private function prototypes -----------------------------------------------*/ | ||
57 | /** @defgroup UARTEx_Private_Functions UARTEx Private Functions | ||
58 | * @{ | ||
59 | */ | ||
60 | #if defined(USART_CR1_UESM) | ||
61 | static void UARTEx_Wakeup_AddressConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection); | ||
62 | #endif /* USART_CR1_UESM */ | ||
63 | /** | ||
64 | * @} | ||
65 | */ | ||
66 | |||
67 | /* Exported functions --------------------------------------------------------*/ | ||
68 | |||
69 | /** @defgroup UARTEx_Exported_Functions UARTEx Exported Functions | ||
70 | * @{ | ||
71 | */ | ||
72 | |||
73 | /** @defgroup UARTEx_Exported_Functions_Group1 Initialization and de-initialization functions | ||
74 | * @brief Extended Initialization and Configuration Functions | ||
75 | * | ||
76 | @verbatim | ||
77 | =============================================================================== | ||
78 | ##### Initialization and Configuration functions ##### | ||
79 | =============================================================================== | ||
80 | [..] | ||
81 | This subsection provides a set of functions allowing to initialize the USARTx or the UARTy | ||
82 | in asynchronous mode. | ||
83 | (+) For the asynchronous mode the parameters below can be configured: | ||
84 | (++) Baud Rate | ||
85 | (++) Word Length | ||
86 | (++) Stop Bit | ||
87 | (++) Parity: If the parity is enabled, then the MSB bit of the data written | ||
88 | in the data register is transmitted but is changed by the parity bit. | ||
89 | (++) Hardware flow control | ||
90 | (++) Receiver/transmitter modes | ||
91 | (++) Over Sampling Method | ||
92 | (++) One-Bit Sampling Method | ||
93 | (+) For the asynchronous mode, the following advanced features can be configured as well: | ||
94 | (++) TX and/or RX pin level inversion | ||
95 | (++) data logical level inversion | ||
96 | (++) RX and TX pins swap | ||
97 | (++) RX overrun detection disabling | ||
98 | (++) DMA disabling on RX error | ||
99 | (++) MSB first on communication line | ||
100 | (++) auto Baud rate detection | ||
101 | [..] | ||
102 | The HAL_RS485Ex_Init() API follows the UART RS485 mode configuration | ||
103 | procedures (details for the procedures are available in reference manual). | ||
104 | |||
105 | @endverbatim | ||
106 | |||
107 | Depending on the frame length defined by the M1 and M0 bits (7-bit, | ||
108 | 8-bit or 9-bit), the possible UART formats are listed in the | ||
109 | following table. | ||
110 | |||
111 | Table 1. UART frame format. | ||
112 | +-----------------------------------------------------------------------+ | ||
113 | | M1 bit | M0 bit | PCE bit | UART frame | | ||
114 | |---------|---------|-----------|---------------------------------------| | ||
115 | | 0 | 0 | 0 | | SB | 8 bit data | STB | | | ||
116 | |---------|---------|-----------|---------------------------------------| | ||
117 | | 0 | 0 | 1 | | SB | 7 bit data | PB | STB | | | ||
118 | |---------|---------|-----------|---------------------------------------| | ||
119 | | 0 | 1 | 0 | | SB | 9 bit data | STB | | | ||
120 | |---------|---------|-----------|---------------------------------------| | ||
121 | | 0 | 1 | 1 | | SB | 8 bit data | PB | STB | | | ||
122 | |---------|---------|-----------|---------------------------------------| | ||
123 | | 1 | 0 | 0 | | SB | 7 bit data | STB | | | ||
124 | |---------|---------|-----------|---------------------------------------| | ||
125 | | 1 | 0 | 1 | | SB | 6 bit data | PB | STB | | | ||
126 | +-----------------------------------------------------------------------+ | ||
127 | |||
128 | * @{ | ||
129 | */ | ||
130 | |||
131 | /** | ||
132 | * @brief Initialize the RS485 Driver enable feature according to the specified | ||
133 | * parameters in the UART_InitTypeDef and creates the associated handle. | ||
134 | * @param huart UART handle. | ||
135 | * @param Polarity Select the driver enable polarity. | ||
136 | * This parameter can be one of the following values: | ||
137 | * @arg @ref UART_DE_POLARITY_HIGH DE signal is active high | ||
138 | * @arg @ref UART_DE_POLARITY_LOW DE signal is active low | ||
139 | * @param AssertionTime Driver Enable assertion time: | ||
140 | * 5-bit value defining the time between the activation of the DE (Driver Enable) | ||
141 | * signal and the beginning of the start bit. It is expressed in sample time | ||
142 | * units (1/8 or 1/16 bit time, depending on the oversampling rate) | ||
143 | * @param DeassertionTime Driver Enable deassertion time: | ||
144 | * 5-bit value defining the time between the end of the last stop bit, in a | ||
145 | * transmitted message, and the de-activation of the DE (Driver Enable) signal. | ||
146 | * It is expressed in sample time units (1/8 or 1/16 bit time, depending on the | ||
147 | * oversampling rate). | ||
148 | * @retval HAL status | ||
149 | */ | ||
150 | HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t AssertionTime, | ||
151 | uint32_t DeassertionTime) | ||
152 | { | ||
153 | uint32_t temp; | ||
154 | |||
155 | /* Check the UART handle allocation */ | ||
156 | if (huart == NULL) | ||
157 | { | ||
158 | return HAL_ERROR; | ||
159 | } | ||
160 | /* Check the Driver Enable UART instance */ | ||
161 | assert_param(IS_UART_DRIVER_ENABLE_INSTANCE(huart->Instance)); | ||
162 | |||
163 | /* Check the Driver Enable polarity */ | ||
164 | assert_param(IS_UART_DE_POLARITY(Polarity)); | ||
165 | |||
166 | /* Check the Driver Enable assertion time */ | ||
167 | assert_param(IS_UART_ASSERTIONTIME(AssertionTime)); | ||
168 | |||
169 | /* Check the Driver Enable deassertion time */ | ||
170 | assert_param(IS_UART_DEASSERTIONTIME(DeassertionTime)); | ||
171 | |||
172 | if (huart->gState == HAL_UART_STATE_RESET) | ||
173 | { | ||
174 | /* Allocate lock resource and initialize it */ | ||
175 | huart->Lock = HAL_UNLOCKED; | ||
176 | |||
177 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) | ||
178 | UART_InitCallbacksToDefault(huart); | ||
179 | |||
180 | if (huart->MspInitCallback == NULL) | ||
181 | { | ||
182 | huart->MspInitCallback = HAL_UART_MspInit; | ||
183 | } | ||
184 | |||
185 | /* Init the low level hardware */ | ||
186 | huart->MspInitCallback(huart); | ||
187 | #else | ||
188 | /* Init the low level hardware : GPIO, CLOCK, CORTEX */ | ||
189 | HAL_UART_MspInit(huart); | ||
190 | #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ | ||
191 | } | ||
192 | |||
193 | huart->gState = HAL_UART_STATE_BUSY; | ||
194 | |||
195 | /* Disable the Peripheral */ | ||
196 | __HAL_UART_DISABLE(huart); | ||
197 | |||
198 | /* Set the UART Communication parameters */ | ||
199 | if (UART_SetConfig(huart) == HAL_ERROR) | ||
200 | { | ||
201 | return HAL_ERROR; | ||
202 | } | ||
203 | |||
204 | if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) | ||
205 | { | ||
206 | UART_AdvFeatureConfig(huart); | ||
207 | } | ||
208 | |||
209 | /* Enable the Driver Enable mode by setting the DEM bit in the CR3 register */ | ||
210 | SET_BIT(huart->Instance->CR3, USART_CR3_DEM); | ||
211 | |||
212 | /* Set the Driver Enable polarity */ | ||
213 | MODIFY_REG(huart->Instance->CR3, USART_CR3_DEP, Polarity); | ||
214 | |||
215 | /* Set the Driver Enable assertion and deassertion times */ | ||
216 | temp = (AssertionTime << UART_CR1_DEAT_ADDRESS_LSB_POS); | ||
217 | temp |= (DeassertionTime << UART_CR1_DEDT_ADDRESS_LSB_POS); | ||
218 | MODIFY_REG(huart->Instance->CR1, (USART_CR1_DEDT | USART_CR1_DEAT), temp); | ||
219 | |||
220 | /* Enable the Peripheral */ | ||
221 | __HAL_UART_ENABLE(huart); | ||
222 | |||
223 | /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */ | ||
224 | return (UART_CheckIdleState(huart)); | ||
225 | } | ||
226 | |||
227 | /** | ||
228 | * @} | ||
229 | */ | ||
230 | |||
231 | /** @defgroup UARTEx_Exported_Functions_Group2 IO operation functions | ||
232 | * @brief Extended functions | ||
233 | * | ||
234 | @verbatim | ||
235 | =============================================================================== | ||
236 | ##### IO operation functions ##### | ||
237 | =============================================================================== | ||
238 | This subsection provides a set of Wakeup and FIFO mode related callback functions. | ||
239 | |||
240 | #if defined(USART_CR1_UESM) | ||
241 | (#) Wakeup from Stop mode Callback: | ||
242 | (+) HAL_UARTEx_WakeupCallback() | ||
243 | |||
244 | #endif | ||
245 | @endverbatim | ||
246 | * @{ | ||
247 | */ | ||
248 | |||
249 | #if defined(USART_CR1_UESM) | ||
250 | /** | ||
251 | * @brief UART wakeup from Stop mode callback. | ||
252 | * @param huart UART handle. | ||
253 | * @retval None | ||
254 | */ | ||
255 | __weak void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart) | ||
256 | { | ||
257 | /* Prevent unused argument(s) compilation warning */ | ||
258 | UNUSED(huart); | ||
259 | |||
260 | /* NOTE : This function should not be modified, when the callback is needed, | ||
261 | the HAL_UARTEx_WakeupCallback can be implemented in the user file. | ||
262 | */ | ||
263 | } | ||
264 | |||
265 | #endif /* USART_CR1_UESM */ | ||
266 | |||
267 | /** | ||
268 | * @} | ||
269 | */ | ||
270 | |||
271 | /** @defgroup UARTEx_Exported_Functions_Group3 Peripheral Control functions | ||
272 | * @brief Extended Peripheral Control functions | ||
273 | * | ||
274 | @verbatim | ||
275 | =============================================================================== | ||
276 | ##### Peripheral Control functions ##### | ||
277 | =============================================================================== | ||
278 | [..] This section provides the following functions: | ||
279 | (+) HAL_MultiProcessorEx_AddressLength_Set() API optionally sets the UART node address | ||
280 | detection length to more than 4 bits for multiprocessor address mark wake up. | ||
281 | #if defined(USART_CR1_UESM) | ||
282 | (+) HAL_UARTEx_StopModeWakeUpSourceConfig() API defines the wake-up from stop mode | ||
283 | trigger: address match, Start Bit detection or RXNE bit status. | ||
284 | (+) HAL_UARTEx_EnableStopMode() API enables the UART to wake up the MCU from stop mode | ||
285 | (+) HAL_UARTEx_DisableStopMode() API disables the above functionality | ||
286 | #endif | ||
287 | |||
288 | @endverbatim | ||
289 | * @{ | ||
290 | */ | ||
291 | |||
292 | /** | ||
293 | * @brief By default in multiprocessor mode, when the wake up method is set | ||
294 | * to address mark, the UART handles only 4-bit long addresses detection; | ||
295 | * this API allows to enable longer addresses detection (6-, 7- or 8-bit | ||
296 | * long). | ||
297 | * @note Addresses detection lengths are: 6-bit address detection in 7-bit data mode, | ||
298 | * 7-bit address detection in 8-bit data mode, 8-bit address detection in 9-bit data mode. | ||
299 | * @param huart UART handle. | ||
300 | * @param AddressLength This parameter can be one of the following values: | ||
301 | * @arg @ref UART_ADDRESS_DETECT_4B 4-bit long address | ||
302 | * @arg @ref UART_ADDRESS_DETECT_7B 6-, 7- or 8-bit long address | ||
303 | * @retval HAL status | ||
304 | */ | ||
305 | HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t AddressLength) | ||
306 | { | ||
307 | /* Check the UART handle allocation */ | ||
308 | if (huart == NULL) | ||
309 | { | ||
310 | return HAL_ERROR; | ||
311 | } | ||
312 | |||
313 | /* Check the address length parameter */ | ||
314 | assert_param(IS_UART_ADDRESSLENGTH_DETECT(AddressLength)); | ||
315 | |||
316 | huart->gState = HAL_UART_STATE_BUSY; | ||
317 | |||
318 | /* Disable the Peripheral */ | ||
319 | __HAL_UART_DISABLE(huart); | ||
320 | |||
321 | /* Set the address length */ | ||
322 | MODIFY_REG(huart->Instance->CR2, USART_CR2_ADDM7, AddressLength); | ||
323 | |||
324 | /* Enable the Peripheral */ | ||
325 | __HAL_UART_ENABLE(huart); | ||
326 | |||
327 | /* TEACK and/or REACK to check before moving huart->gState to Ready */ | ||
328 | return (UART_CheckIdleState(huart)); | ||
329 | } | ||
330 | |||
331 | #if defined(USART_CR1_UESM) | ||
332 | /** | ||
333 | * @brief Set Wakeup from Stop mode interrupt flag selection. | ||
334 | * @note It is the application responsibility to enable the interrupt used as | ||
335 | * usart_wkup interrupt source before entering low-power mode. | ||
336 | * @param huart UART handle. | ||
337 | * @param WakeUpSelection Address match, Start Bit detection or RXNE/RXFNE bit status. | ||
338 | * This parameter can be one of the following values: | ||
339 | * @arg @ref UART_WAKEUP_ON_ADDRESS | ||
340 | * @arg @ref UART_WAKEUP_ON_STARTBIT | ||
341 | * @arg @ref UART_WAKEUP_ON_READDATA_NONEMPTY | ||
342 | * @retval HAL status | ||
343 | */ | ||
344 | HAL_StatusTypeDef HAL_UARTEx_StopModeWakeUpSourceConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection) | ||
345 | { | ||
346 | HAL_StatusTypeDef status = HAL_OK; | ||
347 | uint32_t tickstart; | ||
348 | |||
349 | /* check the wake-up from stop mode UART instance */ | ||
350 | assert_param(IS_UART_WAKEUP_FROMSTOP_INSTANCE(huart->Instance)); | ||
351 | /* check the wake-up selection parameter */ | ||
352 | assert_param(IS_UART_WAKEUP_SELECTION(WakeUpSelection.WakeUpEvent)); | ||
353 | |||
354 | /* Process Locked */ | ||
355 | __HAL_LOCK(huart); | ||
356 | |||
357 | huart->gState = HAL_UART_STATE_BUSY; | ||
358 | |||
359 | /* Disable the Peripheral */ | ||
360 | __HAL_UART_DISABLE(huart); | ||
361 | |||
362 | /* Set the wake-up selection scheme */ | ||
363 | MODIFY_REG(huart->Instance->CR3, USART_CR3_WUS, WakeUpSelection.WakeUpEvent); | ||
364 | |||
365 | if (WakeUpSelection.WakeUpEvent == UART_WAKEUP_ON_ADDRESS) | ||
366 | { | ||
367 | UARTEx_Wakeup_AddressConfig(huart, WakeUpSelection); | ||
368 | } | ||
369 | |||
370 | /* Enable the Peripheral */ | ||
371 | __HAL_UART_ENABLE(huart); | ||
372 | |||
373 | /* Init tickstart for timeout managment*/ | ||
374 | tickstart = HAL_GetTick(); | ||
375 | |||
376 | /* Wait until REACK flag is set */ | ||
377 | if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK) | ||
378 | { | ||
379 | status = HAL_TIMEOUT; | ||
380 | } | ||
381 | else | ||
382 | { | ||
383 | /* Initialize the UART State */ | ||
384 | huart->gState = HAL_UART_STATE_READY; | ||
385 | } | ||
386 | |||
387 | /* Process Unlocked */ | ||
388 | __HAL_UNLOCK(huart); | ||
389 | |||
390 | return status; | ||
391 | } | ||
392 | |||
393 | /** | ||
394 | * @brief Enable UART Stop Mode. | ||
395 | * @note The UART is able to wake up the MCU from Stop 1 mode as long as UART clock is HSI or LSE. | ||
396 | * @param huart UART handle. | ||
397 | * @retval HAL status | ||
398 | */ | ||
399 | HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart) | ||
400 | { | ||
401 | /* Process Locked */ | ||
402 | __HAL_LOCK(huart); | ||
403 | |||
404 | /* Set UESM bit */ | ||
405 | SET_BIT(huart->Instance->CR1, USART_CR1_UESM); | ||
406 | |||
407 | /* Process Unlocked */ | ||
408 | __HAL_UNLOCK(huart); | ||
409 | |||
410 | return HAL_OK; | ||
411 | } | ||
412 | |||
413 | /** | ||
414 | * @brief Disable UART Stop Mode. | ||
415 | * @param huart UART handle. | ||
416 | * @retval HAL status | ||
417 | */ | ||
418 | HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart) | ||
419 | { | ||
420 | /* Process Locked */ | ||
421 | __HAL_LOCK(huart); | ||
422 | |||
423 | /* Clear UESM bit */ | ||
424 | CLEAR_BIT(huart->Instance->CR1, USART_CR1_UESM); | ||
425 | |||
426 | /* Process Unlocked */ | ||
427 | __HAL_UNLOCK(huart); | ||
428 | |||
429 | return HAL_OK; | ||
430 | } | ||
431 | |||
432 | #endif /* USART_CR1_UESM */ | ||
433 | /** | ||
434 | * @} | ||
435 | */ | ||
436 | |||
437 | /** | ||
438 | * @} | ||
439 | */ | ||
440 | |||
441 | /** @addtogroup UARTEx_Private_Functions | ||
442 | * @{ | ||
443 | */ | ||
444 | #if defined(USART_CR1_UESM) | ||
445 | |||
446 | /** | ||
447 | * @brief Initialize the UART wake-up from stop mode parameters when triggered by address detection. | ||
448 | * @param huart UART handle. | ||
449 | * @param WakeUpSelection UART wake up from stop mode parameters. | ||
450 | * @retval None | ||
451 | */ | ||
452 | static void UARTEx_Wakeup_AddressConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection) | ||
453 | { | ||
454 | assert_param(IS_UART_ADDRESSLENGTH_DETECT(WakeUpSelection.AddressLength)); | ||
455 | |||
456 | /* Set the USART address length */ | ||
457 | MODIFY_REG(huart->Instance->CR2, USART_CR2_ADDM7, WakeUpSelection.AddressLength); | ||
458 | |||
459 | /* Set the USART address node */ | ||
460 | MODIFY_REG(huart->Instance->CR2, USART_CR2_ADD, ((uint32_t)WakeUpSelection.Address << UART_CR2_ADDRESS_LSB_POS)); | ||
461 | } | ||
462 | #endif /* USART_CR1_UESM */ | ||
463 | |||
464 | /** | ||
465 | * @} | ||
466 | */ | ||
467 | |||
468 | #endif /* HAL_UART_MODULE_ENABLED */ | ||
469 | |||
470 | /** | ||
471 | * @} | ||
472 | */ | ||
473 | |||
474 | /** | ||
475 | * @} | ||
476 | */ | ||
477 | |||
478 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
1 | #MicroXplorer Configuration settings - do not modify | 1 | #MicroXplorer Configuration settings - do not modify |
2 | FREERTOS.FootprintOK=true | 2 | FREERTOS.FootprintOK=true |
3 | FREERTOS.IPParameters=Tasks01,FootprintOK,configTOTAL_HEAP_SIZE | 3 | FREERTOS.IPParameters=Tasks01,FootprintOK,configTOTAL_HEAP_SIZE |
4 | FREERTOS.Tasks01=LEDTask,24,128,StartLEDTask,Default,NULL,Dynamic,NULL,NULL;KeyScanTask,17,128,StartKeyScanTask,Default,NULL,Dynamic,NULL,NULL | 4 | FREERTOS.Tasks01=LEDTask,24,128,StartLEDTask,Default,NULL,Dynamic,NULL,NULL;KeyScanTask,24,128,StartKeyScanTask,Default,NULL,Dynamic,NULL,NULL;UartTask,24,128,StartUartTask,Default,NULL,Dynamic,NULL,NULL;CoreTask,8,128,StartCoreTask,Default,NULL,Dynamic,NULL,NULL |
5 | FREERTOS.configTOTAL_HEAP_SIZE=3072 | 5 | FREERTOS.configTOTAL_HEAP_SIZE=2560 |
6 | File.Version=6 | 6 | File.Version=6 |
7 | KeepUserPlacement=false | 7 | KeepUserPlacement=false |
8 | Mcu.Family=STM32F0 | 8 | Mcu.Family=STM32F0 |
... | @@ -10,22 +10,28 @@ Mcu.IP0=FREERTOS | ... | @@ -10,22 +10,28 @@ Mcu.IP0=FREERTOS |
10 | Mcu.IP1=NVIC | 10 | Mcu.IP1=NVIC |
11 | Mcu.IP2=RCC | 11 | Mcu.IP2=RCC |
12 | Mcu.IP3=SYS | 12 | Mcu.IP3=SYS |
13 | Mcu.IPNb=4 | 13 | Mcu.IP4=USART1 |
14 | Mcu.IP5=USART2 | ||
15 | Mcu.IPNb=6 | ||
14 | Mcu.Name=STM32F030C8Tx | 16 | Mcu.Name=STM32F030C8Tx |
15 | Mcu.Package=LQFP48 | 17 | Mcu.Package=LQFP48 |
16 | Mcu.Pin0=PC14-OSC32_IN | 18 | Mcu.Pin0=PC14-OSC32_IN |
17 | Mcu.Pin1=PC15-OSC32_OUT | 19 | Mcu.Pin1=PC15-OSC32_OUT |
18 | Mcu.Pin10=VP_FREERTOS_VS_CMSIS_V2 | 20 | Mcu.Pin10=PA14 |
19 | Mcu.Pin11=VP_SYS_VS_tim1 | 21 | Mcu.Pin11=PB6 |
22 | Mcu.Pin12=PB7 | ||
23 | Mcu.Pin13=PB9 | ||
24 | Mcu.Pin14=VP_FREERTOS_VS_CMSIS_V2 | ||
25 | Mcu.Pin15=VP_SYS_VS_tim1 | ||
20 | Mcu.Pin2=PF0-OSC_IN | 26 | Mcu.Pin2=PF0-OSC_IN |
21 | Mcu.Pin3=PF1-OSC_OUT | 27 | Mcu.Pin3=PF1-OSC_OUT |
22 | Mcu.Pin4=PA12 | 28 | Mcu.Pin4=PA2 |
23 | Mcu.Pin5=PA13 | 29 | Mcu.Pin5=PA3 |
24 | Mcu.Pin6=PA14 | 30 | Mcu.Pin6=PA9 |
25 | Mcu.Pin7=PB6 | 31 | Mcu.Pin7=PA10 |
26 | Mcu.Pin8=PB7 | 32 | Mcu.Pin8=PA12 |
27 | Mcu.Pin9=PB9 | 33 | Mcu.Pin9=PA13 |
28 | Mcu.PinsNb=12 | 34 | Mcu.PinsNb=16 |
29 | Mcu.ThirdPartyNb=0 | 35 | Mcu.ThirdPartyNb=0 |
30 | Mcu.UserConstants= | 36 | Mcu.UserConstants= |
31 | Mcu.UserName=STM32F030C8Tx | 37 | Mcu.UserName=STM32F030C8Tx |
... | @@ -40,16 +46,31 @@ NVIC.SysTick_IRQn=true\:3\:0\:false\:false\:false\:true\:false\:false | ... | @@ -40,16 +46,31 @@ NVIC.SysTick_IRQn=true\:3\:0\:false\:false\:false\:true\:false\:false |
40 | NVIC.TIM1_BRK_UP_TRG_COM_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true | 46 | NVIC.TIM1_BRK_UP_TRG_COM_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true |
41 | NVIC.TimeBase=TIM1_BRK_UP_TRG_COM_IRQn | 47 | NVIC.TimeBase=TIM1_BRK_UP_TRG_COM_IRQn |
42 | NVIC.TimeBaseIP=TIM1 | 48 | NVIC.TimeBaseIP=TIM1 |
43 | PA12.GPIOParameters=GPIO_Speed,GPIO_PuPd,GPIO_Label | 49 | NVIC.USART2_IRQn=true\:3\:0\:false\:false\:true\:true\:true\:true |
50 | PA10.GPIOParameters=GPIO_Speed,GPIO_PuPd,GPIO_Label | ||
51 | PA10.GPIO_Label=DEBUG_RX | ||
52 | PA10.GPIO_PuPd=GPIO_PULLUP | ||
53 | PA10.GPIO_Speed=GPIO_SPEED_FREQ_MEDIUM | ||
54 | PA10.Mode=Asynchronous | ||
55 | PA10.Signal=USART1_RX | ||
56 | PA12.GPIOParameters=GPIO_Label | ||
44 | PA12.GPIO_Label=BEEP | 57 | PA12.GPIO_Label=BEEP |
45 | PA12.GPIO_PuPd=GPIO_PULLDOWN | ||
46 | PA12.GPIO_Speed=GPIO_SPEED_FREQ_HIGH | ||
47 | PA12.Locked=true | 58 | PA12.Locked=true |
48 | PA12.Signal=GPIO_Output | 59 | PA12.Signal=GPIO_Output |
49 | PA13.Mode=Serial_Wire | 60 | PA13.Mode=Serial_Wire |
50 | PA13.Signal=SYS_SWDIO | 61 | PA13.Signal=SYS_SWDIO |
51 | PA14.Mode=Serial_Wire | 62 | PA14.Mode=Serial_Wire |
52 | PA14.Signal=SYS_SWCLK | 63 | PA14.Signal=SYS_SWCLK |
64 | PA2.Mode=Asynchronous | ||
65 | PA2.Signal=USART2_TX | ||
66 | PA3.Mode=Asynchronous | ||
67 | PA3.Signal=USART2_RX | ||
68 | PA9.GPIOParameters=GPIO_Speed,GPIO_PuPd,GPIO_Label | ||
69 | PA9.GPIO_Label=DEBUG_TX | ||
70 | PA9.GPIO_PuPd=GPIO_PULLUP | ||
71 | PA9.GPIO_Speed=GPIO_SPEED_FREQ_MEDIUM | ||
72 | PA9.Mode=Asynchronous | ||
73 | PA9.Signal=USART1_TX | ||
53 | PB6.GPIOParameters=GPIO_Speed,GPIO_PuPd,GPIO_Label | 74 | PB6.GPIOParameters=GPIO_Speed,GPIO_PuPd,GPIO_Label |
54 | PB6.GPIO_Label=LED2 | 75 | PB6.GPIO_Label=LED2 |
55 | PB6.GPIO_PuPd=GPIO_PULLDOWN | 76 | PB6.GPIO_PuPd=GPIO_PULLDOWN |
... | @@ -111,7 +132,7 @@ ProjectManager.StackSize=0x400 | ... | @@ -111,7 +132,7 @@ ProjectManager.StackSize=0x400 |
111 | ProjectManager.TargetToolchain=STM32CubeIDE | 132 | ProjectManager.TargetToolchain=STM32CubeIDE |
112 | ProjectManager.ToolChainLocation= | 133 | ProjectManager.ToolChainLocation= |
113 | ProjectManager.UnderRoot=true | 134 | ProjectManager.UnderRoot=true |
114 | ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,1-MX_GPIO_Init-GPIO-false-HAL-true | 135 | ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,1-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_USART1_UART_Init-USART1-false-HAL-true |
115 | RCC.AHBFreq_Value=48000000 | 136 | RCC.AHBFreq_Value=48000000 |
116 | RCC.APB1Freq_Value=48000000 | 137 | RCC.APB1Freq_Value=48000000 |
117 | RCC.APB1TimFreq_Value=48000000 | 138 | RCC.APB1TimFreq_Value=48000000 |
... | @@ -127,6 +148,12 @@ RCC.SYSCLKFreq_VALUE=48000000 | ... | @@ -127,6 +148,12 @@ RCC.SYSCLKFreq_VALUE=48000000 |
127 | RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK | 148 | RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK |
128 | RCC.TimSysFreq_Value=48000000 | 149 | RCC.TimSysFreq_Value=48000000 |
129 | RCC.USART1Freq_Value=48000000 | 150 | RCC.USART1Freq_Value=48000000 |
151 | USART1.BaudRate=115200 | ||
152 | USART1.IPParameters=VirtualMode-Asynchronous,BaudRate | ||
153 | USART1.VirtualMode-Asynchronous=VM_ASYNC | ||
154 | USART2.BaudRate=115200 | ||
155 | USART2.IPParameters=VirtualMode-Asynchronous,BaudRate | ||
156 | USART2.VirtualMode-Asynchronous=VM_ASYNC | ||
130 | VP_FREERTOS_VS_CMSIS_V2.Mode=CMSIS_V2 | 157 | VP_FREERTOS_VS_CMSIS_V2.Mode=CMSIS_V2 |
131 | VP_FREERTOS_VS_CMSIS_V2.Signal=FREERTOS_VS_CMSIS_V2 | 158 | VP_FREERTOS_VS_CMSIS_V2.Signal=FREERTOS_VS_CMSIS_V2 |
132 | VP_SYS_VS_tim1.Mode=TIM1 | 159 | VP_SYS_VS_tim1.Mode=TIM1 | ... | ... |
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