STM32Test.list 472 KB
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STM32Test.elf:     file format elf32-littlearm

Sections:
Idx Name          Size      VMA       LMA       File off  Algn
  0 .isr_vector   000000c0  08000000  08000000  00010000  2**0
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  1 .text         00003e70  080000c0  080000c0  000100c0  2**4
                  CONTENTS, ALLOC, LOAD, READONLY, CODE
  2 .rodata       0000008c  08003f30  08003f30  00013f30  2**2
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  3 .ARM.extab    00000000  08003fbc  08003fbc  00020010  2**0
                  CONTENTS
  4 .ARM          00000000  08003fbc  08003fbc  00020010  2**0
                  CONTENTS
  5 .preinit_array 00000000  08003fbc  08003fbc  00020010  2**0
                  CONTENTS, ALLOC, LOAD, DATA
  6 .init_array   00000004  08003fbc  08003fbc  00013fbc  2**2
                  CONTENTS, ALLOC, LOAD, DATA
  7 .fini_array   00000004  08003fc0  08003fc0  00013fc0  2**2
                  CONTENTS, ALLOC, LOAD, DATA
  8 .data         00000010  20000000  08003fc4  00020000  2**2
                  CONTENTS, ALLOC, LOAD, DATA
  9 .bss          000019ac  20000010  08003fd4  00020010  2**2
                  ALLOC
 10 ._user_heap_stack 00000604  200019bc  08003fd4  000219bc  2**0
                  ALLOC
 11 .ARM.attributes 00000028  00000000  00000000  00020010  2**0
                  CONTENTS, READONLY
 12 .debug_info   0001204d  00000000  00000000  00020038  2**0
                  CONTENTS, READONLY, DEBUGGING
 13 .debug_abbrev 00002a46  00000000  00000000  00032085  2**0
                  CONTENTS, READONLY, DEBUGGING
 14 .debug_aranges 00001098  00000000  00000000  00034ad0  2**3
                  CONTENTS, READONLY, DEBUGGING
 15 .debug_ranges 00000f20  00000000  00000000  00035b68  2**3
                  CONTENTS, READONLY, DEBUGGING
 16 .debug_macro  0000dffd  00000000  00000000  00036a88  2**0
                  CONTENTS, READONLY, DEBUGGING
 17 .debug_line   0000e96a  00000000  00000000  00044a85  2**0
                  CONTENTS, READONLY, DEBUGGING
 18 .debug_str    0005094a  00000000  00000000  000533ef  2**0
                  CONTENTS, READONLY, DEBUGGING
 19 .comment      0000007b  00000000  00000000  000a3d39  2**0
                  CONTENTS, READONLY
 20 .debug_frame  00003a08  00000000  00000000  000a3db4  2**2
                  CONTENTS, READONLY, DEBUGGING

Disassembly of section .text:

080000c0 <__do_global_dtors_aux>:
 80000c0:	b510      	push	{r4, lr}
 80000c2:	4c06      	ldr	r4, [pc, #24]	; (80000dc <__do_global_dtors_aux+0x1c>)
 80000c4:	7823      	ldrb	r3, [r4, #0]
 80000c6:	2b00      	cmp	r3, #0
 80000c8:	d107      	bne.n	80000da <__do_global_dtors_aux+0x1a>
 80000ca:	4b05      	ldr	r3, [pc, #20]	; (80000e0 <__do_global_dtors_aux+0x20>)
 80000cc:	2b00      	cmp	r3, #0
 80000ce:	d002      	beq.n	80000d6 <__do_global_dtors_aux+0x16>
 80000d0:	4804      	ldr	r0, [pc, #16]	; (80000e4 <__do_global_dtors_aux+0x24>)
 80000d2:	e000      	b.n	80000d6 <__do_global_dtors_aux+0x16>
 80000d4:	bf00      	nop
 80000d6:	2301      	movs	r3, #1
 80000d8:	7023      	strb	r3, [r4, #0]
 80000da:	bd10      	pop	{r4, pc}
 80000dc:	20000010 	.word	0x20000010
 80000e0:	00000000 	.word	0x00000000
 80000e4:	08003f18 	.word	0x08003f18

080000e8 <frame_dummy>:
 80000e8:	4b04      	ldr	r3, [pc, #16]	; (80000fc <frame_dummy+0x14>)
 80000ea:	b510      	push	{r4, lr}
 80000ec:	2b00      	cmp	r3, #0
 80000ee:	d003      	beq.n	80000f8 <frame_dummy+0x10>
 80000f0:	4903      	ldr	r1, [pc, #12]	; (8000100 <frame_dummy+0x18>)
 80000f2:	4804      	ldr	r0, [pc, #16]	; (8000104 <frame_dummy+0x1c>)
 80000f4:	e000      	b.n	80000f8 <frame_dummy+0x10>
 80000f6:	bf00      	nop
 80000f8:	bd10      	pop	{r4, pc}
 80000fa:	46c0      	nop			; (mov r8, r8)
 80000fc:	00000000 	.word	0x00000000
 8000100:	20000014 	.word	0x20000014
 8000104:	08003f18 	.word	0x08003f18

08000108 <__udivsi3>:
 8000108:	2200      	movs	r2, #0
 800010a:	0843      	lsrs	r3, r0, #1
 800010c:	428b      	cmp	r3, r1
 800010e:	d374      	bcc.n	80001fa <__udivsi3+0xf2>
 8000110:	0903      	lsrs	r3, r0, #4
 8000112:	428b      	cmp	r3, r1
 8000114:	d35f      	bcc.n	80001d6 <__udivsi3+0xce>
 8000116:	0a03      	lsrs	r3, r0, #8
 8000118:	428b      	cmp	r3, r1
 800011a:	d344      	bcc.n	80001a6 <__udivsi3+0x9e>
 800011c:	0b03      	lsrs	r3, r0, #12
 800011e:	428b      	cmp	r3, r1
 8000120:	d328      	bcc.n	8000174 <__udivsi3+0x6c>
 8000122:	0c03      	lsrs	r3, r0, #16
 8000124:	428b      	cmp	r3, r1
 8000126:	d30d      	bcc.n	8000144 <__udivsi3+0x3c>
 8000128:	22ff      	movs	r2, #255	; 0xff
 800012a:	0209      	lsls	r1, r1, #8
 800012c:	ba12      	rev	r2, r2
 800012e:	0c03      	lsrs	r3, r0, #16
 8000130:	428b      	cmp	r3, r1
 8000132:	d302      	bcc.n	800013a <__udivsi3+0x32>
 8000134:	1212      	asrs	r2, r2, #8
 8000136:	0209      	lsls	r1, r1, #8
 8000138:	d065      	beq.n	8000206 <__udivsi3+0xfe>
 800013a:	0b03      	lsrs	r3, r0, #12
 800013c:	428b      	cmp	r3, r1
 800013e:	d319      	bcc.n	8000174 <__udivsi3+0x6c>
 8000140:	e000      	b.n	8000144 <__udivsi3+0x3c>
 8000142:	0a09      	lsrs	r1, r1, #8
 8000144:	0bc3      	lsrs	r3, r0, #15
 8000146:	428b      	cmp	r3, r1
 8000148:	d301      	bcc.n	800014e <__udivsi3+0x46>
 800014a:	03cb      	lsls	r3, r1, #15
 800014c:	1ac0      	subs	r0, r0, r3
 800014e:	4152      	adcs	r2, r2
 8000150:	0b83      	lsrs	r3, r0, #14
 8000152:	428b      	cmp	r3, r1
 8000154:	d301      	bcc.n	800015a <__udivsi3+0x52>
 8000156:	038b      	lsls	r3, r1, #14
 8000158:	1ac0      	subs	r0, r0, r3
 800015a:	4152      	adcs	r2, r2
 800015c:	0b43      	lsrs	r3, r0, #13
 800015e:	428b      	cmp	r3, r1
 8000160:	d301      	bcc.n	8000166 <__udivsi3+0x5e>
 8000162:	034b      	lsls	r3, r1, #13
 8000164:	1ac0      	subs	r0, r0, r3
 8000166:	4152      	adcs	r2, r2
 8000168:	0b03      	lsrs	r3, r0, #12
 800016a:	428b      	cmp	r3, r1
 800016c:	d301      	bcc.n	8000172 <__udivsi3+0x6a>
 800016e:	030b      	lsls	r3, r1, #12
 8000170:	1ac0      	subs	r0, r0, r3
 8000172:	4152      	adcs	r2, r2
 8000174:	0ac3      	lsrs	r3, r0, #11
 8000176:	428b      	cmp	r3, r1
 8000178:	d301      	bcc.n	800017e <__udivsi3+0x76>
 800017a:	02cb      	lsls	r3, r1, #11
 800017c:	1ac0      	subs	r0, r0, r3
 800017e:	4152      	adcs	r2, r2
 8000180:	0a83      	lsrs	r3, r0, #10
 8000182:	428b      	cmp	r3, r1
 8000184:	d301      	bcc.n	800018a <__udivsi3+0x82>
 8000186:	028b      	lsls	r3, r1, #10
 8000188:	1ac0      	subs	r0, r0, r3
 800018a:	4152      	adcs	r2, r2
 800018c:	0a43      	lsrs	r3, r0, #9
 800018e:	428b      	cmp	r3, r1
 8000190:	d301      	bcc.n	8000196 <__udivsi3+0x8e>
 8000192:	024b      	lsls	r3, r1, #9
 8000194:	1ac0      	subs	r0, r0, r3
 8000196:	4152      	adcs	r2, r2
 8000198:	0a03      	lsrs	r3, r0, #8
 800019a:	428b      	cmp	r3, r1
 800019c:	d301      	bcc.n	80001a2 <__udivsi3+0x9a>
 800019e:	020b      	lsls	r3, r1, #8
 80001a0:	1ac0      	subs	r0, r0, r3
 80001a2:	4152      	adcs	r2, r2
 80001a4:	d2cd      	bcs.n	8000142 <__udivsi3+0x3a>
 80001a6:	09c3      	lsrs	r3, r0, #7
 80001a8:	428b      	cmp	r3, r1
 80001aa:	d301      	bcc.n	80001b0 <__udivsi3+0xa8>
 80001ac:	01cb      	lsls	r3, r1, #7
 80001ae:	1ac0      	subs	r0, r0, r3
 80001b0:	4152      	adcs	r2, r2
 80001b2:	0983      	lsrs	r3, r0, #6
 80001b4:	428b      	cmp	r3, r1
 80001b6:	d301      	bcc.n	80001bc <__udivsi3+0xb4>
 80001b8:	018b      	lsls	r3, r1, #6
 80001ba:	1ac0      	subs	r0, r0, r3
 80001bc:	4152      	adcs	r2, r2
 80001be:	0943      	lsrs	r3, r0, #5
 80001c0:	428b      	cmp	r3, r1
 80001c2:	d301      	bcc.n	80001c8 <__udivsi3+0xc0>
 80001c4:	014b      	lsls	r3, r1, #5
 80001c6:	1ac0      	subs	r0, r0, r3
 80001c8:	4152      	adcs	r2, r2
 80001ca:	0903      	lsrs	r3, r0, #4
 80001cc:	428b      	cmp	r3, r1
 80001ce:	d301      	bcc.n	80001d4 <__udivsi3+0xcc>
 80001d0:	010b      	lsls	r3, r1, #4
 80001d2:	1ac0      	subs	r0, r0, r3
 80001d4:	4152      	adcs	r2, r2
 80001d6:	08c3      	lsrs	r3, r0, #3
 80001d8:	428b      	cmp	r3, r1
 80001da:	d301      	bcc.n	80001e0 <__udivsi3+0xd8>
 80001dc:	00cb      	lsls	r3, r1, #3
 80001de:	1ac0      	subs	r0, r0, r3
 80001e0:	4152      	adcs	r2, r2
 80001e2:	0883      	lsrs	r3, r0, #2
 80001e4:	428b      	cmp	r3, r1
 80001e6:	d301      	bcc.n	80001ec <__udivsi3+0xe4>
 80001e8:	008b      	lsls	r3, r1, #2
 80001ea:	1ac0      	subs	r0, r0, r3
 80001ec:	4152      	adcs	r2, r2
 80001ee:	0843      	lsrs	r3, r0, #1
 80001f0:	428b      	cmp	r3, r1
 80001f2:	d301      	bcc.n	80001f8 <__udivsi3+0xf0>
 80001f4:	004b      	lsls	r3, r1, #1
 80001f6:	1ac0      	subs	r0, r0, r3
 80001f8:	4152      	adcs	r2, r2
 80001fa:	1a41      	subs	r1, r0, r1
 80001fc:	d200      	bcs.n	8000200 <__udivsi3+0xf8>
 80001fe:	4601      	mov	r1, r0
 8000200:	4152      	adcs	r2, r2
 8000202:	4610      	mov	r0, r2
 8000204:	4770      	bx	lr
 8000206:	e7ff      	b.n	8000208 <__udivsi3+0x100>
 8000208:	b501      	push	{r0, lr}
 800020a:	2000      	movs	r0, #0
 800020c:	f000 f806 	bl	800021c <__aeabi_idiv0>
 8000210:	bd02      	pop	{r1, pc}
 8000212:	46c0      	nop			; (mov r8, r8)

08000214 <__aeabi_uidivmod>:
 8000214:	2900      	cmp	r1, #0
 8000216:	d0f7      	beq.n	8000208 <__udivsi3+0x100>
 8000218:	e776      	b.n	8000108 <__udivsi3>
 800021a:	4770      	bx	lr

0800021c <__aeabi_idiv0>:
 800021c:	4770      	bx	lr
 800021e:	46c0      	nop			; (mov r8, r8)

08000220 <BEEP_call>:

/**
 * crazy beep
 */
void BEEP_call()
{
 8000220:	b580      	push	{r7, lr}
 8000222:	af00      	add	r7, sp, #0
  BEEP_Set();
 8000224:	2380      	movs	r3, #128	; 0x80
 8000226:	0159      	lsls	r1, r3, #5
 8000228:	2390      	movs	r3, #144	; 0x90
 800022a:	05db      	lsls	r3, r3, #23
 800022c:	2201      	movs	r2, #1
 800022e:	0018      	movs	r0, r3
 8000230:	f000 fd53 	bl	8000cda <HAL_GPIO_WritePin>
  osDelay(300);
 8000234:	2396      	movs	r3, #150	; 0x96
 8000236:	005b      	lsls	r3, r3, #1
 8000238:	0018      	movs	r0, r3
 800023a:	f001 fd17 	bl	8001c6c <osDelay>
  BEEP_Reset();
 800023e:	2380      	movs	r3, #128	; 0x80
 8000240:	0159      	lsls	r1, r3, #5
 8000242:	2390      	movs	r3, #144	; 0x90
 8000244:	05db      	lsls	r3, r3, #23
 8000246:	2200      	movs	r2, #0
 8000248:	0018      	movs	r0, r3
 800024a:	f000 fd46 	bl	8000cda <HAL_GPIO_WritePin>
}
 800024e:	46c0      	nop			; (mov r8, r8)
 8000250:	46bd      	mov	sp, r7
 8000252:	bd80      	pop	{r7, pc}

08000254 <KEY_Scan>:
/**
 * 按键处理函数
 * @param mode 0 - 连续触发           1 - 不连续触发
 */
uint8_t KEY_Scan(uint8_t mode)
{
 8000254:	b580      	push	{r7, lr}
 8000256:	b082      	sub	sp, #8
 8000258:	af00      	add	r7, sp, #0
 800025a:	0002      	movs	r2, r0
 800025c:	1dfb      	adds	r3, r7, #7
 800025e:	701a      	strb	r2, [r3, #0]
  static uint8_t key_up = 1;
  if (mode)
 8000260:	1dfb      	adds	r3, r7, #7
 8000262:	781b      	ldrb	r3, [r3, #0]
 8000264:	2b00      	cmp	r3, #0
 8000266:	d002      	beq.n	800026e <KEY_Scan+0x1a>
  {
    key_up = 1;
 8000268:	4b19      	ldr	r3, [pc, #100]	; (80002d0 <KEY_Scan+0x7c>)
 800026a:	2201      	movs	r2, #1
 800026c:	701a      	strb	r2, [r3, #0]
  }
  if (key_up && KEY_read() == 1)
 800026e:	4b18      	ldr	r3, [pc, #96]	; (80002d0 <KEY_Scan+0x7c>)
 8000270:	781b      	ldrb	r3, [r3, #0]
 8000272:	2b00      	cmp	r3, #0
 8000274:	d01b      	beq.n	80002ae <KEY_Scan+0x5a>
 8000276:	2380      	movs	r3, #128	; 0x80
 8000278:	009b      	lsls	r3, r3, #2
 800027a:	4a16      	ldr	r2, [pc, #88]	; (80002d4 <KEY_Scan+0x80>)
 800027c:	0019      	movs	r1, r3
 800027e:	0010      	movs	r0, r2
 8000280:	f000 fd0e 	bl	8000ca0 <HAL_GPIO_ReadPin>
 8000284:	0003      	movs	r3, r0
 8000286:	2b01      	cmp	r3, #1
 8000288:	d111      	bne.n	80002ae <KEY_Scan+0x5a>
  {
    osDelay(10);
 800028a:	200a      	movs	r0, #10
 800028c:	f001 fcee 	bl	8001c6c <osDelay>
    key_up = 0;
 8000290:	4b0f      	ldr	r3, [pc, #60]	; (80002d0 <KEY_Scan+0x7c>)
 8000292:	2200      	movs	r2, #0
 8000294:	701a      	strb	r2, [r3, #0]
    if (KEY_read() == 1)
 8000296:	2380      	movs	r3, #128	; 0x80
 8000298:	009b      	lsls	r3, r3, #2
 800029a:	4a0e      	ldr	r2, [pc, #56]	; (80002d4 <KEY_Scan+0x80>)
 800029c:	0019      	movs	r1, r3
 800029e:	0010      	movs	r0, r2
 80002a0:	f000 fcfe 	bl	8000ca0 <HAL_GPIO_ReadPin>
 80002a4:	0003      	movs	r3, r0
 80002a6:	2b01      	cmp	r3, #1
 80002a8:	d10d      	bne.n	80002c6 <KEY_Scan+0x72>
    {
      return 1;
 80002aa:	2301      	movs	r3, #1
 80002ac:	e00c      	b.n	80002c8 <KEY_Scan+0x74>
    }
  }
  else if (KEY_read() == 0)
 80002ae:	2380      	movs	r3, #128	; 0x80
 80002b0:	009b      	lsls	r3, r3, #2
 80002b2:	4a08      	ldr	r2, [pc, #32]	; (80002d4 <KEY_Scan+0x80>)
 80002b4:	0019      	movs	r1, r3
 80002b6:	0010      	movs	r0, r2
 80002b8:	f000 fcf2 	bl	8000ca0 <HAL_GPIO_ReadPin>
 80002bc:	1e03      	subs	r3, r0, #0
 80002be:	d102      	bne.n	80002c6 <KEY_Scan+0x72>
  {
    key_up = 1;
 80002c0:	4b03      	ldr	r3, [pc, #12]	; (80002d0 <KEY_Scan+0x7c>)
 80002c2:	2201      	movs	r2, #1
 80002c4:	701a      	strb	r2, [r3, #0]
  }

  return 0;
 80002c6:	2300      	movs	r3, #0
}
 80002c8:	0018      	movs	r0, r3
 80002ca:	46bd      	mov	sp, r7
 80002cc:	b002      	add	sp, #8
 80002ce:	bd80      	pop	{r7, pc}
 80002d0:	20000000 	.word	0x20000000
 80002d4:	48000400 	.word	0x48000400

080002d8 <LED_StateControl>:
/**
 * control led by different modes.
 * @param ledMode led control modes
 */
void LED_StateControl(LED_State ledMode)
{
 80002d8:	b580      	push	{r7, lr}
 80002da:	b082      	sub	sp, #8
 80002dc:	af00      	add	r7, sp, #0
 80002de:	0002      	movs	r2, r0
 80002e0:	1dfb      	adds	r3, r7, #7
 80002e2:	701a      	strb	r2, [r3, #0]
  switch (ledMode)
 80002e4:	1dfb      	adds	r3, r7, #7
 80002e6:	781b      	ldrb	r3, [r3, #0]
 80002e8:	2b01      	cmp	r3, #1
 80002ea:	d015      	beq.n	8000318 <LED_StateControl+0x40>
 80002ec:	dc02      	bgt.n	80002f4 <LED_StateControl+0x1c>
 80002ee:	2b00      	cmp	r3, #0
 80002f0:	d005      	beq.n	80002fe <LED_StateControl+0x26>
      LED1_Set();
      LED2_Set();
      break;

    default:
      break;
 80002f2:	e038      	b.n	8000366 <LED_StateControl+0x8e>
  switch (ledMode)
 80002f4:	2b02      	cmp	r3, #2
 80002f6:	d01c      	beq.n	8000332 <LED_StateControl+0x5a>
 80002f8:	2b03      	cmp	r3, #3
 80002fa:	d027      	beq.n	800034c <LED_StateControl+0x74>
      break;
 80002fc:	e033      	b.n	8000366 <LED_StateControl+0x8e>
      LED1_Reset();
 80002fe:	4b1c      	ldr	r3, [pc, #112]	; (8000370 <LED_StateControl+0x98>)
 8000300:	2200      	movs	r2, #0
 8000302:	2180      	movs	r1, #128	; 0x80
 8000304:	0018      	movs	r0, r3
 8000306:	f000 fce8 	bl	8000cda <HAL_GPIO_WritePin>
      LED2_Reset();
 800030a:	4b19      	ldr	r3, [pc, #100]	; (8000370 <LED_StateControl+0x98>)
 800030c:	2200      	movs	r2, #0
 800030e:	2140      	movs	r1, #64	; 0x40
 8000310:	0018      	movs	r0, r3
 8000312:	f000 fce2 	bl	8000cda <HAL_GPIO_WritePin>
      break;
 8000316:	e026      	b.n	8000366 <LED_StateControl+0x8e>
      LED1_Reset();
 8000318:	4b15      	ldr	r3, [pc, #84]	; (8000370 <LED_StateControl+0x98>)
 800031a:	2200      	movs	r2, #0
 800031c:	2180      	movs	r1, #128	; 0x80
 800031e:	0018      	movs	r0, r3
 8000320:	f000 fcdb 	bl	8000cda <HAL_GPIO_WritePin>
      LED2_Set();
 8000324:	4b12      	ldr	r3, [pc, #72]	; (8000370 <LED_StateControl+0x98>)
 8000326:	2201      	movs	r2, #1
 8000328:	2140      	movs	r1, #64	; 0x40
 800032a:	0018      	movs	r0, r3
 800032c:	f000 fcd5 	bl	8000cda <HAL_GPIO_WritePin>
      break;
 8000330:	e019      	b.n	8000366 <LED_StateControl+0x8e>
      LED1_Set();
 8000332:	4b0f      	ldr	r3, [pc, #60]	; (8000370 <LED_StateControl+0x98>)
 8000334:	2201      	movs	r2, #1
 8000336:	2180      	movs	r1, #128	; 0x80
 8000338:	0018      	movs	r0, r3
 800033a:	f000 fcce 	bl	8000cda <HAL_GPIO_WritePin>
      LED2_Reset();
 800033e:	4b0c      	ldr	r3, [pc, #48]	; (8000370 <LED_StateControl+0x98>)
 8000340:	2200      	movs	r2, #0
 8000342:	2140      	movs	r1, #64	; 0x40
 8000344:	0018      	movs	r0, r3
 8000346:	f000 fcc8 	bl	8000cda <HAL_GPIO_WritePin>
      break;
 800034a:	e00c      	b.n	8000366 <LED_StateControl+0x8e>
      LED1_Set();
 800034c:	4b08      	ldr	r3, [pc, #32]	; (8000370 <LED_StateControl+0x98>)
 800034e:	2201      	movs	r2, #1
 8000350:	2180      	movs	r1, #128	; 0x80
 8000352:	0018      	movs	r0, r3
 8000354:	f000 fcc1 	bl	8000cda <HAL_GPIO_WritePin>
      LED2_Set();
 8000358:	4b05      	ldr	r3, [pc, #20]	; (8000370 <LED_StateControl+0x98>)
 800035a:	2201      	movs	r2, #1
 800035c:	2140      	movs	r1, #64	; 0x40
 800035e:	0018      	movs	r0, r3
 8000360:	f000 fcbb 	bl	8000cda <HAL_GPIO_WritePin>
      break;
 8000364:	46c0      	nop			; (mov r8, r8)
  }
}
 8000366:	46c0      	nop			; (mov r8, r8)
 8000368:	46bd      	mov	sp, r7
 800036a:	b002      	add	sp, #8
 800036c:	bd80      	pop	{r7, pc}
 800036e:	46c0      	nop			; (mov r8, r8)
 8000370:	48000400 	.word	0x48000400

08000374 <MX_FREERTOS_Init>:
/**
  * @brief  FreeRTOS initialization
  * @param  None
  * @retval None
  */
void MX_FREERTOS_Init(void) {
 8000374:	b590      	push	{r4, r7, lr}
 8000376:	b093      	sub	sp, #76	; 0x4c
 8000378:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN Init */
       
  /* USER CODE END Init */
osKernelInitialize();
 800037a:	f001 fb75 	bl	8001a68 <osKernelInitialize>
  /* add queues, ... */
  /* USER CODE END RTOS_QUEUES */

  /* Create the thread(s) */
  /* definition and creation of LEDTask */
  const osThreadAttr_t LEDTask_attributes = {
 800037e:	2424      	movs	r4, #36	; 0x24
 8000380:	193b      	adds	r3, r7, r4
 8000382:	0018      	movs	r0, r3
 8000384:	2324      	movs	r3, #36	; 0x24
 8000386:	001a      	movs	r2, r3
 8000388:	2100      	movs	r1, #0
 800038a:	f003 fdbc 	bl	8003f06 <memset>
 800038e:	193b      	adds	r3, r7, r4
 8000390:	4a16      	ldr	r2, [pc, #88]	; (80003ec <MX_FREERTOS_Init+0x78>)
 8000392:	601a      	str	r2, [r3, #0]
 8000394:	193b      	adds	r3, r7, r4
 8000396:	2280      	movs	r2, #128	; 0x80
 8000398:	615a      	str	r2, [r3, #20]
 800039a:	193b      	adds	r3, r7, r4
 800039c:	2218      	movs	r2, #24
 800039e:	619a      	str	r2, [r3, #24]
    .name = "LEDTask",
    .priority = (osPriority_t) osPriorityNormal,
    .stack_size = 128
  };
  LEDTaskHandle = osThreadNew(StartLEDTask, NULL, &LEDTask_attributes);
 80003a0:	193a      	adds	r2, r7, r4
 80003a2:	4b13      	ldr	r3, [pc, #76]	; (80003f0 <MX_FREERTOS_Init+0x7c>)
 80003a4:	2100      	movs	r1, #0
 80003a6:	0018      	movs	r0, r3
 80003a8:	f001 fbb8 	bl	8001b1c <osThreadNew>
 80003ac:	0002      	movs	r2, r0
 80003ae:	4b11      	ldr	r3, [pc, #68]	; (80003f4 <MX_FREERTOS_Init+0x80>)
 80003b0:	601a      	str	r2, [r3, #0]

  /* definition and creation of KeyScanTask */
  const osThreadAttr_t KeyScanTask_attributes = {
 80003b2:	003b      	movs	r3, r7
 80003b4:	0018      	movs	r0, r3
 80003b6:	2324      	movs	r3, #36	; 0x24
 80003b8:	001a      	movs	r2, r3
 80003ba:	2100      	movs	r1, #0
 80003bc:	f003 fda3 	bl	8003f06 <memset>
 80003c0:	003b      	movs	r3, r7
 80003c2:	4a0d      	ldr	r2, [pc, #52]	; (80003f8 <MX_FREERTOS_Init+0x84>)
 80003c4:	601a      	str	r2, [r3, #0]
 80003c6:	003b      	movs	r3, r7
 80003c8:	2280      	movs	r2, #128	; 0x80
 80003ca:	615a      	str	r2, [r3, #20]
 80003cc:	003b      	movs	r3, r7
 80003ce:	2211      	movs	r2, #17
 80003d0:	619a      	str	r2, [r3, #24]
    .name = "KeyScanTask",
    .priority = (osPriority_t) osPriorityBelowNormal1,
    .stack_size = 128
  };
  KeyScanTaskHandle = osThreadNew(StartKeyScanTask, NULL, &KeyScanTask_attributes);
 80003d2:	003a      	movs	r2, r7
 80003d4:	4b09      	ldr	r3, [pc, #36]	; (80003fc <MX_FREERTOS_Init+0x88>)
 80003d6:	2100      	movs	r1, #0
 80003d8:	0018      	movs	r0, r3
 80003da:	f001 fb9f 	bl	8001b1c <osThreadNew>
 80003de:	0002      	movs	r2, r0
 80003e0:	4b07      	ldr	r3, [pc, #28]	; (8000400 <MX_FREERTOS_Init+0x8c>)
 80003e2:	601a      	str	r2, [r3, #0]

  /* USER CODE BEGIN RTOS_THREADS */
  /* add threads, ... */
  /* USER CODE END RTOS_THREADS */

}
 80003e4:	46c0      	nop			; (mov r8, r8)
 80003e6:	46bd      	mov	sp, r7
 80003e8:	b013      	add	sp, #76	; 0x4c
 80003ea:	bd90      	pop	{r4, r7, pc}
 80003ec:	08003f30 	.word	0x08003f30
 80003f0:	08000405 	.word	0x08000405
 80003f4:	20001930 	.word	0x20001930
 80003f8:	08003f38 	.word	0x08003f38
 80003fc:	08000449 	.word	0x08000449
 8000400:	20001934 	.word	0x20001934

08000404 <StartLEDTask>:
  * @param  argument: Not used 
  * @retval None
  */
/* USER CODE END Header_StartLEDTask */
void StartLEDTask(void *argument)
{
 8000404:	b580      	push	{r7, lr}
 8000406:	b082      	sub	sp, #8
 8000408:	af00      	add	r7, sp, #0
 800040a:	6078      	str	r0, [r7, #4]

  static LED_State ledState = LED00;
  /* Infinite loop */
  for(;;)
  {
    LED_StateControl(ledState);
 800040c:	4b0c      	ldr	r3, [pc, #48]	; (8000440 <StartLEDTask+0x3c>)
 800040e:	781b      	ldrb	r3, [r3, #0]
 8000410:	0018      	movs	r0, r3
 8000412:	f7ff ff61 	bl	80002d8 <LED_StateControl>
    ledState = (ledState + 1) % LED_TOTAL_STATE_NUM;
 8000416:	4b0a      	ldr	r3, [pc, #40]	; (8000440 <StartLEDTask+0x3c>)
 8000418:	781b      	ldrb	r3, [r3, #0]
 800041a:	3301      	adds	r3, #1
 800041c:	4a09      	ldr	r2, [pc, #36]	; (8000444 <StartLEDTask+0x40>)
 800041e:	4013      	ands	r3, r2
 8000420:	d504      	bpl.n	800042c <StartLEDTask+0x28>
 8000422:	3b01      	subs	r3, #1
 8000424:	2204      	movs	r2, #4
 8000426:	4252      	negs	r2, r2
 8000428:	4313      	orrs	r3, r2
 800042a:	3301      	adds	r3, #1
 800042c:	b2da      	uxtb	r2, r3
 800042e:	4b04      	ldr	r3, [pc, #16]	; (8000440 <StartLEDTask+0x3c>)
 8000430:	701a      	strb	r2, [r3, #0]
    osDelay(500);
 8000432:	23fa      	movs	r3, #250	; 0xfa
 8000434:	005b      	lsls	r3, r3, #1
 8000436:	0018      	movs	r0, r3
 8000438:	f001 fc18 	bl	8001c6c <osDelay>
    LED_StateControl(ledState);
 800043c:	e7e6      	b.n	800040c <StartLEDTask+0x8>
 800043e:	46c0      	nop			; (mov r8, r8)
 8000440:	2000002c 	.word	0x2000002c
 8000444:	80000003 	.word	0x80000003

08000448 <StartKeyScanTask>:
* @param argument: Not used
* @retval None
*/
/* USER CODE END Header_StartKeyScanTask */
void StartKeyScanTask(void *argument)
{
 8000448:	b580      	push	{r7, lr}
 800044a:	b082      	sub	sp, #8
 800044c:	af00      	add	r7, sp, #0
 800044e:	6078      	str	r0, [r7, #4]
  /* USER CODE BEGIN StartKeyScanTask */
  /* Infinite loop */
  for(;;)
  {
    if(KEY_Scan(0)) {
 8000450:	2000      	movs	r0, #0
 8000452:	f7ff feff 	bl	8000254 <KEY_Scan>
 8000456:	1e03      	subs	r3, r0, #0
 8000458:	d001      	beq.n	800045e <StartKeyScanTask+0x16>
      BEEP_call();
 800045a:	f7ff fee1 	bl	8000220 <BEEP_call>
    }
    osDelay(10);
 800045e:	200a      	movs	r0, #10
 8000460:	f001 fc04 	bl	8001c6c <osDelay>
    if(KEY_Scan(0)) {
 8000464:	e7f4      	b.n	8000450 <StartKeyScanTask+0x8>
	...

08000468 <MX_GPIO_Init>:
        * Output
        * EVENT_OUT
        * EXTI
*/
void MX_GPIO_Init(void)
{
 8000468:	b590      	push	{r4, r7, lr}
 800046a:	b08b      	sub	sp, #44	; 0x2c
 800046c:	af00      	add	r7, sp, #0

  GPIO_InitTypeDef GPIO_InitStruct = {0};
 800046e:	2414      	movs	r4, #20
 8000470:	193b      	adds	r3, r7, r4
 8000472:	0018      	movs	r0, r3
 8000474:	2314      	movs	r3, #20
 8000476:	001a      	movs	r2, r3
 8000478:	2100      	movs	r1, #0
 800047a:	f003 fd44 	bl	8003f06 <memset>

  /* GPIO Ports Clock Enable */
  __HAL_RCC_GPIOC_CLK_ENABLE();
 800047e:	4b41      	ldr	r3, [pc, #260]	; (8000584 <MX_GPIO_Init+0x11c>)
 8000480:	695a      	ldr	r2, [r3, #20]
 8000482:	4b40      	ldr	r3, [pc, #256]	; (8000584 <MX_GPIO_Init+0x11c>)
 8000484:	2180      	movs	r1, #128	; 0x80
 8000486:	0309      	lsls	r1, r1, #12
 8000488:	430a      	orrs	r2, r1
 800048a:	615a      	str	r2, [r3, #20]
 800048c:	4b3d      	ldr	r3, [pc, #244]	; (8000584 <MX_GPIO_Init+0x11c>)
 800048e:	695a      	ldr	r2, [r3, #20]
 8000490:	2380      	movs	r3, #128	; 0x80
 8000492:	031b      	lsls	r3, r3, #12
 8000494:	4013      	ands	r3, r2
 8000496:	613b      	str	r3, [r7, #16]
 8000498:	693b      	ldr	r3, [r7, #16]
  __HAL_RCC_GPIOF_CLK_ENABLE();
 800049a:	4b3a      	ldr	r3, [pc, #232]	; (8000584 <MX_GPIO_Init+0x11c>)
 800049c:	695a      	ldr	r2, [r3, #20]
 800049e:	4b39      	ldr	r3, [pc, #228]	; (8000584 <MX_GPIO_Init+0x11c>)
 80004a0:	2180      	movs	r1, #128	; 0x80
 80004a2:	03c9      	lsls	r1, r1, #15
 80004a4:	430a      	orrs	r2, r1
 80004a6:	615a      	str	r2, [r3, #20]
 80004a8:	4b36      	ldr	r3, [pc, #216]	; (8000584 <MX_GPIO_Init+0x11c>)
 80004aa:	695a      	ldr	r2, [r3, #20]
 80004ac:	2380      	movs	r3, #128	; 0x80
 80004ae:	03db      	lsls	r3, r3, #15
 80004b0:	4013      	ands	r3, r2
 80004b2:	60fb      	str	r3, [r7, #12]
 80004b4:	68fb      	ldr	r3, [r7, #12]
  __HAL_RCC_GPIOA_CLK_ENABLE();
 80004b6:	4b33      	ldr	r3, [pc, #204]	; (8000584 <MX_GPIO_Init+0x11c>)
 80004b8:	695a      	ldr	r2, [r3, #20]
 80004ba:	4b32      	ldr	r3, [pc, #200]	; (8000584 <MX_GPIO_Init+0x11c>)
 80004bc:	2180      	movs	r1, #128	; 0x80
 80004be:	0289      	lsls	r1, r1, #10
 80004c0:	430a      	orrs	r2, r1
 80004c2:	615a      	str	r2, [r3, #20]
 80004c4:	4b2f      	ldr	r3, [pc, #188]	; (8000584 <MX_GPIO_Init+0x11c>)
 80004c6:	695a      	ldr	r2, [r3, #20]
 80004c8:	2380      	movs	r3, #128	; 0x80
 80004ca:	029b      	lsls	r3, r3, #10
 80004cc:	4013      	ands	r3, r2
 80004ce:	60bb      	str	r3, [r7, #8]
 80004d0:	68bb      	ldr	r3, [r7, #8]
  __HAL_RCC_GPIOB_CLK_ENABLE();
 80004d2:	4b2c      	ldr	r3, [pc, #176]	; (8000584 <MX_GPIO_Init+0x11c>)
 80004d4:	695a      	ldr	r2, [r3, #20]
 80004d6:	4b2b      	ldr	r3, [pc, #172]	; (8000584 <MX_GPIO_Init+0x11c>)
 80004d8:	2180      	movs	r1, #128	; 0x80
 80004da:	02c9      	lsls	r1, r1, #11
 80004dc:	430a      	orrs	r2, r1
 80004de:	615a      	str	r2, [r3, #20]
 80004e0:	4b28      	ldr	r3, [pc, #160]	; (8000584 <MX_GPIO_Init+0x11c>)
 80004e2:	695a      	ldr	r2, [r3, #20]
 80004e4:	2380      	movs	r3, #128	; 0x80
 80004e6:	02db      	lsls	r3, r3, #11
 80004e8:	4013      	ands	r3, r2
 80004ea:	607b      	str	r3, [r7, #4]
 80004ec:	687b      	ldr	r3, [r7, #4]

  /*Configure GPIO pin Output Level */
  HAL_GPIO_WritePin(BEEP_GPIO_Port, BEEP_Pin, GPIO_PIN_RESET);
 80004ee:	2380      	movs	r3, #128	; 0x80
 80004f0:	0159      	lsls	r1, r3, #5
 80004f2:	2390      	movs	r3, #144	; 0x90
 80004f4:	05db      	lsls	r3, r3, #23
 80004f6:	2200      	movs	r2, #0
 80004f8:	0018      	movs	r0, r3
 80004fa:	f000 fbee 	bl	8000cda <HAL_GPIO_WritePin>

  /*Configure GPIO pin Output Level */
  HAL_GPIO_WritePin(GPIOB, LED2_Pin|LED1_Pin, GPIO_PIN_RESET);
 80004fe:	4b22      	ldr	r3, [pc, #136]	; (8000588 <MX_GPIO_Init+0x120>)
 8000500:	2200      	movs	r2, #0
 8000502:	21c0      	movs	r1, #192	; 0xc0
 8000504:	0018      	movs	r0, r3
 8000506:	f000 fbe8 	bl	8000cda <HAL_GPIO_WritePin>

  /*Configure GPIO pin : PtPin */
  GPIO_InitStruct.Pin = BEEP_Pin;
 800050a:	193b      	adds	r3, r7, r4
 800050c:	2280      	movs	r2, #128	; 0x80
 800050e:	0152      	lsls	r2, r2, #5
 8000510:	601a      	str	r2, [r3, #0]
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 8000512:	193b      	adds	r3, r7, r4
 8000514:	2201      	movs	r2, #1
 8000516:	605a      	str	r2, [r3, #4]
  GPIO_InitStruct.Pull = GPIO_PULLDOWN;
 8000518:	193b      	adds	r3, r7, r4
 800051a:	2202      	movs	r2, #2
 800051c:	609a      	str	r2, [r3, #8]
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
 800051e:	193b      	adds	r3, r7, r4
 8000520:	2203      	movs	r2, #3
 8000522:	60da      	str	r2, [r3, #12]
  HAL_GPIO_Init(BEEP_GPIO_Port, &GPIO_InitStruct);
 8000524:	193a      	adds	r2, r7, r4
 8000526:	2390      	movs	r3, #144	; 0x90
 8000528:	05db      	lsls	r3, r3, #23
 800052a:	0011      	movs	r1, r2
 800052c:	0018      	movs	r0, r3
 800052e:	f000 fa47 	bl	80009c0 <HAL_GPIO_Init>

  /*Configure GPIO pins : PBPin PBPin */
  GPIO_InitStruct.Pin = LED2_Pin|LED1_Pin;
 8000532:	0021      	movs	r1, r4
 8000534:	187b      	adds	r3, r7, r1
 8000536:	22c0      	movs	r2, #192	; 0xc0
 8000538:	601a      	str	r2, [r3, #0]
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 800053a:	187b      	adds	r3, r7, r1
 800053c:	2201      	movs	r2, #1
 800053e:	605a      	str	r2, [r3, #4]
  GPIO_InitStruct.Pull = GPIO_PULLDOWN;
 8000540:	187b      	adds	r3, r7, r1
 8000542:	2202      	movs	r2, #2
 8000544:	609a      	str	r2, [r3, #8]
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
 8000546:	187b      	adds	r3, r7, r1
 8000548:	2203      	movs	r2, #3
 800054a:	60da      	str	r2, [r3, #12]
  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 800054c:	000c      	movs	r4, r1
 800054e:	187b      	adds	r3, r7, r1
 8000550:	4a0d      	ldr	r2, [pc, #52]	; (8000588 <MX_GPIO_Init+0x120>)
 8000552:	0019      	movs	r1, r3
 8000554:	0010      	movs	r0, r2
 8000556:	f000 fa33 	bl	80009c0 <HAL_GPIO_Init>

  /*Configure GPIO pin : PtPin */
  GPIO_InitStruct.Pin = KEY_Pin;
 800055a:	0021      	movs	r1, r4
 800055c:	187b      	adds	r3, r7, r1
 800055e:	2280      	movs	r2, #128	; 0x80
 8000560:	0092      	lsls	r2, r2, #2
 8000562:	601a      	str	r2, [r3, #0]
  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
 8000564:	187b      	adds	r3, r7, r1
 8000566:	2200      	movs	r2, #0
 8000568:	605a      	str	r2, [r3, #4]
  GPIO_InitStruct.Pull = GPIO_PULLDOWN;
 800056a:	187b      	adds	r3, r7, r1
 800056c:	2202      	movs	r2, #2
 800056e:	609a      	str	r2, [r3, #8]
  HAL_GPIO_Init(KEY_GPIO_Port, &GPIO_InitStruct);
 8000570:	187b      	adds	r3, r7, r1
 8000572:	4a05      	ldr	r2, [pc, #20]	; (8000588 <MX_GPIO_Init+0x120>)
 8000574:	0019      	movs	r1, r3
 8000576:	0010      	movs	r0, r2
 8000578:	f000 fa22 	bl	80009c0 <HAL_GPIO_Init>

}
 800057c:	46c0      	nop			; (mov r8, r8)
 800057e:	46bd      	mov	sp, r7
 8000580:	b00b      	add	sp, #44	; 0x2c
 8000582:	bd90      	pop	{r4, r7, pc}
 8000584:	40021000 	.word	0x40021000
 8000588:	48000400 	.word	0x48000400

0800058c <main>:
/**
  * @brief  The application entry point.
  * @retval int
  */
int main(void)
{
 800058c:	b580      	push	{r7, lr}
 800058e:	af00      	add	r7, sp, #0
  

  /* MCU Configuration--------------------------------------------------------*/

  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
  HAL_Init();
 8000590:	f000 f938 	bl	8000804 <HAL_Init>
  /* USER CODE BEGIN Init */

  /* USER CODE END Init */

  /* Configure the system clock */
  SystemClock_Config();
 8000594:	f000 f807 	bl	80005a6 <SystemClock_Config>
  /* USER CODE BEGIN SysInit */

  /* USER CODE END SysInit */

  /* Initialize all configured peripherals */
  MX_GPIO_Init();
 8000598:	f7ff ff66 	bl	8000468 <MX_GPIO_Init>
  /* USER CODE BEGIN 2 */

  /* USER CODE END 2 */

  /* Call init function for freertos objects (in freertos.c) */
  MX_FREERTOS_Init(); 
 800059c:	f7ff feea 	bl	8000374 <MX_FREERTOS_Init>

  /* Start scheduler */
  osKernelStart();
 80005a0:	f001 fa8e 	bl	8001ac0 <osKernelStart>
  
  /* We should never get here as control is now taken by the scheduler */

  /* Infinite loop */
  /* USER CODE BEGIN WHILE */
  while (1)
 80005a4:	e7fe      	b.n	80005a4 <main+0x18>

080005a6 <SystemClock_Config>:
/**
  * @brief System Clock Configuration
  * @retval None
  */
void SystemClock_Config(void)
{
 80005a6:	b590      	push	{r4, r7, lr}
 80005a8:	b091      	sub	sp, #68	; 0x44
 80005aa:	af00      	add	r7, sp, #0
  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
 80005ac:	2410      	movs	r4, #16
 80005ae:	193b      	adds	r3, r7, r4
 80005b0:	0018      	movs	r0, r3
 80005b2:	2330      	movs	r3, #48	; 0x30
 80005b4:	001a      	movs	r2, r3
 80005b6:	2100      	movs	r1, #0
 80005b8:	f003 fca5 	bl	8003f06 <memset>
  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
 80005bc:	003b      	movs	r3, r7
 80005be:	0018      	movs	r0, r3
 80005c0:	2310      	movs	r3, #16
 80005c2:	001a      	movs	r2, r3
 80005c4:	2100      	movs	r1, #0
 80005c6:	f003 fc9e 	bl	8003f06 <memset>

  /** Initializes the CPU, AHB and APB busses clocks 
  */
  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
 80005ca:	0021      	movs	r1, r4
 80005cc:	187b      	adds	r3, r7, r1
 80005ce:	2202      	movs	r2, #2
 80005d0:	601a      	str	r2, [r3, #0]
  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
 80005d2:	187b      	adds	r3, r7, r1
 80005d4:	2201      	movs	r2, #1
 80005d6:	60da      	str	r2, [r3, #12]
  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
 80005d8:	187b      	adds	r3, r7, r1
 80005da:	2210      	movs	r2, #16
 80005dc:	611a      	str	r2, [r3, #16]
  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
 80005de:	187b      	adds	r3, r7, r1
 80005e0:	2202      	movs	r2, #2
 80005e2:	621a      	str	r2, [r3, #32]
  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
 80005e4:	187b      	adds	r3, r7, r1
 80005e6:	2200      	movs	r2, #0
 80005e8:	625a      	str	r2, [r3, #36]	; 0x24
  RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL12;
 80005ea:	187b      	adds	r3, r7, r1
 80005ec:	22a0      	movs	r2, #160	; 0xa0
 80005ee:	0392      	lsls	r2, r2, #14
 80005f0:	629a      	str	r2, [r3, #40]	; 0x28
  RCC_OscInitStruct.PLL.PREDIV = RCC_PREDIV_DIV1;
 80005f2:	187b      	adds	r3, r7, r1
 80005f4:	2200      	movs	r2, #0
 80005f6:	62da      	str	r2, [r3, #44]	; 0x2c
  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
 80005f8:	187b      	adds	r3, r7, r1
 80005fa:	0018      	movs	r0, r3
 80005fc:	f000 fb8a 	bl	8000d14 <HAL_RCC_OscConfig>
 8000600:	1e03      	subs	r3, r0, #0
 8000602:	d001      	beq.n	8000608 <SystemClock_Config+0x62>
  {
    Error_Handler();
 8000604:	f000 f82c 	bl	8000660 <Error_Handler>
  }
  /** Initializes the CPU, AHB and APB busses clocks 
  */
  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
 8000608:	003b      	movs	r3, r7
 800060a:	2207      	movs	r2, #7
 800060c:	601a      	str	r2, [r3, #0]
                              |RCC_CLOCKTYPE_PCLK1;
  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
 800060e:	003b      	movs	r3, r7
 8000610:	2202      	movs	r2, #2
 8000612:	605a      	str	r2, [r3, #4]
  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
 8000614:	003b      	movs	r3, r7
 8000616:	2200      	movs	r2, #0
 8000618:	609a      	str	r2, [r3, #8]
  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
 800061a:	003b      	movs	r3, r7
 800061c:	2200      	movs	r2, #0
 800061e:	60da      	str	r2, [r3, #12]

  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
 8000620:	003b      	movs	r3, r7
 8000622:	2101      	movs	r1, #1
 8000624:	0018      	movs	r0, r3
 8000626:	f000 fe91 	bl	800134c <HAL_RCC_ClockConfig>
 800062a:	1e03      	subs	r3, r0, #0
 800062c:	d001      	beq.n	8000632 <SystemClock_Config+0x8c>
  {
    Error_Handler();
 800062e:	f000 f817 	bl	8000660 <Error_Handler>
  }
}
 8000632:	46c0      	nop			; (mov r8, r8)
 8000634:	46bd      	mov	sp, r7
 8000636:	b011      	add	sp, #68	; 0x44
 8000638:	bd90      	pop	{r4, r7, pc}
	...

0800063c <HAL_TIM_PeriodElapsedCallback>:
  * a global variable "uwTick" used as application time base.
  * @param  htim : TIM handle
  * @retval None
  */
void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
{
 800063c:	b580      	push	{r7, lr}
 800063e:	b082      	sub	sp, #8
 8000640:	af00      	add	r7, sp, #0
 8000642:	6078      	str	r0, [r7, #4]
  /* USER CODE BEGIN Callback 0 */

  /* USER CODE END Callback 0 */
  if (htim->Instance == TIM1) {
 8000644:	687b      	ldr	r3, [r7, #4]
 8000646:	681b      	ldr	r3, [r3, #0]
 8000648:	4a04      	ldr	r2, [pc, #16]	; (800065c <HAL_TIM_PeriodElapsedCallback+0x20>)
 800064a:	4293      	cmp	r3, r2
 800064c:	d101      	bne.n	8000652 <HAL_TIM_PeriodElapsedCallback+0x16>
    HAL_IncTick();
 800064e:	f000 f8ed 	bl	800082c <HAL_IncTick>
  }
  /* USER CODE BEGIN Callback 1 */

  /* USER CODE END Callback 1 */
}
 8000652:	46c0      	nop			; (mov r8, r8)
 8000654:	46bd      	mov	sp, r7
 8000656:	b002      	add	sp, #8
 8000658:	bd80      	pop	{r7, pc}
 800065a:	46c0      	nop			; (mov r8, r8)
 800065c:	40012c00 	.word	0x40012c00

08000660 <Error_Handler>:
/**
  * @brief  This function is executed in case of error occurrence.
  * @retval None
  */
void Error_Handler(void)
{
 8000660:	b580      	push	{r7, lr}
 8000662:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN Error_Handler_Debug */
  /* User can add his own implementation to report the HAL error return state */

  /* USER CODE END Error_Handler_Debug */
}
 8000664:	46c0      	nop			; (mov r8, r8)
 8000666:	46bd      	mov	sp, r7
 8000668:	bd80      	pop	{r7, pc}
	...

0800066c <HAL_MspInit>:
/* USER CODE END 0 */
/**
  * Initializes the Global MSP.
  */
void HAL_MspInit(void)
{
 800066c:	b580      	push	{r7, lr}
 800066e:	b082      	sub	sp, #8
 8000670:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN MspInit 0 */

  /* USER CODE END MspInit 0 */

  __HAL_RCC_SYSCFG_CLK_ENABLE();
 8000672:	4b12      	ldr	r3, [pc, #72]	; (80006bc <HAL_MspInit+0x50>)
 8000674:	699a      	ldr	r2, [r3, #24]
 8000676:	4b11      	ldr	r3, [pc, #68]	; (80006bc <HAL_MspInit+0x50>)
 8000678:	2101      	movs	r1, #1
 800067a:	430a      	orrs	r2, r1
 800067c:	619a      	str	r2, [r3, #24]
 800067e:	4b0f      	ldr	r3, [pc, #60]	; (80006bc <HAL_MspInit+0x50>)
 8000680:	699b      	ldr	r3, [r3, #24]
 8000682:	2201      	movs	r2, #1
 8000684:	4013      	ands	r3, r2
 8000686:	607b      	str	r3, [r7, #4]
 8000688:	687b      	ldr	r3, [r7, #4]
  __HAL_RCC_PWR_CLK_ENABLE();
 800068a:	4b0c      	ldr	r3, [pc, #48]	; (80006bc <HAL_MspInit+0x50>)
 800068c:	69da      	ldr	r2, [r3, #28]
 800068e:	4b0b      	ldr	r3, [pc, #44]	; (80006bc <HAL_MspInit+0x50>)
 8000690:	2180      	movs	r1, #128	; 0x80
 8000692:	0549      	lsls	r1, r1, #21
 8000694:	430a      	orrs	r2, r1
 8000696:	61da      	str	r2, [r3, #28]
 8000698:	4b08      	ldr	r3, [pc, #32]	; (80006bc <HAL_MspInit+0x50>)
 800069a:	69da      	ldr	r2, [r3, #28]
 800069c:	2380      	movs	r3, #128	; 0x80
 800069e:	055b      	lsls	r3, r3, #21
 80006a0:	4013      	ands	r3, r2
 80006a2:	603b      	str	r3, [r7, #0]
 80006a4:	683b      	ldr	r3, [r7, #0]

  /* System interrupt init*/
  /* PendSV_IRQn interrupt configuration */
  HAL_NVIC_SetPriority(PendSV_IRQn, 3, 0);
 80006a6:	2302      	movs	r3, #2
 80006a8:	425b      	negs	r3, r3
 80006aa:	2200      	movs	r2, #0
 80006ac:	2103      	movs	r1, #3
 80006ae:	0018      	movs	r0, r3
 80006b0:	f000 f960 	bl	8000974 <HAL_NVIC_SetPriority>

  /* USER CODE BEGIN MspInit 1 */

  /* USER CODE END MspInit 1 */
}
 80006b4:	46c0      	nop			; (mov r8, r8)
 80006b6:	46bd      	mov	sp, r7
 80006b8:	b002      	add	sp, #8
 80006ba:	bd80      	pop	{r7, pc}
 80006bc:	40021000 	.word	0x40021000

080006c0 <HAL_InitTick>:
  *         reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig(). 
  * @param  TickPriority: Tick interrupt priority.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
{
 80006c0:	b580      	push	{r7, lr}
 80006c2:	b08a      	sub	sp, #40	; 0x28
 80006c4:	af00      	add	r7, sp, #0
 80006c6:	6078      	str	r0, [r7, #4]
  RCC_ClkInitTypeDef    clkconfig;
  uint32_t              uwTimclock = 0;
 80006c8:	2300      	movs	r3, #0
 80006ca:	627b      	str	r3, [r7, #36]	; 0x24
  uint32_t              uwPrescalerValue = 0;
 80006cc:	2300      	movs	r3, #0
 80006ce:	623b      	str	r3, [r7, #32]
  uint32_t              pFLatency;
  
  /*Configure the TIM1 IRQ priority */
  HAL_NVIC_SetPriority(TIM1_BRK_UP_TRG_COM_IRQn, TickPriority ,0); 
 80006d0:	687b      	ldr	r3, [r7, #4]
 80006d2:	2200      	movs	r2, #0
 80006d4:	0019      	movs	r1, r3
 80006d6:	200d      	movs	r0, #13
 80006d8:	f000 f94c 	bl	8000974 <HAL_NVIC_SetPriority>
  
  /* Enable the TIM1 global Interrupt */
  HAL_NVIC_EnableIRQ(TIM1_BRK_UP_TRG_COM_IRQn); 
 80006dc:	200d      	movs	r0, #13
 80006de:	f000 f95e 	bl	800099e <HAL_NVIC_EnableIRQ>
  
  /* Enable TIM1 clock */
  __HAL_RCC_TIM1_CLK_ENABLE();
 80006e2:	4b21      	ldr	r3, [pc, #132]	; (8000768 <HAL_InitTick+0xa8>)
 80006e4:	699a      	ldr	r2, [r3, #24]
 80006e6:	4b20      	ldr	r3, [pc, #128]	; (8000768 <HAL_InitTick+0xa8>)
 80006e8:	2180      	movs	r1, #128	; 0x80
 80006ea:	0109      	lsls	r1, r1, #4
 80006ec:	430a      	orrs	r2, r1
 80006ee:	619a      	str	r2, [r3, #24]
 80006f0:	4b1d      	ldr	r3, [pc, #116]	; (8000768 <HAL_InitTick+0xa8>)
 80006f2:	699a      	ldr	r2, [r3, #24]
 80006f4:	2380      	movs	r3, #128	; 0x80
 80006f6:	011b      	lsls	r3, r3, #4
 80006f8:	4013      	ands	r3, r2
 80006fa:	60bb      	str	r3, [r7, #8]
 80006fc:	68bb      	ldr	r3, [r7, #8]
  
  /* Get clock configuration */
  HAL_RCC_GetClockConfig(&clkconfig, &pFLatency);
 80006fe:	230c      	movs	r3, #12
 8000700:	18fa      	adds	r2, r7, r3
 8000702:	2310      	movs	r3, #16
 8000704:	18fb      	adds	r3, r7, r3
 8000706:	0011      	movs	r1, r2
 8000708:	0018      	movs	r0, r3
 800070a:	f000 ff71 	bl	80015f0 <HAL_RCC_GetClockConfig>
  
  /* Compute TIM1 clock */
  uwTimclock = HAL_RCC_GetPCLK1Freq();
 800070e:	f000 ff59 	bl	80015c4 <HAL_RCC_GetPCLK1Freq>
 8000712:	0003      	movs	r3, r0
 8000714:	627b      	str	r3, [r7, #36]	; 0x24
   
  /* Compute the prescaler value to have TIM1 counter clock equal to 1MHz */
  uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000) - 1);
 8000716:	6a7b      	ldr	r3, [r7, #36]	; 0x24
 8000718:	4914      	ldr	r1, [pc, #80]	; (800076c <HAL_InitTick+0xac>)
 800071a:	0018      	movs	r0, r3
 800071c:	f7ff fcf4 	bl	8000108 <__udivsi3>
 8000720:	0003      	movs	r3, r0
 8000722:	3b01      	subs	r3, #1
 8000724:	623b      	str	r3, [r7, #32]
  
  /* Initialize TIM1 */
  htim1.Instance = TIM1;
 8000726:	4b12      	ldr	r3, [pc, #72]	; (8000770 <HAL_InitTick+0xb0>)
 8000728:	4a12      	ldr	r2, [pc, #72]	; (8000774 <HAL_InitTick+0xb4>)
 800072a:	601a      	str	r2, [r3, #0]
  + Period = [(TIM1CLK/1000) - 1]. to have a (1/1000) s time base.
  + Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock.
  + ClockDivision = 0
  + Counter direction = Up
  */
  htim1.Init.Period = (1000000 / 1000) - 1;
 800072c:	4b10      	ldr	r3, [pc, #64]	; (8000770 <HAL_InitTick+0xb0>)
 800072e:	4a12      	ldr	r2, [pc, #72]	; (8000778 <HAL_InitTick+0xb8>)
 8000730:	60da      	str	r2, [r3, #12]
  htim1.Init.Prescaler = uwPrescalerValue;
 8000732:	4b0f      	ldr	r3, [pc, #60]	; (8000770 <HAL_InitTick+0xb0>)
 8000734:	6a3a      	ldr	r2, [r7, #32]
 8000736:	605a      	str	r2, [r3, #4]
  htim1.Init.ClockDivision = 0;
 8000738:	4b0d      	ldr	r3, [pc, #52]	; (8000770 <HAL_InitTick+0xb0>)
 800073a:	2200      	movs	r2, #0
 800073c:	611a      	str	r2, [r3, #16]
  htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
 800073e:	4b0c      	ldr	r3, [pc, #48]	; (8000770 <HAL_InitTick+0xb0>)
 8000740:	2200      	movs	r2, #0
 8000742:	609a      	str	r2, [r3, #8]
  if(HAL_TIM_Base_Init(&htim1) == HAL_OK)
 8000744:	4b0a      	ldr	r3, [pc, #40]	; (8000770 <HAL_InitTick+0xb0>)
 8000746:	0018      	movs	r0, r3
 8000748:	f000 ff7c 	bl	8001644 <HAL_TIM_Base_Init>
 800074c:	1e03      	subs	r3, r0, #0
 800074e:	d105      	bne.n	800075c <HAL_InitTick+0x9c>
  {
    /* Start the TIM time Base generation in interrupt mode */
    return HAL_TIM_Base_Start_IT(&htim1);
 8000750:	4b07      	ldr	r3, [pc, #28]	; (8000770 <HAL_InitTick+0xb0>)
 8000752:	0018      	movs	r0, r3
 8000754:	f000 ffaa 	bl	80016ac <HAL_TIM_Base_Start_IT>
 8000758:	0003      	movs	r3, r0
 800075a:	e000      	b.n	800075e <HAL_InitTick+0x9e>
  }
  
  /* Return function status */
  return HAL_ERROR;
 800075c:	2301      	movs	r3, #1
}
 800075e:	0018      	movs	r0, r3
 8000760:	46bd      	mov	sp, r7
 8000762:	b00a      	add	sp, #40	; 0x28
 8000764:	bd80      	pop	{r7, pc}
 8000766:	46c0      	nop			; (mov r8, r8)
 8000768:	40021000 	.word	0x40021000
 800076c:	000f4240 	.word	0x000f4240
 8000770:	20001938 	.word	0x20001938
 8000774:	40012c00 	.word	0x40012c00
 8000778:	000003e7 	.word	0x000003e7

0800077c <NMI_Handler>:
/******************************************************************************/
/**
  * @brief This function handles Non maskable interrupt.
  */
void NMI_Handler(void)
{
 800077c:	b580      	push	{r7, lr}
 800077e:	af00      	add	r7, sp, #0

  /* USER CODE END NonMaskableInt_IRQn 0 */
  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */

  /* USER CODE END NonMaskableInt_IRQn 1 */
}
 8000780:	46c0      	nop			; (mov r8, r8)
 8000782:	46bd      	mov	sp, r7
 8000784:	bd80      	pop	{r7, pc}

08000786 <HardFault_Handler>:

/**
  * @brief This function handles Hard fault interrupt.
  */
void HardFault_Handler(void)
{
 8000786:	b580      	push	{r7, lr}
 8000788:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN HardFault_IRQn 0 */

  /* USER CODE END HardFault_IRQn 0 */
  while (1)
 800078a:	e7fe      	b.n	800078a <HardFault_Handler+0x4>

0800078c <TIM1_BRK_UP_TRG_COM_IRQHandler>:

/**
  * @brief This function handles TIM1 break, update, trigger and commutation interrupts.
  */
void TIM1_BRK_UP_TRG_COM_IRQHandler(void)
{
 800078c:	b580      	push	{r7, lr}
 800078e:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN TIM1_BRK_UP_TRG_COM_IRQn 0 */

  /* USER CODE END TIM1_BRK_UP_TRG_COM_IRQn 0 */
  HAL_TIM_IRQHandler(&htim1);
 8000790:	4b03      	ldr	r3, [pc, #12]	; (80007a0 <TIM1_BRK_UP_TRG_COM_IRQHandler+0x14>)
 8000792:	0018      	movs	r0, r3
 8000794:	f000 ffac 	bl	80016f0 <HAL_TIM_IRQHandler>
  /* USER CODE BEGIN TIM1_BRK_UP_TRG_COM_IRQn 1 */

  /* USER CODE END TIM1_BRK_UP_TRG_COM_IRQn 1 */
}
 8000798:	46c0      	nop			; (mov r8, r8)
 800079a:	46bd      	mov	sp, r7
 800079c:	bd80      	pop	{r7, pc}
 800079e:	46c0      	nop			; (mov r8, r8)
 80007a0:	20001938 	.word	0x20001938

080007a4 <SystemInit>:
  * @brief  Setup the microcontroller system.
  * @param  None
  * @retval None
  */
void SystemInit(void)
{
 80007a4:	b580      	push	{r7, lr}
 80007a6:	af00      	add	r7, sp, #0
                         before branch to main program. This call is made inside
                         the "startup_stm32f0xx.s" file.
                         User can setups the default system clock (System clock source, PLL Multiplier
                         and Divider factors, AHB/APBx prescalers and Flash settings).
   */
}
 80007a8:	46c0      	nop			; (mov r8, r8)
 80007aa:	46bd      	mov	sp, r7
 80007ac:	bd80      	pop	{r7, pc}
	...

080007b0 <Reset_Handler>:

  .section .text.Reset_Handler
  .weak Reset_Handler
  .type Reset_Handler, %function
Reset_Handler:
  ldr   r0, =_estack
 80007b0:	480d      	ldr	r0, [pc, #52]	; (80007e8 <LoopForever+0x2>)
  mov   sp, r0          /* set stack pointer */
 80007b2:	4685      	mov	sp, r0

/* Copy the data segment initializers from flash to SRAM */
  ldr r0, =_sdata
 80007b4:	480d      	ldr	r0, [pc, #52]	; (80007ec <LoopForever+0x6>)
  ldr r1, =_edata
 80007b6:	490e      	ldr	r1, [pc, #56]	; (80007f0 <LoopForever+0xa>)
  ldr r2, =_sidata
 80007b8:	4a0e      	ldr	r2, [pc, #56]	; (80007f4 <LoopForever+0xe>)
  movs r3, #0
 80007ba:	2300      	movs	r3, #0
  b LoopCopyDataInit
 80007bc:	e002      	b.n	80007c4 <LoopCopyDataInit>

080007be <CopyDataInit>:

CopyDataInit:
  ldr r4, [r2, r3]
 80007be:	58d4      	ldr	r4, [r2, r3]
  str r4, [r0, r3]
 80007c0:	50c4      	str	r4, [r0, r3]
  adds r3, r3, #4
 80007c2:	3304      	adds	r3, #4

080007c4 <LoopCopyDataInit>:

LoopCopyDataInit:
  adds r4, r0, r3
 80007c4:	18c4      	adds	r4, r0, r3
  cmp r4, r1
 80007c6:	428c      	cmp	r4, r1
  bcc CopyDataInit
 80007c8:	d3f9      	bcc.n	80007be <CopyDataInit>
  
/* Zero fill the bss segment. */
  ldr r2, =_sbss
 80007ca:	4a0b      	ldr	r2, [pc, #44]	; (80007f8 <LoopForever+0x12>)
  ldr r4, =_ebss
 80007cc:	4c0b      	ldr	r4, [pc, #44]	; (80007fc <LoopForever+0x16>)
  movs r3, #0
 80007ce:	2300      	movs	r3, #0
  b LoopFillZerobss
 80007d0:	e001      	b.n	80007d6 <LoopFillZerobss>

080007d2 <FillZerobss>:

FillZerobss:
  str  r3, [r2]
 80007d2:	6013      	str	r3, [r2, #0]
  adds r2, r2, #4
 80007d4:	3204      	adds	r2, #4

080007d6 <LoopFillZerobss>:

LoopFillZerobss:
  cmp r2, r4
 80007d6:	42a2      	cmp	r2, r4
  bcc FillZerobss
 80007d8:	d3fb      	bcc.n	80007d2 <FillZerobss>

/* Call the clock system intitialization function.*/
  bl  SystemInit
 80007da:	f7ff ffe3 	bl	80007a4 <SystemInit>
/* Call static constructors */
  bl __libc_init_array
 80007de:	f003 fb65 	bl	8003eac <__libc_init_array>
/* Call the application's entry point.*/
  bl main
 80007e2:	f7ff fed3 	bl	800058c <main>

080007e6 <LoopForever>:

LoopForever:
    b LoopForever
 80007e6:	e7fe      	b.n	80007e6 <LoopForever>
  ldr   r0, =_estack
 80007e8:	20002000 	.word	0x20002000
  ldr r0, =_sdata
 80007ec:	20000000 	.word	0x20000000
  ldr r1, =_edata
 80007f0:	20000010 	.word	0x20000010
  ldr r2, =_sidata
 80007f4:	08003fc4 	.word	0x08003fc4
  ldr r2, =_sbss
 80007f8:	20000010 	.word	0x20000010
  ldr r4, =_ebss
 80007fc:	200019bc 	.word	0x200019bc

08000800 <ADC1_IRQHandler>:
 * @retval : None
*/
    .section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
  b Infinite_Loop
 8000800:	e7fe      	b.n	8000800 <ADC1_IRQHandler>
	...

08000804 <HAL_Init>:
  *       In the default implementation,Systick is used as source of time base.
  *       The tick variable is incremented each 1ms in its ISR.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_Init(void)
{
 8000804:	b580      	push	{r7, lr}
 8000806:	af00      	add	r7, sp, #0
  /* Configure Flash prefetch */ 
#if (PREFETCH_ENABLE != 0)
  __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
 8000808:	4b07      	ldr	r3, [pc, #28]	; (8000828 <HAL_Init+0x24>)
 800080a:	681a      	ldr	r2, [r3, #0]
 800080c:	4b06      	ldr	r3, [pc, #24]	; (8000828 <HAL_Init+0x24>)
 800080e:	2110      	movs	r1, #16
 8000810:	430a      	orrs	r2, r1
 8000812:	601a      	str	r2, [r3, #0]
#endif /* PREFETCH_ENABLE */

  /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */

  HAL_InitTick(TICK_INT_PRIORITY);
 8000814:	2000      	movs	r0, #0
 8000816:	f7ff ff53 	bl	80006c0 <HAL_InitTick>

  /* Init the low level hardware */
  HAL_MspInit();
 800081a:	f7ff ff27 	bl	800066c <HAL_MspInit>

  /* Return function status */
  return HAL_OK;
 800081e:	2300      	movs	r3, #0
}
 8000820:	0018      	movs	r0, r3
 8000822:	46bd      	mov	sp, r7
 8000824:	bd80      	pop	{r7, pc}
 8000826:	46c0      	nop			; (mov r8, r8)
 8000828:	40022000 	.word	0x40022000

0800082c <HAL_IncTick>:
  * @note This function is declared as __weak to be overwritten in case of other 
  *       implementations in user file.
  * @retval None
  */
__weak void HAL_IncTick(void)
{
 800082c:	b580      	push	{r7, lr}
 800082e:	af00      	add	r7, sp, #0
  uwTick += uwTickFreq;
 8000830:	4b05      	ldr	r3, [pc, #20]	; (8000848 <HAL_IncTick+0x1c>)
 8000832:	781b      	ldrb	r3, [r3, #0]
 8000834:	001a      	movs	r2, r3
 8000836:	4b05      	ldr	r3, [pc, #20]	; (800084c <HAL_IncTick+0x20>)
 8000838:	681b      	ldr	r3, [r3, #0]
 800083a:	18d2      	adds	r2, r2, r3
 800083c:	4b03      	ldr	r3, [pc, #12]	; (800084c <HAL_IncTick+0x20>)
 800083e:	601a      	str	r2, [r3, #0]
}
 8000840:	46c0      	nop			; (mov r8, r8)
 8000842:	46bd      	mov	sp, r7
 8000844:	bd80      	pop	{r7, pc}
 8000846:	46c0      	nop			; (mov r8, r8)
 8000848:	20000008 	.word	0x20000008
 800084c:	20001978 	.word	0x20001978

08000850 <HAL_GetTick>:
  * @note   This function is declared as __weak  to be overwritten  in case of other 
  *       implementations in user file.
  * @retval tick value
  */
__weak uint32_t HAL_GetTick(void)
{
 8000850:	b580      	push	{r7, lr}
 8000852:	af00      	add	r7, sp, #0
  return uwTick;
 8000854:	4b02      	ldr	r3, [pc, #8]	; (8000860 <HAL_GetTick+0x10>)
 8000856:	681b      	ldr	r3, [r3, #0]
}
 8000858:	0018      	movs	r0, r3
 800085a:	46bd      	mov	sp, r7
 800085c:	bd80      	pop	{r7, pc}
 800085e:	46c0      	nop			; (mov r8, r8)
 8000860:	20001978 	.word	0x20001978

08000864 <__NVIC_EnableIRQ>:
  \details Enables a device specific interrupt in the NVIC interrupt controller.
  \param [in]      IRQn  Device specific interrupt number.
  \note    IRQn must not be negative.
 */
__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
{
 8000864:	b580      	push	{r7, lr}
 8000866:	b082      	sub	sp, #8
 8000868:	af00      	add	r7, sp, #0
 800086a:	0002      	movs	r2, r0
 800086c:	1dfb      	adds	r3, r7, #7
 800086e:	701a      	strb	r2, [r3, #0]
  if ((int32_t)(IRQn) >= 0)
 8000870:	1dfb      	adds	r3, r7, #7
 8000872:	781b      	ldrb	r3, [r3, #0]
 8000874:	2b7f      	cmp	r3, #127	; 0x7f
 8000876:	d809      	bhi.n	800088c <__NVIC_EnableIRQ+0x28>
  {
    NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
 8000878:	1dfb      	adds	r3, r7, #7
 800087a:	781b      	ldrb	r3, [r3, #0]
 800087c:	001a      	movs	r2, r3
 800087e:	231f      	movs	r3, #31
 8000880:	401a      	ands	r2, r3
 8000882:	4b04      	ldr	r3, [pc, #16]	; (8000894 <__NVIC_EnableIRQ+0x30>)
 8000884:	2101      	movs	r1, #1
 8000886:	4091      	lsls	r1, r2
 8000888:	000a      	movs	r2, r1
 800088a:	601a      	str	r2, [r3, #0]
  }
}
 800088c:	46c0      	nop			; (mov r8, r8)
 800088e:	46bd      	mov	sp, r7
 8000890:	b002      	add	sp, #8
 8000892:	bd80      	pop	{r7, pc}
 8000894:	e000e100 	.word	0xe000e100

08000898 <__NVIC_SetPriority>:
  \param [in]      IRQn  Interrupt number.
  \param [in]  priority  Priority to set.
  \note    The priority cannot be set for every processor exception.
 */
__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
{
 8000898:	b590      	push	{r4, r7, lr}
 800089a:	b083      	sub	sp, #12
 800089c:	af00      	add	r7, sp, #0
 800089e:	0002      	movs	r2, r0
 80008a0:	6039      	str	r1, [r7, #0]
 80008a2:	1dfb      	adds	r3, r7, #7
 80008a4:	701a      	strb	r2, [r3, #0]
  if ((int32_t)(IRQn) >= 0)
 80008a6:	1dfb      	adds	r3, r7, #7
 80008a8:	781b      	ldrb	r3, [r3, #0]
 80008aa:	2b7f      	cmp	r3, #127	; 0x7f
 80008ac:	d828      	bhi.n	8000900 <__NVIC_SetPriority+0x68>
  {
    NVIC->IP[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
 80008ae:	4a2f      	ldr	r2, [pc, #188]	; (800096c <__NVIC_SetPriority+0xd4>)
 80008b0:	1dfb      	adds	r3, r7, #7
 80008b2:	781b      	ldrb	r3, [r3, #0]
 80008b4:	b25b      	sxtb	r3, r3
 80008b6:	089b      	lsrs	r3, r3, #2
 80008b8:	33c0      	adds	r3, #192	; 0xc0
 80008ba:	009b      	lsls	r3, r3, #2
 80008bc:	589b      	ldr	r3, [r3, r2]
 80008be:	1dfa      	adds	r2, r7, #7
 80008c0:	7812      	ldrb	r2, [r2, #0]
 80008c2:	0011      	movs	r1, r2
 80008c4:	2203      	movs	r2, #3
 80008c6:	400a      	ands	r2, r1
 80008c8:	00d2      	lsls	r2, r2, #3
 80008ca:	21ff      	movs	r1, #255	; 0xff
 80008cc:	4091      	lsls	r1, r2
 80008ce:	000a      	movs	r2, r1
 80008d0:	43d2      	mvns	r2, r2
 80008d2:	401a      	ands	r2, r3
 80008d4:	0011      	movs	r1, r2
       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
 80008d6:	683b      	ldr	r3, [r7, #0]
 80008d8:	019b      	lsls	r3, r3, #6
 80008da:	22ff      	movs	r2, #255	; 0xff
 80008dc:	401a      	ands	r2, r3
 80008de:	1dfb      	adds	r3, r7, #7
 80008e0:	781b      	ldrb	r3, [r3, #0]
 80008e2:	0018      	movs	r0, r3
 80008e4:	2303      	movs	r3, #3
 80008e6:	4003      	ands	r3, r0
 80008e8:	00db      	lsls	r3, r3, #3
 80008ea:	409a      	lsls	r2, r3
    NVIC->IP[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
 80008ec:	481f      	ldr	r0, [pc, #124]	; (800096c <__NVIC_SetPriority+0xd4>)
 80008ee:	1dfb      	adds	r3, r7, #7
 80008f0:	781b      	ldrb	r3, [r3, #0]
 80008f2:	b25b      	sxtb	r3, r3
 80008f4:	089b      	lsrs	r3, r3, #2
 80008f6:	430a      	orrs	r2, r1
 80008f8:	33c0      	adds	r3, #192	; 0xc0
 80008fa:	009b      	lsls	r3, r3, #2
 80008fc:	501a      	str	r2, [r3, r0]
  else
  {
    SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
  }
}
 80008fe:	e031      	b.n	8000964 <__NVIC_SetPriority+0xcc>
    SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
 8000900:	4a1b      	ldr	r2, [pc, #108]	; (8000970 <__NVIC_SetPriority+0xd8>)
 8000902:	1dfb      	adds	r3, r7, #7
 8000904:	781b      	ldrb	r3, [r3, #0]
 8000906:	0019      	movs	r1, r3
 8000908:	230f      	movs	r3, #15
 800090a:	400b      	ands	r3, r1
 800090c:	3b08      	subs	r3, #8
 800090e:	089b      	lsrs	r3, r3, #2
 8000910:	3306      	adds	r3, #6
 8000912:	009b      	lsls	r3, r3, #2
 8000914:	18d3      	adds	r3, r2, r3
 8000916:	3304      	adds	r3, #4
 8000918:	681b      	ldr	r3, [r3, #0]
 800091a:	1dfa      	adds	r2, r7, #7
 800091c:	7812      	ldrb	r2, [r2, #0]
 800091e:	0011      	movs	r1, r2
 8000920:	2203      	movs	r2, #3
 8000922:	400a      	ands	r2, r1
 8000924:	00d2      	lsls	r2, r2, #3
 8000926:	21ff      	movs	r1, #255	; 0xff
 8000928:	4091      	lsls	r1, r2
 800092a:	000a      	movs	r2, r1
 800092c:	43d2      	mvns	r2, r2
 800092e:	401a      	ands	r2, r3
 8000930:	0011      	movs	r1, r2
       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
 8000932:	683b      	ldr	r3, [r7, #0]
 8000934:	019b      	lsls	r3, r3, #6
 8000936:	22ff      	movs	r2, #255	; 0xff
 8000938:	401a      	ands	r2, r3
 800093a:	1dfb      	adds	r3, r7, #7
 800093c:	781b      	ldrb	r3, [r3, #0]
 800093e:	0018      	movs	r0, r3
 8000940:	2303      	movs	r3, #3
 8000942:	4003      	ands	r3, r0
 8000944:	00db      	lsls	r3, r3, #3
 8000946:	409a      	lsls	r2, r3
    SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
 8000948:	4809      	ldr	r0, [pc, #36]	; (8000970 <__NVIC_SetPriority+0xd8>)
 800094a:	1dfb      	adds	r3, r7, #7
 800094c:	781b      	ldrb	r3, [r3, #0]
 800094e:	001c      	movs	r4, r3
 8000950:	230f      	movs	r3, #15
 8000952:	4023      	ands	r3, r4
 8000954:	3b08      	subs	r3, #8
 8000956:	089b      	lsrs	r3, r3, #2
 8000958:	430a      	orrs	r2, r1
 800095a:	3306      	adds	r3, #6
 800095c:	009b      	lsls	r3, r3, #2
 800095e:	18c3      	adds	r3, r0, r3
 8000960:	3304      	adds	r3, #4
 8000962:	601a      	str	r2, [r3, #0]
}
 8000964:	46c0      	nop			; (mov r8, r8)
 8000966:	46bd      	mov	sp, r7
 8000968:	b003      	add	sp, #12
 800096a:	bd90      	pop	{r4, r7, pc}
 800096c:	e000e100 	.word	0xe000e100
 8000970:	e000ed00 	.word	0xe000ed00

08000974 <HAL_NVIC_SetPriority>:
  *         with stm32f0xx devices, this parameter is a dummy value and it is ignored, because 
  *         no subpriority supported in Cortex M0 based products.   
  * @retval None
  */
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
{ 
 8000974:	b580      	push	{r7, lr}
 8000976:	b084      	sub	sp, #16
 8000978:	af00      	add	r7, sp, #0
 800097a:	60b9      	str	r1, [r7, #8]
 800097c:	607a      	str	r2, [r7, #4]
 800097e:	210f      	movs	r1, #15
 8000980:	187b      	adds	r3, r7, r1
 8000982:	1c02      	adds	r2, r0, #0
 8000984:	701a      	strb	r2, [r3, #0]
  /* Check the parameters */
  assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
  NVIC_SetPriority(IRQn,PreemptPriority);
 8000986:	68ba      	ldr	r2, [r7, #8]
 8000988:	187b      	adds	r3, r7, r1
 800098a:	781b      	ldrb	r3, [r3, #0]
 800098c:	b25b      	sxtb	r3, r3
 800098e:	0011      	movs	r1, r2
 8000990:	0018      	movs	r0, r3
 8000992:	f7ff ff81 	bl	8000898 <__NVIC_SetPriority>
}
 8000996:	46c0      	nop			; (mov r8, r8)
 8000998:	46bd      	mov	sp, r7
 800099a:	b004      	add	sp, #16
 800099c:	bd80      	pop	{r7, pc}

0800099e <HAL_NVIC_EnableIRQ>:
  *         This parameter can be an enumerator of IRQn_Type enumeration
  *         (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f0xxxx.h))
  * @retval None
  */
void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
{
 800099e:	b580      	push	{r7, lr}
 80009a0:	b082      	sub	sp, #8
 80009a2:	af00      	add	r7, sp, #0
 80009a4:	0002      	movs	r2, r0
 80009a6:	1dfb      	adds	r3, r7, #7
 80009a8:	701a      	strb	r2, [r3, #0]
  /* Check the parameters */
  assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
  
  /* Enable interrupt */
  NVIC_EnableIRQ(IRQn);
 80009aa:	1dfb      	adds	r3, r7, #7
 80009ac:	781b      	ldrb	r3, [r3, #0]
 80009ae:	b25b      	sxtb	r3, r3
 80009b0:	0018      	movs	r0, r3
 80009b2:	f7ff ff57 	bl	8000864 <__NVIC_EnableIRQ>
}
 80009b6:	46c0      	nop			; (mov r8, r8)
 80009b8:	46bd      	mov	sp, r7
 80009ba:	b002      	add	sp, #8
 80009bc:	bd80      	pop	{r7, pc}
	...

080009c0 <HAL_GPIO_Init>:
  * @param  GPIO_Init pointer to a GPIO_InitTypeDef structure that contains
  *         the configuration information for the specified GPIO peripheral.
  * @retval None
  */
void HAL_GPIO_Init(GPIO_TypeDef  *GPIOx, GPIO_InitTypeDef *GPIO_Init)
{ 
 80009c0:	b580      	push	{r7, lr}
 80009c2:	b086      	sub	sp, #24
 80009c4:	af00      	add	r7, sp, #0
 80009c6:	6078      	str	r0, [r7, #4]
 80009c8:	6039      	str	r1, [r7, #0]
  uint32_t position = 0x00u;
 80009ca:	2300      	movs	r3, #0
 80009cc:	617b      	str	r3, [r7, #20]
  assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
  assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
  assert_param(IS_GPIO_PULL(GPIO_Init->Pull));

  /* Configure the port pins */
  while (((GPIO_Init->Pin) >> position) != 0x00u)
 80009ce:	e14f      	b.n	8000c70 <HAL_GPIO_Init+0x2b0>
  {
    /* Get current io position */
    iocurrent = (GPIO_Init->Pin) & (1uL << position);
 80009d0:	683b      	ldr	r3, [r7, #0]
 80009d2:	681b      	ldr	r3, [r3, #0]
 80009d4:	2101      	movs	r1, #1
 80009d6:	697a      	ldr	r2, [r7, #20]
 80009d8:	4091      	lsls	r1, r2
 80009da:	000a      	movs	r2, r1
 80009dc:	4013      	ands	r3, r2
 80009de:	60fb      	str	r3, [r7, #12]

    if (iocurrent != 0x00u)
 80009e0:	68fb      	ldr	r3, [r7, #12]
 80009e2:	2b00      	cmp	r3, #0
 80009e4:	d100      	bne.n	80009e8 <HAL_GPIO_Init+0x28>
 80009e6:	e140      	b.n	8000c6a <HAL_GPIO_Init+0x2aa>
    {
      /*--------------------- GPIO Mode Configuration ------------------------*/
      /* In case of Alternate function mode selection */
      if((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
 80009e8:	683b      	ldr	r3, [r7, #0]
 80009ea:	685b      	ldr	r3, [r3, #4]
 80009ec:	2b02      	cmp	r3, #2
 80009ee:	d003      	beq.n	80009f8 <HAL_GPIO_Init+0x38>
 80009f0:	683b      	ldr	r3, [r7, #0]
 80009f2:	685b      	ldr	r3, [r3, #4]
 80009f4:	2b12      	cmp	r3, #18
 80009f6:	d123      	bne.n	8000a40 <HAL_GPIO_Init+0x80>
        /* Check the Alternate function parameters */
        assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
        assert_param(IS_GPIO_AF(GPIO_Init->Alternate));

        /* Configure Alternate function mapped with the current IO */
        temp = GPIOx->AFR[position >> 3u];
 80009f8:	697b      	ldr	r3, [r7, #20]
 80009fa:	08da      	lsrs	r2, r3, #3
 80009fc:	687b      	ldr	r3, [r7, #4]
 80009fe:	3208      	adds	r2, #8
 8000a00:	0092      	lsls	r2, r2, #2
 8000a02:	58d3      	ldr	r3, [r2, r3]
 8000a04:	613b      	str	r3, [r7, #16]
        temp &= ~(0xFu << ((position & 0x07u) * 4u));
 8000a06:	697b      	ldr	r3, [r7, #20]
 8000a08:	2207      	movs	r2, #7
 8000a0a:	4013      	ands	r3, r2
 8000a0c:	009b      	lsls	r3, r3, #2
 8000a0e:	220f      	movs	r2, #15
 8000a10:	409a      	lsls	r2, r3
 8000a12:	0013      	movs	r3, r2
 8000a14:	43da      	mvns	r2, r3
 8000a16:	693b      	ldr	r3, [r7, #16]
 8000a18:	4013      	ands	r3, r2
 8000a1a:	613b      	str	r3, [r7, #16]
        temp |= ((GPIO_Init->Alternate) << ((position & 0x07u) * 4u));
 8000a1c:	683b      	ldr	r3, [r7, #0]
 8000a1e:	691a      	ldr	r2, [r3, #16]
 8000a20:	697b      	ldr	r3, [r7, #20]
 8000a22:	2107      	movs	r1, #7
 8000a24:	400b      	ands	r3, r1
 8000a26:	009b      	lsls	r3, r3, #2
 8000a28:	409a      	lsls	r2, r3
 8000a2a:	0013      	movs	r3, r2
 8000a2c:	693a      	ldr	r2, [r7, #16]
 8000a2e:	4313      	orrs	r3, r2
 8000a30:	613b      	str	r3, [r7, #16]
        GPIOx->AFR[position >> 3u] = temp;
 8000a32:	697b      	ldr	r3, [r7, #20]
 8000a34:	08da      	lsrs	r2, r3, #3
 8000a36:	687b      	ldr	r3, [r7, #4]
 8000a38:	3208      	adds	r2, #8
 8000a3a:	0092      	lsls	r2, r2, #2
 8000a3c:	6939      	ldr	r1, [r7, #16]
 8000a3e:	50d1      	str	r1, [r2, r3]
      }

      /* Configure IO Direction mode (Input, Output, Alternate or Analog) */
      temp = GPIOx->MODER;
 8000a40:	687b      	ldr	r3, [r7, #4]
 8000a42:	681b      	ldr	r3, [r3, #0]
 8000a44:	613b      	str	r3, [r7, #16]
      temp &= ~(GPIO_MODER_MODER0 << (position * 2u));
 8000a46:	697b      	ldr	r3, [r7, #20]
 8000a48:	005b      	lsls	r3, r3, #1
 8000a4a:	2203      	movs	r2, #3
 8000a4c:	409a      	lsls	r2, r3
 8000a4e:	0013      	movs	r3, r2
 8000a50:	43da      	mvns	r2, r3
 8000a52:	693b      	ldr	r3, [r7, #16]
 8000a54:	4013      	ands	r3, r2
 8000a56:	613b      	str	r3, [r7, #16]
      temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2u));
 8000a58:	683b      	ldr	r3, [r7, #0]
 8000a5a:	685b      	ldr	r3, [r3, #4]
 8000a5c:	2203      	movs	r2, #3
 8000a5e:	401a      	ands	r2, r3
 8000a60:	697b      	ldr	r3, [r7, #20]
 8000a62:	005b      	lsls	r3, r3, #1
 8000a64:	409a      	lsls	r2, r3
 8000a66:	0013      	movs	r3, r2
 8000a68:	693a      	ldr	r2, [r7, #16]
 8000a6a:	4313      	orrs	r3, r2
 8000a6c:	613b      	str	r3, [r7, #16]
      GPIOx->MODER = temp;
 8000a6e:	687b      	ldr	r3, [r7, #4]
 8000a70:	693a      	ldr	r2, [r7, #16]
 8000a72:	601a      	str	r2, [r3, #0]

      /* In case of Output or Alternate function mode selection */
      if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) ||
 8000a74:	683b      	ldr	r3, [r7, #0]
 8000a76:	685b      	ldr	r3, [r3, #4]
 8000a78:	2b01      	cmp	r3, #1
 8000a7a:	d00b      	beq.n	8000a94 <HAL_GPIO_Init+0xd4>
 8000a7c:	683b      	ldr	r3, [r7, #0]
 8000a7e:	685b      	ldr	r3, [r3, #4]
 8000a80:	2b02      	cmp	r3, #2
 8000a82:	d007      	beq.n	8000a94 <HAL_GPIO_Init+0xd4>
         (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
 8000a84:	683b      	ldr	r3, [r7, #0]
 8000a86:	685b      	ldr	r3, [r3, #4]
      if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) ||
 8000a88:	2b11      	cmp	r3, #17
 8000a8a:	d003      	beq.n	8000a94 <HAL_GPIO_Init+0xd4>
         (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
 8000a8c:	683b      	ldr	r3, [r7, #0]
 8000a8e:	685b      	ldr	r3, [r3, #4]
 8000a90:	2b12      	cmp	r3, #18
 8000a92:	d130      	bne.n	8000af6 <HAL_GPIO_Init+0x136>
      {
        /* Check the Speed parameter */
        assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
        /* Configure the IO Speed */
        temp = GPIOx->OSPEEDR;
 8000a94:	687b      	ldr	r3, [r7, #4]
 8000a96:	689b      	ldr	r3, [r3, #8]
 8000a98:	613b      	str	r3, [r7, #16]
        temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2u));
 8000a9a:	697b      	ldr	r3, [r7, #20]
 8000a9c:	005b      	lsls	r3, r3, #1
 8000a9e:	2203      	movs	r2, #3
 8000aa0:	409a      	lsls	r2, r3
 8000aa2:	0013      	movs	r3, r2
 8000aa4:	43da      	mvns	r2, r3
 8000aa6:	693b      	ldr	r3, [r7, #16]
 8000aa8:	4013      	ands	r3, r2
 8000aaa:	613b      	str	r3, [r7, #16]
        temp |= (GPIO_Init->Speed << (position * 2u));
 8000aac:	683b      	ldr	r3, [r7, #0]
 8000aae:	68da      	ldr	r2, [r3, #12]
 8000ab0:	697b      	ldr	r3, [r7, #20]
 8000ab2:	005b      	lsls	r3, r3, #1
 8000ab4:	409a      	lsls	r2, r3
 8000ab6:	0013      	movs	r3, r2
 8000ab8:	693a      	ldr	r2, [r7, #16]
 8000aba:	4313      	orrs	r3, r2
 8000abc:	613b      	str	r3, [r7, #16]
        GPIOx->OSPEEDR = temp;
 8000abe:	687b      	ldr	r3, [r7, #4]
 8000ac0:	693a      	ldr	r2, [r7, #16]
 8000ac2:	609a      	str	r2, [r3, #8]

        /* Configure the IO Output Type */
        temp = GPIOx->OTYPER;
 8000ac4:	687b      	ldr	r3, [r7, #4]
 8000ac6:	685b      	ldr	r3, [r3, #4]
 8000ac8:	613b      	str	r3, [r7, #16]
        temp &= ~(GPIO_OTYPER_OT_0 << position) ;
 8000aca:	2201      	movs	r2, #1
 8000acc:	697b      	ldr	r3, [r7, #20]
 8000ace:	409a      	lsls	r2, r3
 8000ad0:	0013      	movs	r3, r2
 8000ad2:	43da      	mvns	r2, r3
 8000ad4:	693b      	ldr	r3, [r7, #16]
 8000ad6:	4013      	ands	r3, r2
 8000ad8:	613b      	str	r3, [r7, #16]
        temp |= (((GPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4u) << position);
 8000ada:	683b      	ldr	r3, [r7, #0]
 8000adc:	685b      	ldr	r3, [r3, #4]
 8000ade:	091b      	lsrs	r3, r3, #4
 8000ae0:	2201      	movs	r2, #1
 8000ae2:	401a      	ands	r2, r3
 8000ae4:	697b      	ldr	r3, [r7, #20]
 8000ae6:	409a      	lsls	r2, r3
 8000ae8:	0013      	movs	r3, r2
 8000aea:	693a      	ldr	r2, [r7, #16]
 8000aec:	4313      	orrs	r3, r2
 8000aee:	613b      	str	r3, [r7, #16]
        GPIOx->OTYPER = temp;
 8000af0:	687b      	ldr	r3, [r7, #4]
 8000af2:	693a      	ldr	r2, [r7, #16]
 8000af4:	605a      	str	r2, [r3, #4]
      }

      /* Activate the Pull-up or Pull down resistor for the current IO */
      temp = GPIOx->PUPDR;
 8000af6:	687b      	ldr	r3, [r7, #4]
 8000af8:	68db      	ldr	r3, [r3, #12]
 8000afa:	613b      	str	r3, [r7, #16]
      temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2u));
 8000afc:	697b      	ldr	r3, [r7, #20]
 8000afe:	005b      	lsls	r3, r3, #1
 8000b00:	2203      	movs	r2, #3
 8000b02:	409a      	lsls	r2, r3
 8000b04:	0013      	movs	r3, r2
 8000b06:	43da      	mvns	r2, r3
 8000b08:	693b      	ldr	r3, [r7, #16]
 8000b0a:	4013      	ands	r3, r2
 8000b0c:	613b      	str	r3, [r7, #16]
      temp |= ((GPIO_Init->Pull) << (position * 2u));
 8000b0e:	683b      	ldr	r3, [r7, #0]
 8000b10:	689a      	ldr	r2, [r3, #8]
 8000b12:	697b      	ldr	r3, [r7, #20]
 8000b14:	005b      	lsls	r3, r3, #1
 8000b16:	409a      	lsls	r2, r3
 8000b18:	0013      	movs	r3, r2
 8000b1a:	693a      	ldr	r2, [r7, #16]
 8000b1c:	4313      	orrs	r3, r2
 8000b1e:	613b      	str	r3, [r7, #16]
      GPIOx->PUPDR = temp;
 8000b20:	687b      	ldr	r3, [r7, #4]
 8000b22:	693a      	ldr	r2, [r7, #16]
 8000b24:	60da      	str	r2, [r3, #12]

      /*--------------------- EXTI Mode Configuration ------------------------*/
      /* Configure the External Interrupt or event for the current IO */
      if((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
 8000b26:	683b      	ldr	r3, [r7, #0]
 8000b28:	685a      	ldr	r2, [r3, #4]
 8000b2a:	2380      	movs	r3, #128	; 0x80
 8000b2c:	055b      	lsls	r3, r3, #21
 8000b2e:	4013      	ands	r3, r2
 8000b30:	d100      	bne.n	8000b34 <HAL_GPIO_Init+0x174>
 8000b32:	e09a      	b.n	8000c6a <HAL_GPIO_Init+0x2aa>
      {
        /* Enable SYSCFG Clock */
        __HAL_RCC_SYSCFG_CLK_ENABLE();
 8000b34:	4b54      	ldr	r3, [pc, #336]	; (8000c88 <HAL_GPIO_Init+0x2c8>)
 8000b36:	699a      	ldr	r2, [r3, #24]
 8000b38:	4b53      	ldr	r3, [pc, #332]	; (8000c88 <HAL_GPIO_Init+0x2c8>)
 8000b3a:	2101      	movs	r1, #1
 8000b3c:	430a      	orrs	r2, r1
 8000b3e:	619a      	str	r2, [r3, #24]
 8000b40:	4b51      	ldr	r3, [pc, #324]	; (8000c88 <HAL_GPIO_Init+0x2c8>)
 8000b42:	699b      	ldr	r3, [r3, #24]
 8000b44:	2201      	movs	r2, #1
 8000b46:	4013      	ands	r3, r2
 8000b48:	60bb      	str	r3, [r7, #8]
 8000b4a:	68bb      	ldr	r3, [r7, #8]

        temp = SYSCFG->EXTICR[position >> 2u];
 8000b4c:	4a4f      	ldr	r2, [pc, #316]	; (8000c8c <HAL_GPIO_Init+0x2cc>)
 8000b4e:	697b      	ldr	r3, [r7, #20]
 8000b50:	089b      	lsrs	r3, r3, #2
 8000b52:	3302      	adds	r3, #2
 8000b54:	009b      	lsls	r3, r3, #2
 8000b56:	589b      	ldr	r3, [r3, r2]
 8000b58:	613b      	str	r3, [r7, #16]
        temp &= ~(0x0FuL << (4u * (position & 0x03u)));
 8000b5a:	697b      	ldr	r3, [r7, #20]
 8000b5c:	2203      	movs	r2, #3
 8000b5e:	4013      	ands	r3, r2
 8000b60:	009b      	lsls	r3, r3, #2
 8000b62:	220f      	movs	r2, #15
 8000b64:	409a      	lsls	r2, r3
 8000b66:	0013      	movs	r3, r2
 8000b68:	43da      	mvns	r2, r3
 8000b6a:	693b      	ldr	r3, [r7, #16]
 8000b6c:	4013      	ands	r3, r2
 8000b6e:	613b      	str	r3, [r7, #16]
        temp |= (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u)));
 8000b70:	687a      	ldr	r2, [r7, #4]
 8000b72:	2390      	movs	r3, #144	; 0x90
 8000b74:	05db      	lsls	r3, r3, #23
 8000b76:	429a      	cmp	r2, r3
 8000b78:	d013      	beq.n	8000ba2 <HAL_GPIO_Init+0x1e2>
 8000b7a:	687b      	ldr	r3, [r7, #4]
 8000b7c:	4a44      	ldr	r2, [pc, #272]	; (8000c90 <HAL_GPIO_Init+0x2d0>)
 8000b7e:	4293      	cmp	r3, r2
 8000b80:	d00d      	beq.n	8000b9e <HAL_GPIO_Init+0x1de>
 8000b82:	687b      	ldr	r3, [r7, #4]
 8000b84:	4a43      	ldr	r2, [pc, #268]	; (8000c94 <HAL_GPIO_Init+0x2d4>)
 8000b86:	4293      	cmp	r3, r2
 8000b88:	d007      	beq.n	8000b9a <HAL_GPIO_Init+0x1da>
 8000b8a:	687b      	ldr	r3, [r7, #4]
 8000b8c:	4a42      	ldr	r2, [pc, #264]	; (8000c98 <HAL_GPIO_Init+0x2d8>)
 8000b8e:	4293      	cmp	r3, r2
 8000b90:	d101      	bne.n	8000b96 <HAL_GPIO_Init+0x1d6>
 8000b92:	2303      	movs	r3, #3
 8000b94:	e006      	b.n	8000ba4 <HAL_GPIO_Init+0x1e4>
 8000b96:	2305      	movs	r3, #5
 8000b98:	e004      	b.n	8000ba4 <HAL_GPIO_Init+0x1e4>
 8000b9a:	2302      	movs	r3, #2
 8000b9c:	e002      	b.n	8000ba4 <HAL_GPIO_Init+0x1e4>
 8000b9e:	2301      	movs	r3, #1
 8000ba0:	e000      	b.n	8000ba4 <HAL_GPIO_Init+0x1e4>
 8000ba2:	2300      	movs	r3, #0
 8000ba4:	697a      	ldr	r2, [r7, #20]
 8000ba6:	2103      	movs	r1, #3
 8000ba8:	400a      	ands	r2, r1
 8000baa:	0092      	lsls	r2, r2, #2
 8000bac:	4093      	lsls	r3, r2
 8000bae:	693a      	ldr	r2, [r7, #16]
 8000bb0:	4313      	orrs	r3, r2
 8000bb2:	613b      	str	r3, [r7, #16]
        SYSCFG->EXTICR[position >> 2u] = temp;
 8000bb4:	4935      	ldr	r1, [pc, #212]	; (8000c8c <HAL_GPIO_Init+0x2cc>)
 8000bb6:	697b      	ldr	r3, [r7, #20]
 8000bb8:	089b      	lsrs	r3, r3, #2
 8000bba:	3302      	adds	r3, #2
 8000bbc:	009b      	lsls	r3, r3, #2
 8000bbe:	693a      	ldr	r2, [r7, #16]
 8000bc0:	505a      	str	r2, [r3, r1]

        /* Clear EXTI line configuration */
        temp = EXTI->IMR;
 8000bc2:	4b36      	ldr	r3, [pc, #216]	; (8000c9c <HAL_GPIO_Init+0x2dc>)
 8000bc4:	681b      	ldr	r3, [r3, #0]
 8000bc6:	613b      	str	r3, [r7, #16]
        temp &= ~(iocurrent);
 8000bc8:	68fb      	ldr	r3, [r7, #12]
 8000bca:	43da      	mvns	r2, r3
 8000bcc:	693b      	ldr	r3, [r7, #16]
 8000bce:	4013      	ands	r3, r2
 8000bd0:	613b      	str	r3, [r7, #16]
        if((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
 8000bd2:	683b      	ldr	r3, [r7, #0]
 8000bd4:	685a      	ldr	r2, [r3, #4]
 8000bd6:	2380      	movs	r3, #128	; 0x80
 8000bd8:	025b      	lsls	r3, r3, #9
 8000bda:	4013      	ands	r3, r2
 8000bdc:	d003      	beq.n	8000be6 <HAL_GPIO_Init+0x226>
        {
          temp |= iocurrent;
 8000bde:	693a      	ldr	r2, [r7, #16]
 8000be0:	68fb      	ldr	r3, [r7, #12]
 8000be2:	4313      	orrs	r3, r2
 8000be4:	613b      	str	r3, [r7, #16]
        }
        EXTI->IMR = temp;
 8000be6:	4b2d      	ldr	r3, [pc, #180]	; (8000c9c <HAL_GPIO_Init+0x2dc>)
 8000be8:	693a      	ldr	r2, [r7, #16]
 8000bea:	601a      	str	r2, [r3, #0]

        temp = EXTI->EMR;
 8000bec:	4b2b      	ldr	r3, [pc, #172]	; (8000c9c <HAL_GPIO_Init+0x2dc>)
 8000bee:	685b      	ldr	r3, [r3, #4]
 8000bf0:	613b      	str	r3, [r7, #16]
        temp &= ~(iocurrent);
 8000bf2:	68fb      	ldr	r3, [r7, #12]
 8000bf4:	43da      	mvns	r2, r3
 8000bf6:	693b      	ldr	r3, [r7, #16]
 8000bf8:	4013      	ands	r3, r2
 8000bfa:	613b      	str	r3, [r7, #16]
        if((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
 8000bfc:	683b      	ldr	r3, [r7, #0]
 8000bfe:	685a      	ldr	r2, [r3, #4]
 8000c00:	2380      	movs	r3, #128	; 0x80
 8000c02:	029b      	lsls	r3, r3, #10
 8000c04:	4013      	ands	r3, r2
 8000c06:	d003      	beq.n	8000c10 <HAL_GPIO_Init+0x250>
        {
          temp |= iocurrent;
 8000c08:	693a      	ldr	r2, [r7, #16]
 8000c0a:	68fb      	ldr	r3, [r7, #12]
 8000c0c:	4313      	orrs	r3, r2
 8000c0e:	613b      	str	r3, [r7, #16]
        }
        EXTI->EMR = temp;
 8000c10:	4b22      	ldr	r3, [pc, #136]	; (8000c9c <HAL_GPIO_Init+0x2dc>)
 8000c12:	693a      	ldr	r2, [r7, #16]
 8000c14:	605a      	str	r2, [r3, #4]

        /* Clear Rising Falling edge configuration */
        temp = EXTI->RTSR;
 8000c16:	4b21      	ldr	r3, [pc, #132]	; (8000c9c <HAL_GPIO_Init+0x2dc>)
 8000c18:	689b      	ldr	r3, [r3, #8]
 8000c1a:	613b      	str	r3, [r7, #16]
        temp &= ~(iocurrent);
 8000c1c:	68fb      	ldr	r3, [r7, #12]
 8000c1e:	43da      	mvns	r2, r3
 8000c20:	693b      	ldr	r3, [r7, #16]
 8000c22:	4013      	ands	r3, r2
 8000c24:	613b      	str	r3, [r7, #16]
        if((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
 8000c26:	683b      	ldr	r3, [r7, #0]
 8000c28:	685a      	ldr	r2, [r3, #4]
 8000c2a:	2380      	movs	r3, #128	; 0x80
 8000c2c:	035b      	lsls	r3, r3, #13
 8000c2e:	4013      	ands	r3, r2
 8000c30:	d003      	beq.n	8000c3a <HAL_GPIO_Init+0x27a>
        {
          temp |= iocurrent;
 8000c32:	693a      	ldr	r2, [r7, #16]
 8000c34:	68fb      	ldr	r3, [r7, #12]
 8000c36:	4313      	orrs	r3, r2
 8000c38:	613b      	str	r3, [r7, #16]
        }
        EXTI->RTSR = temp;
 8000c3a:	4b18      	ldr	r3, [pc, #96]	; (8000c9c <HAL_GPIO_Init+0x2dc>)
 8000c3c:	693a      	ldr	r2, [r7, #16]
 8000c3e:	609a      	str	r2, [r3, #8]

        temp = EXTI->FTSR;
 8000c40:	4b16      	ldr	r3, [pc, #88]	; (8000c9c <HAL_GPIO_Init+0x2dc>)
 8000c42:	68db      	ldr	r3, [r3, #12]
 8000c44:	613b      	str	r3, [r7, #16]
        temp &= ~(iocurrent);
 8000c46:	68fb      	ldr	r3, [r7, #12]
 8000c48:	43da      	mvns	r2, r3
 8000c4a:	693b      	ldr	r3, [r7, #16]
 8000c4c:	4013      	ands	r3, r2
 8000c4e:	613b      	str	r3, [r7, #16]
        if((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
 8000c50:	683b      	ldr	r3, [r7, #0]
 8000c52:	685a      	ldr	r2, [r3, #4]
 8000c54:	2380      	movs	r3, #128	; 0x80
 8000c56:	039b      	lsls	r3, r3, #14
 8000c58:	4013      	ands	r3, r2
 8000c5a:	d003      	beq.n	8000c64 <HAL_GPIO_Init+0x2a4>
        {
          temp |= iocurrent;
 8000c5c:	693a      	ldr	r2, [r7, #16]
 8000c5e:	68fb      	ldr	r3, [r7, #12]
 8000c60:	4313      	orrs	r3, r2
 8000c62:	613b      	str	r3, [r7, #16]
        }
        EXTI->FTSR = temp;
 8000c64:	4b0d      	ldr	r3, [pc, #52]	; (8000c9c <HAL_GPIO_Init+0x2dc>)
 8000c66:	693a      	ldr	r2, [r7, #16]
 8000c68:	60da      	str	r2, [r3, #12]
      }
    }

    position++;
 8000c6a:	697b      	ldr	r3, [r7, #20]
 8000c6c:	3301      	adds	r3, #1
 8000c6e:	617b      	str	r3, [r7, #20]
  while (((GPIO_Init->Pin) >> position) != 0x00u)
 8000c70:	683b      	ldr	r3, [r7, #0]
 8000c72:	681a      	ldr	r2, [r3, #0]
 8000c74:	697b      	ldr	r3, [r7, #20]
 8000c76:	40da      	lsrs	r2, r3
 8000c78:	1e13      	subs	r3, r2, #0
 8000c7a:	d000      	beq.n	8000c7e <HAL_GPIO_Init+0x2be>
 8000c7c:	e6a8      	b.n	80009d0 <HAL_GPIO_Init+0x10>
  } 
}
 8000c7e:	46c0      	nop			; (mov r8, r8)
 8000c80:	46bd      	mov	sp, r7
 8000c82:	b006      	add	sp, #24
 8000c84:	bd80      	pop	{r7, pc}
 8000c86:	46c0      	nop			; (mov r8, r8)
 8000c88:	40021000 	.word	0x40021000
 8000c8c:	40010000 	.word	0x40010000
 8000c90:	48000400 	.word	0x48000400
 8000c94:	48000800 	.word	0x48000800
 8000c98:	48000c00 	.word	0x48000c00
 8000c9c:	40010400 	.word	0x40010400

08000ca0 <HAL_GPIO_ReadPin>:
  * @param  GPIO_Pin specifies the port bit to read.
  *         This parameter can be GPIO_PIN_x where x can be (0..15).
  * @retval The input port pin value.
  */
GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
{
 8000ca0:	b580      	push	{r7, lr}
 8000ca2:	b084      	sub	sp, #16
 8000ca4:	af00      	add	r7, sp, #0
 8000ca6:	6078      	str	r0, [r7, #4]
 8000ca8:	000a      	movs	r2, r1
 8000caa:	1cbb      	adds	r3, r7, #2
 8000cac:	801a      	strh	r2, [r3, #0]
  GPIO_PinState bitstatus;

  /* Check the parameters */
  assert_param(IS_GPIO_PIN(GPIO_Pin));

  if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET)
 8000cae:	687b      	ldr	r3, [r7, #4]
 8000cb0:	691b      	ldr	r3, [r3, #16]
 8000cb2:	1cba      	adds	r2, r7, #2
 8000cb4:	8812      	ldrh	r2, [r2, #0]
 8000cb6:	4013      	ands	r3, r2
 8000cb8:	d004      	beq.n	8000cc4 <HAL_GPIO_ReadPin+0x24>
  {
    bitstatus = GPIO_PIN_SET;
 8000cba:	230f      	movs	r3, #15
 8000cbc:	18fb      	adds	r3, r7, r3
 8000cbe:	2201      	movs	r2, #1
 8000cc0:	701a      	strb	r2, [r3, #0]
 8000cc2:	e003      	b.n	8000ccc <HAL_GPIO_ReadPin+0x2c>
  }
  else
  {
    bitstatus = GPIO_PIN_RESET;
 8000cc4:	230f      	movs	r3, #15
 8000cc6:	18fb      	adds	r3, r7, r3
 8000cc8:	2200      	movs	r2, #0
 8000cca:	701a      	strb	r2, [r3, #0]
  }
  return bitstatus;
 8000ccc:	230f      	movs	r3, #15
 8000cce:	18fb      	adds	r3, r7, r3
 8000cd0:	781b      	ldrb	r3, [r3, #0]
  }
 8000cd2:	0018      	movs	r0, r3
 8000cd4:	46bd      	mov	sp, r7
 8000cd6:	b004      	add	sp, #16
 8000cd8:	bd80      	pop	{r7, pc}

08000cda <HAL_GPIO_WritePin>:
  *            @arg GPIO_PIN_RESET: to clear the port pin
  *            @arg GPIO_PIN_SET: to set the port pin
  * @retval None
  */
void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
{
 8000cda:	b580      	push	{r7, lr}
 8000cdc:	b082      	sub	sp, #8
 8000cde:	af00      	add	r7, sp, #0
 8000ce0:	6078      	str	r0, [r7, #4]
 8000ce2:	0008      	movs	r0, r1
 8000ce4:	0011      	movs	r1, r2
 8000ce6:	1cbb      	adds	r3, r7, #2
 8000ce8:	1c02      	adds	r2, r0, #0
 8000cea:	801a      	strh	r2, [r3, #0]
 8000cec:	1c7b      	adds	r3, r7, #1
 8000cee:	1c0a      	adds	r2, r1, #0
 8000cf0:	701a      	strb	r2, [r3, #0]
  /* Check the parameters */
  assert_param(IS_GPIO_PIN(GPIO_Pin));
  assert_param(IS_GPIO_PIN_ACTION(PinState));

  if (PinState != GPIO_PIN_RESET)
 8000cf2:	1c7b      	adds	r3, r7, #1
 8000cf4:	781b      	ldrb	r3, [r3, #0]
 8000cf6:	2b00      	cmp	r3, #0
 8000cf8:	d004      	beq.n	8000d04 <HAL_GPIO_WritePin+0x2a>
  {
    GPIOx->BSRR = (uint32_t)GPIO_Pin;
 8000cfa:	1cbb      	adds	r3, r7, #2
 8000cfc:	881a      	ldrh	r2, [r3, #0]
 8000cfe:	687b      	ldr	r3, [r7, #4]
 8000d00:	619a      	str	r2, [r3, #24]
  }
  else
  {
    GPIOx->BRR = (uint32_t)GPIO_Pin;
  }
}
 8000d02:	e003      	b.n	8000d0c <HAL_GPIO_WritePin+0x32>
    GPIOx->BRR = (uint32_t)GPIO_Pin;
 8000d04:	1cbb      	adds	r3, r7, #2
 8000d06:	881a      	ldrh	r2, [r3, #0]
 8000d08:	687b      	ldr	r3, [r7, #4]
 8000d0a:	629a      	str	r2, [r3, #40]	; 0x28
}
 8000d0c:	46c0      	nop			; (mov r8, r8)
 8000d0e:	46bd      	mov	sp, r7
 8000d10:	b002      	add	sp, #8
 8000d12:	bd80      	pop	{r7, pc}

08000d14 <HAL_RCC_OscConfig>:
  *         supported by this macro. User should request a transition to HSE Off
  *         first and then HSE On or HSE Bypass.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
{
 8000d14:	b580      	push	{r7, lr}
 8000d16:	b088      	sub	sp, #32
 8000d18:	af00      	add	r7, sp, #0
 8000d1a:	6078      	str	r0, [r7, #4]
  uint32_t tickstart;
  uint32_t pll_config;
  uint32_t pll_config2;

  /* Check Null pointer */
  if(RCC_OscInitStruct == NULL)
 8000d1c:	687b      	ldr	r3, [r7, #4]
 8000d1e:	2b00      	cmp	r3, #0
 8000d20:	d101      	bne.n	8000d26 <HAL_RCC_OscConfig+0x12>
  {
    return HAL_ERROR;
 8000d22:	2301      	movs	r3, #1
 8000d24:	e303      	b.n	800132e <HAL_RCC_OscConfig+0x61a>

  /* Check the parameters */
  assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));

  /*------------------------------- HSE Configuration ------------------------*/ 
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
 8000d26:	687b      	ldr	r3, [r7, #4]
 8000d28:	681b      	ldr	r3, [r3, #0]
 8000d2a:	2201      	movs	r2, #1
 8000d2c:	4013      	ands	r3, r2
 8000d2e:	d100      	bne.n	8000d32 <HAL_RCC_OscConfig+0x1e>
 8000d30:	e08d      	b.n	8000e4e <HAL_RCC_OscConfig+0x13a>
  {
    /* Check the parameters */
    assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));

    /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */
    if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) 
 8000d32:	4bc4      	ldr	r3, [pc, #784]	; (8001044 <HAL_RCC_OscConfig+0x330>)
 8000d34:	685b      	ldr	r3, [r3, #4]
 8000d36:	220c      	movs	r2, #12
 8000d38:	4013      	ands	r3, r2
 8000d3a:	2b04      	cmp	r3, #4
 8000d3c:	d00e      	beq.n	8000d5c <HAL_RCC_OscConfig+0x48>
       || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE)))
 8000d3e:	4bc1      	ldr	r3, [pc, #772]	; (8001044 <HAL_RCC_OscConfig+0x330>)
 8000d40:	685b      	ldr	r3, [r3, #4]
 8000d42:	220c      	movs	r2, #12
 8000d44:	4013      	ands	r3, r2
 8000d46:	2b08      	cmp	r3, #8
 8000d48:	d116      	bne.n	8000d78 <HAL_RCC_OscConfig+0x64>
 8000d4a:	4bbe      	ldr	r3, [pc, #760]	; (8001044 <HAL_RCC_OscConfig+0x330>)
 8000d4c:	685a      	ldr	r2, [r3, #4]
 8000d4e:	2380      	movs	r3, #128	; 0x80
 8000d50:	025b      	lsls	r3, r3, #9
 8000d52:	401a      	ands	r2, r3
 8000d54:	2380      	movs	r3, #128	; 0x80
 8000d56:	025b      	lsls	r3, r3, #9
 8000d58:	429a      	cmp	r2, r3
 8000d5a:	d10d      	bne.n	8000d78 <HAL_RCC_OscConfig+0x64>
    {
      if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
 8000d5c:	4bb9      	ldr	r3, [pc, #740]	; (8001044 <HAL_RCC_OscConfig+0x330>)
 8000d5e:	681a      	ldr	r2, [r3, #0]
 8000d60:	2380      	movs	r3, #128	; 0x80
 8000d62:	029b      	lsls	r3, r3, #10
 8000d64:	4013      	ands	r3, r2
 8000d66:	d100      	bne.n	8000d6a <HAL_RCC_OscConfig+0x56>
 8000d68:	e070      	b.n	8000e4c <HAL_RCC_OscConfig+0x138>
 8000d6a:	687b      	ldr	r3, [r7, #4]
 8000d6c:	685b      	ldr	r3, [r3, #4]
 8000d6e:	2b00      	cmp	r3, #0
 8000d70:	d000      	beq.n	8000d74 <HAL_RCC_OscConfig+0x60>
 8000d72:	e06b      	b.n	8000e4c <HAL_RCC_OscConfig+0x138>
      {
        return HAL_ERROR;
 8000d74:	2301      	movs	r3, #1
 8000d76:	e2da      	b.n	800132e <HAL_RCC_OscConfig+0x61a>
      }
    }
    else
    {
      /* Set the new HSE configuration ---------------------------------------*/
      __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
 8000d78:	687b      	ldr	r3, [r7, #4]
 8000d7a:	685b      	ldr	r3, [r3, #4]
 8000d7c:	2b01      	cmp	r3, #1
 8000d7e:	d107      	bne.n	8000d90 <HAL_RCC_OscConfig+0x7c>
 8000d80:	4bb0      	ldr	r3, [pc, #704]	; (8001044 <HAL_RCC_OscConfig+0x330>)
 8000d82:	681a      	ldr	r2, [r3, #0]
 8000d84:	4baf      	ldr	r3, [pc, #700]	; (8001044 <HAL_RCC_OscConfig+0x330>)
 8000d86:	2180      	movs	r1, #128	; 0x80
 8000d88:	0249      	lsls	r1, r1, #9
 8000d8a:	430a      	orrs	r2, r1
 8000d8c:	601a      	str	r2, [r3, #0]
 8000d8e:	e02f      	b.n	8000df0 <HAL_RCC_OscConfig+0xdc>
 8000d90:	687b      	ldr	r3, [r7, #4]
 8000d92:	685b      	ldr	r3, [r3, #4]
 8000d94:	2b00      	cmp	r3, #0
 8000d96:	d10c      	bne.n	8000db2 <HAL_RCC_OscConfig+0x9e>
 8000d98:	4baa      	ldr	r3, [pc, #680]	; (8001044 <HAL_RCC_OscConfig+0x330>)
 8000d9a:	681a      	ldr	r2, [r3, #0]
 8000d9c:	4ba9      	ldr	r3, [pc, #676]	; (8001044 <HAL_RCC_OscConfig+0x330>)
 8000d9e:	49aa      	ldr	r1, [pc, #680]	; (8001048 <HAL_RCC_OscConfig+0x334>)
 8000da0:	400a      	ands	r2, r1
 8000da2:	601a      	str	r2, [r3, #0]
 8000da4:	4ba7      	ldr	r3, [pc, #668]	; (8001044 <HAL_RCC_OscConfig+0x330>)
 8000da6:	681a      	ldr	r2, [r3, #0]
 8000da8:	4ba6      	ldr	r3, [pc, #664]	; (8001044 <HAL_RCC_OscConfig+0x330>)
 8000daa:	49a8      	ldr	r1, [pc, #672]	; (800104c <HAL_RCC_OscConfig+0x338>)
 8000dac:	400a      	ands	r2, r1
 8000dae:	601a      	str	r2, [r3, #0]
 8000db0:	e01e      	b.n	8000df0 <HAL_RCC_OscConfig+0xdc>
 8000db2:	687b      	ldr	r3, [r7, #4]
 8000db4:	685b      	ldr	r3, [r3, #4]
 8000db6:	2b05      	cmp	r3, #5
 8000db8:	d10e      	bne.n	8000dd8 <HAL_RCC_OscConfig+0xc4>
 8000dba:	4ba2      	ldr	r3, [pc, #648]	; (8001044 <HAL_RCC_OscConfig+0x330>)
 8000dbc:	681a      	ldr	r2, [r3, #0]
 8000dbe:	4ba1      	ldr	r3, [pc, #644]	; (8001044 <HAL_RCC_OscConfig+0x330>)
 8000dc0:	2180      	movs	r1, #128	; 0x80
 8000dc2:	02c9      	lsls	r1, r1, #11
 8000dc4:	430a      	orrs	r2, r1
 8000dc6:	601a      	str	r2, [r3, #0]
 8000dc8:	4b9e      	ldr	r3, [pc, #632]	; (8001044 <HAL_RCC_OscConfig+0x330>)
 8000dca:	681a      	ldr	r2, [r3, #0]
 8000dcc:	4b9d      	ldr	r3, [pc, #628]	; (8001044 <HAL_RCC_OscConfig+0x330>)
 8000dce:	2180      	movs	r1, #128	; 0x80
 8000dd0:	0249      	lsls	r1, r1, #9
 8000dd2:	430a      	orrs	r2, r1
 8000dd4:	601a      	str	r2, [r3, #0]
 8000dd6:	e00b      	b.n	8000df0 <HAL_RCC_OscConfig+0xdc>
 8000dd8:	4b9a      	ldr	r3, [pc, #616]	; (8001044 <HAL_RCC_OscConfig+0x330>)
 8000dda:	681a      	ldr	r2, [r3, #0]
 8000ddc:	4b99      	ldr	r3, [pc, #612]	; (8001044 <HAL_RCC_OscConfig+0x330>)
 8000dde:	499a      	ldr	r1, [pc, #616]	; (8001048 <HAL_RCC_OscConfig+0x334>)
 8000de0:	400a      	ands	r2, r1
 8000de2:	601a      	str	r2, [r3, #0]
 8000de4:	4b97      	ldr	r3, [pc, #604]	; (8001044 <HAL_RCC_OscConfig+0x330>)
 8000de6:	681a      	ldr	r2, [r3, #0]
 8000de8:	4b96      	ldr	r3, [pc, #600]	; (8001044 <HAL_RCC_OscConfig+0x330>)
 8000dea:	4998      	ldr	r1, [pc, #608]	; (800104c <HAL_RCC_OscConfig+0x338>)
 8000dec:	400a      	ands	r2, r1
 8000dee:	601a      	str	r2, [r3, #0]
      

       /* Check the HSE State */
      if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
 8000df0:	687b      	ldr	r3, [r7, #4]
 8000df2:	685b      	ldr	r3, [r3, #4]
 8000df4:	2b00      	cmp	r3, #0
 8000df6:	d014      	beq.n	8000e22 <HAL_RCC_OscConfig+0x10e>
      {
        /* Get Start Tick */
        tickstart = HAL_GetTick();
 8000df8:	f7ff fd2a 	bl	8000850 <HAL_GetTick>
 8000dfc:	0003      	movs	r3, r0
 8000dfe:	61bb      	str	r3, [r7, #24]
        
        /* Wait till HSE is ready */
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
 8000e00:	e008      	b.n	8000e14 <HAL_RCC_OscConfig+0x100>
        {
          if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
 8000e02:	f7ff fd25 	bl	8000850 <HAL_GetTick>
 8000e06:	0002      	movs	r2, r0
 8000e08:	69bb      	ldr	r3, [r7, #24]
 8000e0a:	1ad3      	subs	r3, r2, r3
 8000e0c:	2b64      	cmp	r3, #100	; 0x64
 8000e0e:	d901      	bls.n	8000e14 <HAL_RCC_OscConfig+0x100>
          {
            return HAL_TIMEOUT;
 8000e10:	2303      	movs	r3, #3
 8000e12:	e28c      	b.n	800132e <HAL_RCC_OscConfig+0x61a>
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
 8000e14:	4b8b      	ldr	r3, [pc, #556]	; (8001044 <HAL_RCC_OscConfig+0x330>)
 8000e16:	681a      	ldr	r2, [r3, #0]
 8000e18:	2380      	movs	r3, #128	; 0x80
 8000e1a:	029b      	lsls	r3, r3, #10
 8000e1c:	4013      	ands	r3, r2
 8000e1e:	d0f0      	beq.n	8000e02 <HAL_RCC_OscConfig+0xee>
 8000e20:	e015      	b.n	8000e4e <HAL_RCC_OscConfig+0x13a>
        }
      }
      else
      {
        /* Get Start Tick */
        tickstart = HAL_GetTick();
 8000e22:	f7ff fd15 	bl	8000850 <HAL_GetTick>
 8000e26:	0003      	movs	r3, r0
 8000e28:	61bb      	str	r3, [r7, #24]
        
        /* Wait till HSE is disabled */
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
 8000e2a:	e008      	b.n	8000e3e <HAL_RCC_OscConfig+0x12a>
        {
           if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
 8000e2c:	f7ff fd10 	bl	8000850 <HAL_GetTick>
 8000e30:	0002      	movs	r2, r0
 8000e32:	69bb      	ldr	r3, [r7, #24]
 8000e34:	1ad3      	subs	r3, r2, r3
 8000e36:	2b64      	cmp	r3, #100	; 0x64
 8000e38:	d901      	bls.n	8000e3e <HAL_RCC_OscConfig+0x12a>
          {
            return HAL_TIMEOUT;
 8000e3a:	2303      	movs	r3, #3
 8000e3c:	e277      	b.n	800132e <HAL_RCC_OscConfig+0x61a>
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
 8000e3e:	4b81      	ldr	r3, [pc, #516]	; (8001044 <HAL_RCC_OscConfig+0x330>)
 8000e40:	681a      	ldr	r2, [r3, #0]
 8000e42:	2380      	movs	r3, #128	; 0x80
 8000e44:	029b      	lsls	r3, r3, #10
 8000e46:	4013      	ands	r3, r2
 8000e48:	d1f0      	bne.n	8000e2c <HAL_RCC_OscConfig+0x118>
 8000e4a:	e000      	b.n	8000e4e <HAL_RCC_OscConfig+0x13a>
      if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
 8000e4c:	46c0      	nop			; (mov r8, r8)
        }
      }
    }
  }
  /*----------------------------- HSI Configuration --------------------------*/ 
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
 8000e4e:	687b      	ldr	r3, [r7, #4]
 8000e50:	681b      	ldr	r3, [r3, #0]
 8000e52:	2202      	movs	r2, #2
 8000e54:	4013      	ands	r3, r2
 8000e56:	d100      	bne.n	8000e5a <HAL_RCC_OscConfig+0x146>
 8000e58:	e069      	b.n	8000f2e <HAL_RCC_OscConfig+0x21a>
    /* Check the parameters */
    assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
    assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
    
    /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */ 
    if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) 
 8000e5a:	4b7a      	ldr	r3, [pc, #488]	; (8001044 <HAL_RCC_OscConfig+0x330>)
 8000e5c:	685b      	ldr	r3, [r3, #4]
 8000e5e:	220c      	movs	r2, #12
 8000e60:	4013      	ands	r3, r2
 8000e62:	d00b      	beq.n	8000e7c <HAL_RCC_OscConfig+0x168>
       || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI)))
 8000e64:	4b77      	ldr	r3, [pc, #476]	; (8001044 <HAL_RCC_OscConfig+0x330>)
 8000e66:	685b      	ldr	r3, [r3, #4]
 8000e68:	220c      	movs	r2, #12
 8000e6a:	4013      	ands	r3, r2
 8000e6c:	2b08      	cmp	r3, #8
 8000e6e:	d11c      	bne.n	8000eaa <HAL_RCC_OscConfig+0x196>
 8000e70:	4b74      	ldr	r3, [pc, #464]	; (8001044 <HAL_RCC_OscConfig+0x330>)
 8000e72:	685a      	ldr	r2, [r3, #4]
 8000e74:	2380      	movs	r3, #128	; 0x80
 8000e76:	025b      	lsls	r3, r3, #9
 8000e78:	4013      	ands	r3, r2
 8000e7a:	d116      	bne.n	8000eaa <HAL_RCC_OscConfig+0x196>
    {
      /* When HSI is used as system clock it will not disabled */
      if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
 8000e7c:	4b71      	ldr	r3, [pc, #452]	; (8001044 <HAL_RCC_OscConfig+0x330>)
 8000e7e:	681b      	ldr	r3, [r3, #0]
 8000e80:	2202      	movs	r2, #2
 8000e82:	4013      	ands	r3, r2
 8000e84:	d005      	beq.n	8000e92 <HAL_RCC_OscConfig+0x17e>
 8000e86:	687b      	ldr	r3, [r7, #4]
 8000e88:	68db      	ldr	r3, [r3, #12]
 8000e8a:	2b01      	cmp	r3, #1
 8000e8c:	d001      	beq.n	8000e92 <HAL_RCC_OscConfig+0x17e>
      {
        return HAL_ERROR;
 8000e8e:	2301      	movs	r3, #1
 8000e90:	e24d      	b.n	800132e <HAL_RCC_OscConfig+0x61a>
      }
      /* Otherwise, just the calibration is allowed */
      else
      {
        /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
        __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
 8000e92:	4b6c      	ldr	r3, [pc, #432]	; (8001044 <HAL_RCC_OscConfig+0x330>)
 8000e94:	681b      	ldr	r3, [r3, #0]
 8000e96:	22f8      	movs	r2, #248	; 0xf8
 8000e98:	4393      	bics	r3, r2
 8000e9a:	0019      	movs	r1, r3
 8000e9c:	687b      	ldr	r3, [r7, #4]
 8000e9e:	691b      	ldr	r3, [r3, #16]
 8000ea0:	00da      	lsls	r2, r3, #3
 8000ea2:	4b68      	ldr	r3, [pc, #416]	; (8001044 <HAL_RCC_OscConfig+0x330>)
 8000ea4:	430a      	orrs	r2, r1
 8000ea6:	601a      	str	r2, [r3, #0]
      if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
 8000ea8:	e041      	b.n	8000f2e <HAL_RCC_OscConfig+0x21a>
      }
    }
    else
    {
      /* Check the HSI State */
      if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
 8000eaa:	687b      	ldr	r3, [r7, #4]
 8000eac:	68db      	ldr	r3, [r3, #12]
 8000eae:	2b00      	cmp	r3, #0
 8000eb0:	d024      	beq.n	8000efc <HAL_RCC_OscConfig+0x1e8>
      {
       /* Enable the Internal High Speed oscillator (HSI). */
        __HAL_RCC_HSI_ENABLE();
 8000eb2:	4b64      	ldr	r3, [pc, #400]	; (8001044 <HAL_RCC_OscConfig+0x330>)
 8000eb4:	681a      	ldr	r2, [r3, #0]
 8000eb6:	4b63      	ldr	r3, [pc, #396]	; (8001044 <HAL_RCC_OscConfig+0x330>)
 8000eb8:	2101      	movs	r1, #1
 8000eba:	430a      	orrs	r2, r1
 8000ebc:	601a      	str	r2, [r3, #0]
        
        /* Get Start Tick */
        tickstart = HAL_GetTick();
 8000ebe:	f7ff fcc7 	bl	8000850 <HAL_GetTick>
 8000ec2:	0003      	movs	r3, r0
 8000ec4:	61bb      	str	r3, [r7, #24]
        
        /* Wait till HSI is ready */
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
 8000ec6:	e008      	b.n	8000eda <HAL_RCC_OscConfig+0x1c6>
        {
          if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
 8000ec8:	f7ff fcc2 	bl	8000850 <HAL_GetTick>
 8000ecc:	0002      	movs	r2, r0
 8000ece:	69bb      	ldr	r3, [r7, #24]
 8000ed0:	1ad3      	subs	r3, r2, r3
 8000ed2:	2b02      	cmp	r3, #2
 8000ed4:	d901      	bls.n	8000eda <HAL_RCC_OscConfig+0x1c6>
          {
            return HAL_TIMEOUT;
 8000ed6:	2303      	movs	r3, #3
 8000ed8:	e229      	b.n	800132e <HAL_RCC_OscConfig+0x61a>
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
 8000eda:	4b5a      	ldr	r3, [pc, #360]	; (8001044 <HAL_RCC_OscConfig+0x330>)
 8000edc:	681b      	ldr	r3, [r3, #0]
 8000ede:	2202      	movs	r2, #2
 8000ee0:	4013      	ands	r3, r2
 8000ee2:	d0f1      	beq.n	8000ec8 <HAL_RCC_OscConfig+0x1b4>
          }
        }
                
        /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
        __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
 8000ee4:	4b57      	ldr	r3, [pc, #348]	; (8001044 <HAL_RCC_OscConfig+0x330>)
 8000ee6:	681b      	ldr	r3, [r3, #0]
 8000ee8:	22f8      	movs	r2, #248	; 0xf8
 8000eea:	4393      	bics	r3, r2
 8000eec:	0019      	movs	r1, r3
 8000eee:	687b      	ldr	r3, [r7, #4]
 8000ef0:	691b      	ldr	r3, [r3, #16]
 8000ef2:	00da      	lsls	r2, r3, #3
 8000ef4:	4b53      	ldr	r3, [pc, #332]	; (8001044 <HAL_RCC_OscConfig+0x330>)
 8000ef6:	430a      	orrs	r2, r1
 8000ef8:	601a      	str	r2, [r3, #0]
 8000efa:	e018      	b.n	8000f2e <HAL_RCC_OscConfig+0x21a>
      }
      else
      {
        /* Disable the Internal High Speed oscillator (HSI). */
        __HAL_RCC_HSI_DISABLE();
 8000efc:	4b51      	ldr	r3, [pc, #324]	; (8001044 <HAL_RCC_OscConfig+0x330>)
 8000efe:	681a      	ldr	r2, [r3, #0]
 8000f00:	4b50      	ldr	r3, [pc, #320]	; (8001044 <HAL_RCC_OscConfig+0x330>)
 8000f02:	2101      	movs	r1, #1
 8000f04:	438a      	bics	r2, r1
 8000f06:	601a      	str	r2, [r3, #0]
        
        /* Get Start Tick */
        tickstart = HAL_GetTick();
 8000f08:	f7ff fca2 	bl	8000850 <HAL_GetTick>
 8000f0c:	0003      	movs	r3, r0
 8000f0e:	61bb      	str	r3, [r7, #24]
        
        /* Wait till HSI is disabled */
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
 8000f10:	e008      	b.n	8000f24 <HAL_RCC_OscConfig+0x210>
        {
          if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
 8000f12:	f7ff fc9d 	bl	8000850 <HAL_GetTick>
 8000f16:	0002      	movs	r2, r0
 8000f18:	69bb      	ldr	r3, [r7, #24]
 8000f1a:	1ad3      	subs	r3, r2, r3
 8000f1c:	2b02      	cmp	r3, #2
 8000f1e:	d901      	bls.n	8000f24 <HAL_RCC_OscConfig+0x210>
          {
            return HAL_TIMEOUT;
 8000f20:	2303      	movs	r3, #3
 8000f22:	e204      	b.n	800132e <HAL_RCC_OscConfig+0x61a>
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
 8000f24:	4b47      	ldr	r3, [pc, #284]	; (8001044 <HAL_RCC_OscConfig+0x330>)
 8000f26:	681b      	ldr	r3, [r3, #0]
 8000f28:	2202      	movs	r2, #2
 8000f2a:	4013      	ands	r3, r2
 8000f2c:	d1f1      	bne.n	8000f12 <HAL_RCC_OscConfig+0x1fe>
        }
      }
    }
  }
  /*------------------------------ LSI Configuration -------------------------*/ 
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
 8000f2e:	687b      	ldr	r3, [r7, #4]
 8000f30:	681b      	ldr	r3, [r3, #0]
 8000f32:	2208      	movs	r2, #8
 8000f34:	4013      	ands	r3, r2
 8000f36:	d036      	beq.n	8000fa6 <HAL_RCC_OscConfig+0x292>
  {
    /* Check the parameters */
    assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
    
    /* Check the LSI State */
    if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
 8000f38:	687b      	ldr	r3, [r7, #4]
 8000f3a:	69db      	ldr	r3, [r3, #28]
 8000f3c:	2b00      	cmp	r3, #0
 8000f3e:	d019      	beq.n	8000f74 <HAL_RCC_OscConfig+0x260>
    {
      /* Enable the Internal Low Speed oscillator (LSI). */
      __HAL_RCC_LSI_ENABLE();
 8000f40:	4b40      	ldr	r3, [pc, #256]	; (8001044 <HAL_RCC_OscConfig+0x330>)
 8000f42:	6a5a      	ldr	r2, [r3, #36]	; 0x24
 8000f44:	4b3f      	ldr	r3, [pc, #252]	; (8001044 <HAL_RCC_OscConfig+0x330>)
 8000f46:	2101      	movs	r1, #1
 8000f48:	430a      	orrs	r2, r1
 8000f4a:	625a      	str	r2, [r3, #36]	; 0x24
      
      /* Get Start Tick */
      tickstart = HAL_GetTick();
 8000f4c:	f7ff fc80 	bl	8000850 <HAL_GetTick>
 8000f50:	0003      	movs	r3, r0
 8000f52:	61bb      	str	r3, [r7, #24]
      
      /* Wait till LSI is ready */  
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
 8000f54:	e008      	b.n	8000f68 <HAL_RCC_OscConfig+0x254>
      {
        if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
 8000f56:	f7ff fc7b 	bl	8000850 <HAL_GetTick>
 8000f5a:	0002      	movs	r2, r0
 8000f5c:	69bb      	ldr	r3, [r7, #24]
 8000f5e:	1ad3      	subs	r3, r2, r3
 8000f60:	2b02      	cmp	r3, #2
 8000f62:	d901      	bls.n	8000f68 <HAL_RCC_OscConfig+0x254>
        {
          return HAL_TIMEOUT;
 8000f64:	2303      	movs	r3, #3
 8000f66:	e1e2      	b.n	800132e <HAL_RCC_OscConfig+0x61a>
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
 8000f68:	4b36      	ldr	r3, [pc, #216]	; (8001044 <HAL_RCC_OscConfig+0x330>)
 8000f6a:	6a5b      	ldr	r3, [r3, #36]	; 0x24
 8000f6c:	2202      	movs	r2, #2
 8000f6e:	4013      	ands	r3, r2
 8000f70:	d0f1      	beq.n	8000f56 <HAL_RCC_OscConfig+0x242>
 8000f72:	e018      	b.n	8000fa6 <HAL_RCC_OscConfig+0x292>
      }
    }
    else
    {
      /* Disable the Internal Low Speed oscillator (LSI). */
      __HAL_RCC_LSI_DISABLE();
 8000f74:	4b33      	ldr	r3, [pc, #204]	; (8001044 <HAL_RCC_OscConfig+0x330>)
 8000f76:	6a5a      	ldr	r2, [r3, #36]	; 0x24
 8000f78:	4b32      	ldr	r3, [pc, #200]	; (8001044 <HAL_RCC_OscConfig+0x330>)
 8000f7a:	2101      	movs	r1, #1
 8000f7c:	438a      	bics	r2, r1
 8000f7e:	625a      	str	r2, [r3, #36]	; 0x24
      
      /* Get Start Tick */
      tickstart = HAL_GetTick();
 8000f80:	f7ff fc66 	bl	8000850 <HAL_GetTick>
 8000f84:	0003      	movs	r3, r0
 8000f86:	61bb      	str	r3, [r7, #24]
      
      /* Wait till LSI is disabled */  
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
 8000f88:	e008      	b.n	8000f9c <HAL_RCC_OscConfig+0x288>
      {
        if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
 8000f8a:	f7ff fc61 	bl	8000850 <HAL_GetTick>
 8000f8e:	0002      	movs	r2, r0
 8000f90:	69bb      	ldr	r3, [r7, #24]
 8000f92:	1ad3      	subs	r3, r2, r3
 8000f94:	2b02      	cmp	r3, #2
 8000f96:	d901      	bls.n	8000f9c <HAL_RCC_OscConfig+0x288>
        {
          return HAL_TIMEOUT;
 8000f98:	2303      	movs	r3, #3
 8000f9a:	e1c8      	b.n	800132e <HAL_RCC_OscConfig+0x61a>
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
 8000f9c:	4b29      	ldr	r3, [pc, #164]	; (8001044 <HAL_RCC_OscConfig+0x330>)
 8000f9e:	6a5b      	ldr	r3, [r3, #36]	; 0x24
 8000fa0:	2202      	movs	r2, #2
 8000fa2:	4013      	ands	r3, r2
 8000fa4:	d1f1      	bne.n	8000f8a <HAL_RCC_OscConfig+0x276>
        }
      }
    }
  }
  /*------------------------------ LSE Configuration -------------------------*/ 
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
 8000fa6:	687b      	ldr	r3, [r7, #4]
 8000fa8:	681b      	ldr	r3, [r3, #0]
 8000faa:	2204      	movs	r2, #4
 8000fac:	4013      	ands	r3, r2
 8000fae:	d100      	bne.n	8000fb2 <HAL_RCC_OscConfig+0x29e>
 8000fb0:	e0b6      	b.n	8001120 <HAL_RCC_OscConfig+0x40c>
  {
    FlagStatus       pwrclkchanged = RESET;
 8000fb2:	231f      	movs	r3, #31
 8000fb4:	18fb      	adds	r3, r7, r3
 8000fb6:	2200      	movs	r2, #0
 8000fb8:	701a      	strb	r2, [r3, #0]
    /* Check the parameters */
    assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));

    /* Update LSE configuration in Backup Domain control register    */
    /* Requires to enable write access to Backup Domain of necessary */
    if(__HAL_RCC_PWR_IS_CLK_DISABLED())
 8000fba:	4b22      	ldr	r3, [pc, #136]	; (8001044 <HAL_RCC_OscConfig+0x330>)
 8000fbc:	69da      	ldr	r2, [r3, #28]
 8000fbe:	2380      	movs	r3, #128	; 0x80
 8000fc0:	055b      	lsls	r3, r3, #21
 8000fc2:	4013      	ands	r3, r2
 8000fc4:	d111      	bne.n	8000fea <HAL_RCC_OscConfig+0x2d6>
    {
      __HAL_RCC_PWR_CLK_ENABLE();
 8000fc6:	4b1f      	ldr	r3, [pc, #124]	; (8001044 <HAL_RCC_OscConfig+0x330>)
 8000fc8:	69da      	ldr	r2, [r3, #28]
 8000fca:	4b1e      	ldr	r3, [pc, #120]	; (8001044 <HAL_RCC_OscConfig+0x330>)
 8000fcc:	2180      	movs	r1, #128	; 0x80
 8000fce:	0549      	lsls	r1, r1, #21
 8000fd0:	430a      	orrs	r2, r1
 8000fd2:	61da      	str	r2, [r3, #28]
 8000fd4:	4b1b      	ldr	r3, [pc, #108]	; (8001044 <HAL_RCC_OscConfig+0x330>)
 8000fd6:	69da      	ldr	r2, [r3, #28]
 8000fd8:	2380      	movs	r3, #128	; 0x80
 8000fda:	055b      	lsls	r3, r3, #21
 8000fdc:	4013      	ands	r3, r2
 8000fde:	60fb      	str	r3, [r7, #12]
 8000fe0:	68fb      	ldr	r3, [r7, #12]
      pwrclkchanged = SET;
 8000fe2:	231f      	movs	r3, #31
 8000fe4:	18fb      	adds	r3, r7, r3
 8000fe6:	2201      	movs	r2, #1
 8000fe8:	701a      	strb	r2, [r3, #0]
    }
    
    if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
 8000fea:	4b19      	ldr	r3, [pc, #100]	; (8001050 <HAL_RCC_OscConfig+0x33c>)
 8000fec:	681a      	ldr	r2, [r3, #0]
 8000fee:	2380      	movs	r3, #128	; 0x80
 8000ff0:	005b      	lsls	r3, r3, #1
 8000ff2:	4013      	ands	r3, r2
 8000ff4:	d11a      	bne.n	800102c <HAL_RCC_OscConfig+0x318>
    {
      /* Enable write access to Backup domain */
      SET_BIT(PWR->CR, PWR_CR_DBP);
 8000ff6:	4b16      	ldr	r3, [pc, #88]	; (8001050 <HAL_RCC_OscConfig+0x33c>)
 8000ff8:	681a      	ldr	r2, [r3, #0]
 8000ffa:	4b15      	ldr	r3, [pc, #84]	; (8001050 <HAL_RCC_OscConfig+0x33c>)
 8000ffc:	2180      	movs	r1, #128	; 0x80
 8000ffe:	0049      	lsls	r1, r1, #1
 8001000:	430a      	orrs	r2, r1
 8001002:	601a      	str	r2, [r3, #0]
      
      /* Wait for Backup domain Write protection disable */
      tickstart = HAL_GetTick();
 8001004:	f7ff fc24 	bl	8000850 <HAL_GetTick>
 8001008:	0003      	movs	r3, r0
 800100a:	61bb      	str	r3, [r7, #24]

      while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
 800100c:	e008      	b.n	8001020 <HAL_RCC_OscConfig+0x30c>
      {
        if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
 800100e:	f7ff fc1f 	bl	8000850 <HAL_GetTick>
 8001012:	0002      	movs	r2, r0
 8001014:	69bb      	ldr	r3, [r7, #24]
 8001016:	1ad3      	subs	r3, r2, r3
 8001018:	2b64      	cmp	r3, #100	; 0x64
 800101a:	d901      	bls.n	8001020 <HAL_RCC_OscConfig+0x30c>
        {
          return HAL_TIMEOUT;
 800101c:	2303      	movs	r3, #3
 800101e:	e186      	b.n	800132e <HAL_RCC_OscConfig+0x61a>
      while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
 8001020:	4b0b      	ldr	r3, [pc, #44]	; (8001050 <HAL_RCC_OscConfig+0x33c>)
 8001022:	681a      	ldr	r2, [r3, #0]
 8001024:	2380      	movs	r3, #128	; 0x80
 8001026:	005b      	lsls	r3, r3, #1
 8001028:	4013      	ands	r3, r2
 800102a:	d0f0      	beq.n	800100e <HAL_RCC_OscConfig+0x2fa>
        }
      }
    }

    /* Set the new LSE configuration -----------------------------------------*/
    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
 800102c:	687b      	ldr	r3, [r7, #4]
 800102e:	689b      	ldr	r3, [r3, #8]
 8001030:	2b01      	cmp	r3, #1
 8001032:	d10f      	bne.n	8001054 <HAL_RCC_OscConfig+0x340>
 8001034:	4b03      	ldr	r3, [pc, #12]	; (8001044 <HAL_RCC_OscConfig+0x330>)
 8001036:	6a1a      	ldr	r2, [r3, #32]
 8001038:	4b02      	ldr	r3, [pc, #8]	; (8001044 <HAL_RCC_OscConfig+0x330>)
 800103a:	2101      	movs	r1, #1
 800103c:	430a      	orrs	r2, r1
 800103e:	621a      	str	r2, [r3, #32]
 8001040:	e036      	b.n	80010b0 <HAL_RCC_OscConfig+0x39c>
 8001042:	46c0      	nop			; (mov r8, r8)
 8001044:	40021000 	.word	0x40021000
 8001048:	fffeffff 	.word	0xfffeffff
 800104c:	fffbffff 	.word	0xfffbffff
 8001050:	40007000 	.word	0x40007000
 8001054:	687b      	ldr	r3, [r7, #4]
 8001056:	689b      	ldr	r3, [r3, #8]
 8001058:	2b00      	cmp	r3, #0
 800105a:	d10c      	bne.n	8001076 <HAL_RCC_OscConfig+0x362>
 800105c:	4bb6      	ldr	r3, [pc, #728]	; (8001338 <HAL_RCC_OscConfig+0x624>)
 800105e:	6a1a      	ldr	r2, [r3, #32]
 8001060:	4bb5      	ldr	r3, [pc, #724]	; (8001338 <HAL_RCC_OscConfig+0x624>)
 8001062:	2101      	movs	r1, #1
 8001064:	438a      	bics	r2, r1
 8001066:	621a      	str	r2, [r3, #32]
 8001068:	4bb3      	ldr	r3, [pc, #716]	; (8001338 <HAL_RCC_OscConfig+0x624>)
 800106a:	6a1a      	ldr	r2, [r3, #32]
 800106c:	4bb2      	ldr	r3, [pc, #712]	; (8001338 <HAL_RCC_OscConfig+0x624>)
 800106e:	2104      	movs	r1, #4
 8001070:	438a      	bics	r2, r1
 8001072:	621a      	str	r2, [r3, #32]
 8001074:	e01c      	b.n	80010b0 <HAL_RCC_OscConfig+0x39c>
 8001076:	687b      	ldr	r3, [r7, #4]
 8001078:	689b      	ldr	r3, [r3, #8]
 800107a:	2b05      	cmp	r3, #5
 800107c:	d10c      	bne.n	8001098 <HAL_RCC_OscConfig+0x384>
 800107e:	4bae      	ldr	r3, [pc, #696]	; (8001338 <HAL_RCC_OscConfig+0x624>)
 8001080:	6a1a      	ldr	r2, [r3, #32]
 8001082:	4bad      	ldr	r3, [pc, #692]	; (8001338 <HAL_RCC_OscConfig+0x624>)
 8001084:	2104      	movs	r1, #4
 8001086:	430a      	orrs	r2, r1
 8001088:	621a      	str	r2, [r3, #32]
 800108a:	4bab      	ldr	r3, [pc, #684]	; (8001338 <HAL_RCC_OscConfig+0x624>)
 800108c:	6a1a      	ldr	r2, [r3, #32]
 800108e:	4baa      	ldr	r3, [pc, #680]	; (8001338 <HAL_RCC_OscConfig+0x624>)
 8001090:	2101      	movs	r1, #1
 8001092:	430a      	orrs	r2, r1
 8001094:	621a      	str	r2, [r3, #32]
 8001096:	e00b      	b.n	80010b0 <HAL_RCC_OscConfig+0x39c>
 8001098:	4ba7      	ldr	r3, [pc, #668]	; (8001338 <HAL_RCC_OscConfig+0x624>)
 800109a:	6a1a      	ldr	r2, [r3, #32]
 800109c:	4ba6      	ldr	r3, [pc, #664]	; (8001338 <HAL_RCC_OscConfig+0x624>)
 800109e:	2101      	movs	r1, #1
 80010a0:	438a      	bics	r2, r1
 80010a2:	621a      	str	r2, [r3, #32]
 80010a4:	4ba4      	ldr	r3, [pc, #656]	; (8001338 <HAL_RCC_OscConfig+0x624>)
 80010a6:	6a1a      	ldr	r2, [r3, #32]
 80010a8:	4ba3      	ldr	r3, [pc, #652]	; (8001338 <HAL_RCC_OscConfig+0x624>)
 80010aa:	2104      	movs	r1, #4
 80010ac:	438a      	bics	r2, r1
 80010ae:	621a      	str	r2, [r3, #32]
    /* Check the LSE State */
    if(RCC_OscInitStruct->LSEState != RCC_LSE_OFF)
 80010b0:	687b      	ldr	r3, [r7, #4]
 80010b2:	689b      	ldr	r3, [r3, #8]
 80010b4:	2b00      	cmp	r3, #0
 80010b6:	d014      	beq.n	80010e2 <HAL_RCC_OscConfig+0x3ce>
    {
      /* Get Start Tick */
      tickstart = HAL_GetTick();
 80010b8:	f7ff fbca 	bl	8000850 <HAL_GetTick>
 80010bc:	0003      	movs	r3, r0
 80010be:	61bb      	str	r3, [r7, #24]
      
      /* Wait till LSE is ready */  
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
 80010c0:	e009      	b.n	80010d6 <HAL_RCC_OscConfig+0x3c2>
      {
        if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
 80010c2:	f7ff fbc5 	bl	8000850 <HAL_GetTick>
 80010c6:	0002      	movs	r2, r0
 80010c8:	69bb      	ldr	r3, [r7, #24]
 80010ca:	1ad3      	subs	r3, r2, r3
 80010cc:	4a9b      	ldr	r2, [pc, #620]	; (800133c <HAL_RCC_OscConfig+0x628>)
 80010ce:	4293      	cmp	r3, r2
 80010d0:	d901      	bls.n	80010d6 <HAL_RCC_OscConfig+0x3c2>
        {
          return HAL_TIMEOUT;
 80010d2:	2303      	movs	r3, #3
 80010d4:	e12b      	b.n	800132e <HAL_RCC_OscConfig+0x61a>
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
 80010d6:	4b98      	ldr	r3, [pc, #608]	; (8001338 <HAL_RCC_OscConfig+0x624>)
 80010d8:	6a1b      	ldr	r3, [r3, #32]
 80010da:	2202      	movs	r2, #2
 80010dc:	4013      	ands	r3, r2
 80010de:	d0f0      	beq.n	80010c2 <HAL_RCC_OscConfig+0x3ae>
 80010e0:	e013      	b.n	800110a <HAL_RCC_OscConfig+0x3f6>
      }
    }
    else
    {
      /* Get Start Tick */
      tickstart = HAL_GetTick();
 80010e2:	f7ff fbb5 	bl	8000850 <HAL_GetTick>
 80010e6:	0003      	movs	r3, r0
 80010e8:	61bb      	str	r3, [r7, #24]
      
      /* Wait till LSE is disabled */  
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
 80010ea:	e009      	b.n	8001100 <HAL_RCC_OscConfig+0x3ec>
      {
        if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
 80010ec:	f7ff fbb0 	bl	8000850 <HAL_GetTick>
 80010f0:	0002      	movs	r2, r0
 80010f2:	69bb      	ldr	r3, [r7, #24]
 80010f4:	1ad3      	subs	r3, r2, r3
 80010f6:	4a91      	ldr	r2, [pc, #580]	; (800133c <HAL_RCC_OscConfig+0x628>)
 80010f8:	4293      	cmp	r3, r2
 80010fa:	d901      	bls.n	8001100 <HAL_RCC_OscConfig+0x3ec>
        {
          return HAL_TIMEOUT;
 80010fc:	2303      	movs	r3, #3
 80010fe:	e116      	b.n	800132e <HAL_RCC_OscConfig+0x61a>
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
 8001100:	4b8d      	ldr	r3, [pc, #564]	; (8001338 <HAL_RCC_OscConfig+0x624>)
 8001102:	6a1b      	ldr	r3, [r3, #32]
 8001104:	2202      	movs	r2, #2
 8001106:	4013      	ands	r3, r2
 8001108:	d1f0      	bne.n	80010ec <HAL_RCC_OscConfig+0x3d8>
        }
      }
    }

    /* Require to disable power clock if necessary */
    if(pwrclkchanged == SET)
 800110a:	231f      	movs	r3, #31
 800110c:	18fb      	adds	r3, r7, r3
 800110e:	781b      	ldrb	r3, [r3, #0]
 8001110:	2b01      	cmp	r3, #1
 8001112:	d105      	bne.n	8001120 <HAL_RCC_OscConfig+0x40c>
    {
      __HAL_RCC_PWR_CLK_DISABLE();
 8001114:	4b88      	ldr	r3, [pc, #544]	; (8001338 <HAL_RCC_OscConfig+0x624>)
 8001116:	69da      	ldr	r2, [r3, #28]
 8001118:	4b87      	ldr	r3, [pc, #540]	; (8001338 <HAL_RCC_OscConfig+0x624>)
 800111a:	4989      	ldr	r1, [pc, #548]	; (8001340 <HAL_RCC_OscConfig+0x62c>)
 800111c:	400a      	ands	r2, r1
 800111e:	61da      	str	r2, [r3, #28]
    }
  }

  /*----------------------------- HSI14 Configuration --------------------------*/
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI14) == RCC_OSCILLATORTYPE_HSI14)
 8001120:	687b      	ldr	r3, [r7, #4]
 8001122:	681b      	ldr	r3, [r3, #0]
 8001124:	2210      	movs	r2, #16
 8001126:	4013      	ands	r3, r2
 8001128:	d063      	beq.n	80011f2 <HAL_RCC_OscConfig+0x4de>
    /* Check the parameters */
    assert_param(IS_RCC_HSI14(RCC_OscInitStruct->HSI14State));
    assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSI14CalibrationValue));

    /* Check the HSI14 State */
    if(RCC_OscInitStruct->HSI14State == RCC_HSI14_ON)
 800112a:	687b      	ldr	r3, [r7, #4]
 800112c:	695b      	ldr	r3, [r3, #20]
 800112e:	2b01      	cmp	r3, #1
 8001130:	d12a      	bne.n	8001188 <HAL_RCC_OscConfig+0x474>
    {
      /* Disable ADC control of the Internal High Speed oscillator HSI14 */
      __HAL_RCC_HSI14ADC_DISABLE();
 8001132:	4b81      	ldr	r3, [pc, #516]	; (8001338 <HAL_RCC_OscConfig+0x624>)
 8001134:	6b5a      	ldr	r2, [r3, #52]	; 0x34
 8001136:	4b80      	ldr	r3, [pc, #512]	; (8001338 <HAL_RCC_OscConfig+0x624>)
 8001138:	2104      	movs	r1, #4
 800113a:	430a      	orrs	r2, r1
 800113c:	635a      	str	r2, [r3, #52]	; 0x34

      /* Enable the Internal High Speed oscillator (HSI). */
      __HAL_RCC_HSI14_ENABLE();
 800113e:	4b7e      	ldr	r3, [pc, #504]	; (8001338 <HAL_RCC_OscConfig+0x624>)
 8001140:	6b5a      	ldr	r2, [r3, #52]	; 0x34
 8001142:	4b7d      	ldr	r3, [pc, #500]	; (8001338 <HAL_RCC_OscConfig+0x624>)
 8001144:	2101      	movs	r1, #1
 8001146:	430a      	orrs	r2, r1
 8001148:	635a      	str	r2, [r3, #52]	; 0x34

      /* Get Start Tick */
      tickstart = HAL_GetTick();
 800114a:	f7ff fb81 	bl	8000850 <HAL_GetTick>
 800114e:	0003      	movs	r3, r0
 8001150:	61bb      	str	r3, [r7, #24]
      
      /* Wait till HSI is ready */  
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI14RDY) == RESET)
 8001152:	e008      	b.n	8001166 <HAL_RCC_OscConfig+0x452>
      {
        if((HAL_GetTick() - tickstart) > HSI14_TIMEOUT_VALUE)
 8001154:	f7ff fb7c 	bl	8000850 <HAL_GetTick>
 8001158:	0002      	movs	r2, r0
 800115a:	69bb      	ldr	r3, [r7, #24]
 800115c:	1ad3      	subs	r3, r2, r3
 800115e:	2b02      	cmp	r3, #2
 8001160:	d901      	bls.n	8001166 <HAL_RCC_OscConfig+0x452>
        {
          return HAL_TIMEOUT;
 8001162:	2303      	movs	r3, #3
 8001164:	e0e3      	b.n	800132e <HAL_RCC_OscConfig+0x61a>
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI14RDY) == RESET)
 8001166:	4b74      	ldr	r3, [pc, #464]	; (8001338 <HAL_RCC_OscConfig+0x624>)
 8001168:	6b5b      	ldr	r3, [r3, #52]	; 0x34
 800116a:	2202      	movs	r2, #2
 800116c:	4013      	ands	r3, r2
 800116e:	d0f1      	beq.n	8001154 <HAL_RCC_OscConfig+0x440>
        }      
      } 

      /* Adjusts the Internal High Speed oscillator 14Mhz (HSI14) calibration value. */
      __HAL_RCC_HSI14_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSI14CalibrationValue);
 8001170:	4b71      	ldr	r3, [pc, #452]	; (8001338 <HAL_RCC_OscConfig+0x624>)
 8001172:	6b5b      	ldr	r3, [r3, #52]	; 0x34
 8001174:	22f8      	movs	r2, #248	; 0xf8
 8001176:	4393      	bics	r3, r2
 8001178:	0019      	movs	r1, r3
 800117a:	687b      	ldr	r3, [r7, #4]
 800117c:	699b      	ldr	r3, [r3, #24]
 800117e:	00da      	lsls	r2, r3, #3
 8001180:	4b6d      	ldr	r3, [pc, #436]	; (8001338 <HAL_RCC_OscConfig+0x624>)
 8001182:	430a      	orrs	r2, r1
 8001184:	635a      	str	r2, [r3, #52]	; 0x34
 8001186:	e034      	b.n	80011f2 <HAL_RCC_OscConfig+0x4de>
    }
    else if(RCC_OscInitStruct->HSI14State == RCC_HSI14_ADC_CONTROL)
 8001188:	687b      	ldr	r3, [r7, #4]
 800118a:	695b      	ldr	r3, [r3, #20]
 800118c:	3305      	adds	r3, #5
 800118e:	d111      	bne.n	80011b4 <HAL_RCC_OscConfig+0x4a0>
    {
      /* Enable ADC control of the Internal High Speed oscillator HSI14 */
      __HAL_RCC_HSI14ADC_ENABLE();
 8001190:	4b69      	ldr	r3, [pc, #420]	; (8001338 <HAL_RCC_OscConfig+0x624>)
 8001192:	6b5a      	ldr	r2, [r3, #52]	; 0x34
 8001194:	4b68      	ldr	r3, [pc, #416]	; (8001338 <HAL_RCC_OscConfig+0x624>)
 8001196:	2104      	movs	r1, #4
 8001198:	438a      	bics	r2, r1
 800119a:	635a      	str	r2, [r3, #52]	; 0x34

      /* Adjusts the Internal High Speed oscillator 14Mhz (HSI14) calibration value. */
      __HAL_RCC_HSI14_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSI14CalibrationValue);
 800119c:	4b66      	ldr	r3, [pc, #408]	; (8001338 <HAL_RCC_OscConfig+0x624>)
 800119e:	6b5b      	ldr	r3, [r3, #52]	; 0x34
 80011a0:	22f8      	movs	r2, #248	; 0xf8
 80011a2:	4393      	bics	r3, r2
 80011a4:	0019      	movs	r1, r3
 80011a6:	687b      	ldr	r3, [r7, #4]
 80011a8:	699b      	ldr	r3, [r3, #24]
 80011aa:	00da      	lsls	r2, r3, #3
 80011ac:	4b62      	ldr	r3, [pc, #392]	; (8001338 <HAL_RCC_OscConfig+0x624>)
 80011ae:	430a      	orrs	r2, r1
 80011b0:	635a      	str	r2, [r3, #52]	; 0x34
 80011b2:	e01e      	b.n	80011f2 <HAL_RCC_OscConfig+0x4de>
    }
    else
    {
      /* Disable ADC control of the Internal High Speed oscillator HSI14 */
      __HAL_RCC_HSI14ADC_DISABLE();
 80011b4:	4b60      	ldr	r3, [pc, #384]	; (8001338 <HAL_RCC_OscConfig+0x624>)
 80011b6:	6b5a      	ldr	r2, [r3, #52]	; 0x34
 80011b8:	4b5f      	ldr	r3, [pc, #380]	; (8001338 <HAL_RCC_OscConfig+0x624>)
 80011ba:	2104      	movs	r1, #4
 80011bc:	430a      	orrs	r2, r1
 80011be:	635a      	str	r2, [r3, #52]	; 0x34

      /* Disable the Internal High Speed oscillator (HSI). */
      __HAL_RCC_HSI14_DISABLE();
 80011c0:	4b5d      	ldr	r3, [pc, #372]	; (8001338 <HAL_RCC_OscConfig+0x624>)
 80011c2:	6b5a      	ldr	r2, [r3, #52]	; 0x34
 80011c4:	4b5c      	ldr	r3, [pc, #368]	; (8001338 <HAL_RCC_OscConfig+0x624>)
 80011c6:	2101      	movs	r1, #1
 80011c8:	438a      	bics	r2, r1
 80011ca:	635a      	str	r2, [r3, #52]	; 0x34

      /* Get Start Tick */
      tickstart = HAL_GetTick();
 80011cc:	f7ff fb40 	bl	8000850 <HAL_GetTick>
 80011d0:	0003      	movs	r3, r0
 80011d2:	61bb      	str	r3, [r7, #24]
      
      /* Wait till HSI is ready */  
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI14RDY) != RESET)
 80011d4:	e008      	b.n	80011e8 <HAL_RCC_OscConfig+0x4d4>
      {
        if((HAL_GetTick() - tickstart) > HSI14_TIMEOUT_VALUE)
 80011d6:	f7ff fb3b 	bl	8000850 <HAL_GetTick>
 80011da:	0002      	movs	r2, r0
 80011dc:	69bb      	ldr	r3, [r7, #24]
 80011de:	1ad3      	subs	r3, r2, r3
 80011e0:	2b02      	cmp	r3, #2
 80011e2:	d901      	bls.n	80011e8 <HAL_RCC_OscConfig+0x4d4>
        {
          return HAL_TIMEOUT;
 80011e4:	2303      	movs	r3, #3
 80011e6:	e0a2      	b.n	800132e <HAL_RCC_OscConfig+0x61a>
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI14RDY) != RESET)
 80011e8:	4b53      	ldr	r3, [pc, #332]	; (8001338 <HAL_RCC_OscConfig+0x624>)
 80011ea:	6b5b      	ldr	r3, [r3, #52]	; 0x34
 80011ec:	2202      	movs	r2, #2
 80011ee:	4013      	ands	r3, r2
 80011f0:	d1f1      	bne.n	80011d6 <HAL_RCC_OscConfig+0x4c2>
#endif /* RCC_HSI48_SUPPORT */
       
  /*-------------------------------- PLL Configuration -----------------------*/
  /* Check the parameters */
  assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
  if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
 80011f2:	687b      	ldr	r3, [r7, #4]
 80011f4:	6a1b      	ldr	r3, [r3, #32]
 80011f6:	2b00      	cmp	r3, #0
 80011f8:	d100      	bne.n	80011fc <HAL_RCC_OscConfig+0x4e8>
 80011fa:	e097      	b.n	800132c <HAL_RCC_OscConfig+0x618>
  {
    /* Check if the PLL is used as system clock or not */
    if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
 80011fc:	4b4e      	ldr	r3, [pc, #312]	; (8001338 <HAL_RCC_OscConfig+0x624>)
 80011fe:	685b      	ldr	r3, [r3, #4]
 8001200:	220c      	movs	r2, #12
 8001202:	4013      	ands	r3, r2
 8001204:	2b08      	cmp	r3, #8
 8001206:	d100      	bne.n	800120a <HAL_RCC_OscConfig+0x4f6>
 8001208:	e06b      	b.n	80012e2 <HAL_RCC_OscConfig+0x5ce>
    { 
      if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
 800120a:	687b      	ldr	r3, [r7, #4]
 800120c:	6a1b      	ldr	r3, [r3, #32]
 800120e:	2b02      	cmp	r3, #2
 8001210:	d14c      	bne.n	80012ac <HAL_RCC_OscConfig+0x598>
        assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource));
        assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL));
        assert_param(IS_RCC_PREDIV(RCC_OscInitStruct->PLL.PREDIV));
  
        /* Disable the main PLL. */
        __HAL_RCC_PLL_DISABLE();
 8001212:	4b49      	ldr	r3, [pc, #292]	; (8001338 <HAL_RCC_OscConfig+0x624>)
 8001214:	681a      	ldr	r2, [r3, #0]
 8001216:	4b48      	ldr	r3, [pc, #288]	; (8001338 <HAL_RCC_OscConfig+0x624>)
 8001218:	494a      	ldr	r1, [pc, #296]	; (8001344 <HAL_RCC_OscConfig+0x630>)
 800121a:	400a      	ands	r2, r1
 800121c:	601a      	str	r2, [r3, #0]
        
        /* Get Start Tick */
        tickstart = HAL_GetTick();
 800121e:	f7ff fb17 	bl	8000850 <HAL_GetTick>
 8001222:	0003      	movs	r3, r0
 8001224:	61bb      	str	r3, [r7, #24]
        
        /* Wait till PLL is disabled */
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  != RESET)
 8001226:	e008      	b.n	800123a <HAL_RCC_OscConfig+0x526>
        {
          if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
 8001228:	f7ff fb12 	bl	8000850 <HAL_GetTick>
 800122c:	0002      	movs	r2, r0
 800122e:	69bb      	ldr	r3, [r7, #24]
 8001230:	1ad3      	subs	r3, r2, r3
 8001232:	2b02      	cmp	r3, #2
 8001234:	d901      	bls.n	800123a <HAL_RCC_OscConfig+0x526>
          {
            return HAL_TIMEOUT;
 8001236:	2303      	movs	r3, #3
 8001238:	e079      	b.n	800132e <HAL_RCC_OscConfig+0x61a>
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  != RESET)
 800123a:	4b3f      	ldr	r3, [pc, #252]	; (8001338 <HAL_RCC_OscConfig+0x624>)
 800123c:	681a      	ldr	r2, [r3, #0]
 800123e:	2380      	movs	r3, #128	; 0x80
 8001240:	049b      	lsls	r3, r3, #18
 8001242:	4013      	ands	r3, r2
 8001244:	d1f0      	bne.n	8001228 <HAL_RCC_OscConfig+0x514>
          }
        }

        /* Configure the main PLL clock source, predivider and multiplication factor. */
        __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
 8001246:	4b3c      	ldr	r3, [pc, #240]	; (8001338 <HAL_RCC_OscConfig+0x624>)
 8001248:	6adb      	ldr	r3, [r3, #44]	; 0x2c
 800124a:	220f      	movs	r2, #15
 800124c:	4393      	bics	r3, r2
 800124e:	0019      	movs	r1, r3
 8001250:	687b      	ldr	r3, [r7, #4]
 8001252:	6ada      	ldr	r2, [r3, #44]	; 0x2c
 8001254:	4b38      	ldr	r3, [pc, #224]	; (8001338 <HAL_RCC_OscConfig+0x624>)
 8001256:	430a      	orrs	r2, r1
 8001258:	62da      	str	r2, [r3, #44]	; 0x2c
 800125a:	4b37      	ldr	r3, [pc, #220]	; (8001338 <HAL_RCC_OscConfig+0x624>)
 800125c:	685b      	ldr	r3, [r3, #4]
 800125e:	4a3a      	ldr	r2, [pc, #232]	; (8001348 <HAL_RCC_OscConfig+0x634>)
 8001260:	4013      	ands	r3, r2
 8001262:	0019      	movs	r1, r3
 8001264:	687b      	ldr	r3, [r7, #4]
 8001266:	6a9a      	ldr	r2, [r3, #40]	; 0x28
 8001268:	687b      	ldr	r3, [r7, #4]
 800126a:	6a5b      	ldr	r3, [r3, #36]	; 0x24
 800126c:	431a      	orrs	r2, r3
 800126e:	4b32      	ldr	r3, [pc, #200]	; (8001338 <HAL_RCC_OscConfig+0x624>)
 8001270:	430a      	orrs	r2, r1
 8001272:	605a      	str	r2, [r3, #4]
                             RCC_OscInitStruct->PLL.PREDIV,
                             RCC_OscInitStruct->PLL.PLLMUL);
        /* Enable the main PLL. */
        __HAL_RCC_PLL_ENABLE();
 8001274:	4b30      	ldr	r3, [pc, #192]	; (8001338 <HAL_RCC_OscConfig+0x624>)
 8001276:	681a      	ldr	r2, [r3, #0]
 8001278:	4b2f      	ldr	r3, [pc, #188]	; (8001338 <HAL_RCC_OscConfig+0x624>)
 800127a:	2180      	movs	r1, #128	; 0x80
 800127c:	0449      	lsls	r1, r1, #17
 800127e:	430a      	orrs	r2, r1
 8001280:	601a      	str	r2, [r3, #0]
        
        /* Get Start Tick */
        tickstart = HAL_GetTick();
 8001282:	f7ff fae5 	bl	8000850 <HAL_GetTick>
 8001286:	0003      	movs	r3, r0
 8001288:	61bb      	str	r3, [r7, #24]
        
        /* Wait till PLL is ready */
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  == RESET)
 800128a:	e008      	b.n	800129e <HAL_RCC_OscConfig+0x58a>
        {
          if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
 800128c:	f7ff fae0 	bl	8000850 <HAL_GetTick>
 8001290:	0002      	movs	r2, r0
 8001292:	69bb      	ldr	r3, [r7, #24]
 8001294:	1ad3      	subs	r3, r2, r3
 8001296:	2b02      	cmp	r3, #2
 8001298:	d901      	bls.n	800129e <HAL_RCC_OscConfig+0x58a>
          {
            return HAL_TIMEOUT;
 800129a:	2303      	movs	r3, #3
 800129c:	e047      	b.n	800132e <HAL_RCC_OscConfig+0x61a>
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  == RESET)
 800129e:	4b26      	ldr	r3, [pc, #152]	; (8001338 <HAL_RCC_OscConfig+0x624>)
 80012a0:	681a      	ldr	r2, [r3, #0]
 80012a2:	2380      	movs	r3, #128	; 0x80
 80012a4:	049b      	lsls	r3, r3, #18
 80012a6:	4013      	ands	r3, r2
 80012a8:	d0f0      	beq.n	800128c <HAL_RCC_OscConfig+0x578>
 80012aa:	e03f      	b.n	800132c <HAL_RCC_OscConfig+0x618>
        }
      }
      else
      {
        /* Disable the main PLL. */
        __HAL_RCC_PLL_DISABLE();
 80012ac:	4b22      	ldr	r3, [pc, #136]	; (8001338 <HAL_RCC_OscConfig+0x624>)
 80012ae:	681a      	ldr	r2, [r3, #0]
 80012b0:	4b21      	ldr	r3, [pc, #132]	; (8001338 <HAL_RCC_OscConfig+0x624>)
 80012b2:	4924      	ldr	r1, [pc, #144]	; (8001344 <HAL_RCC_OscConfig+0x630>)
 80012b4:	400a      	ands	r2, r1
 80012b6:	601a      	str	r2, [r3, #0]
 
        /* Get Start Tick */
        tickstart = HAL_GetTick();
 80012b8:	f7ff faca 	bl	8000850 <HAL_GetTick>
 80012bc:	0003      	movs	r3, r0
 80012be:	61bb      	str	r3, [r7, #24]
        
        /* Wait till PLL is disabled */  
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  != RESET)
 80012c0:	e008      	b.n	80012d4 <HAL_RCC_OscConfig+0x5c0>
        {
          if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
 80012c2:	f7ff fac5 	bl	8000850 <HAL_GetTick>
 80012c6:	0002      	movs	r2, r0
 80012c8:	69bb      	ldr	r3, [r7, #24]
 80012ca:	1ad3      	subs	r3, r2, r3
 80012cc:	2b02      	cmp	r3, #2
 80012ce:	d901      	bls.n	80012d4 <HAL_RCC_OscConfig+0x5c0>
          {
            return HAL_TIMEOUT;
 80012d0:	2303      	movs	r3, #3
 80012d2:	e02c      	b.n	800132e <HAL_RCC_OscConfig+0x61a>
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  != RESET)
 80012d4:	4b18      	ldr	r3, [pc, #96]	; (8001338 <HAL_RCC_OscConfig+0x624>)
 80012d6:	681a      	ldr	r2, [r3, #0]
 80012d8:	2380      	movs	r3, #128	; 0x80
 80012da:	049b      	lsls	r3, r3, #18
 80012dc:	4013      	ands	r3, r2
 80012de:	d1f0      	bne.n	80012c2 <HAL_RCC_OscConfig+0x5ae>
 80012e0:	e024      	b.n	800132c <HAL_RCC_OscConfig+0x618>
      }
    }
    else
    {
      /* Check if there is a request to disable the PLL used as System clock source */
      if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
 80012e2:	687b      	ldr	r3, [r7, #4]
 80012e4:	6a1b      	ldr	r3, [r3, #32]
 80012e6:	2b01      	cmp	r3, #1
 80012e8:	d101      	bne.n	80012ee <HAL_RCC_OscConfig+0x5da>
      {
        return HAL_ERROR;
 80012ea:	2301      	movs	r3, #1
 80012ec:	e01f      	b.n	800132e <HAL_RCC_OscConfig+0x61a>
      }
      else
      {
        /* Do not return HAL_ERROR if request repeats the current configuration */
        pll_config  = RCC->CFGR;
 80012ee:	4b12      	ldr	r3, [pc, #72]	; (8001338 <HAL_RCC_OscConfig+0x624>)
 80012f0:	685b      	ldr	r3, [r3, #4]
 80012f2:	617b      	str	r3, [r7, #20]
        pll_config2 = RCC->CFGR2;
 80012f4:	4b10      	ldr	r3, [pc, #64]	; (8001338 <HAL_RCC_OscConfig+0x624>)
 80012f6:	6adb      	ldr	r3, [r3, #44]	; 0x2c
 80012f8:	613b      	str	r3, [r7, #16]
        if((READ_BIT(pll_config,  RCC_CFGR_PLLSRC)  != RCC_OscInitStruct->PLL.PLLSource) ||
 80012fa:	697a      	ldr	r2, [r7, #20]
 80012fc:	2380      	movs	r3, #128	; 0x80
 80012fe:	025b      	lsls	r3, r3, #9
 8001300:	401a      	ands	r2, r3
 8001302:	687b      	ldr	r3, [r7, #4]
 8001304:	6a5b      	ldr	r3, [r3, #36]	; 0x24
 8001306:	429a      	cmp	r2, r3
 8001308:	d10e      	bne.n	8001328 <HAL_RCC_OscConfig+0x614>
           (READ_BIT(pll_config2, RCC_CFGR2_PREDIV) != RCC_OscInitStruct->PLL.PREDIV)    ||
 800130a:	693b      	ldr	r3, [r7, #16]
 800130c:	220f      	movs	r2, #15
 800130e:	401a      	ands	r2, r3
 8001310:	687b      	ldr	r3, [r7, #4]
 8001312:	6adb      	ldr	r3, [r3, #44]	; 0x2c
        if((READ_BIT(pll_config,  RCC_CFGR_PLLSRC)  != RCC_OscInitStruct->PLL.PLLSource) ||
 8001314:	429a      	cmp	r2, r3
 8001316:	d107      	bne.n	8001328 <HAL_RCC_OscConfig+0x614>
           (READ_BIT(pll_config,  RCC_CFGR_PLLMUL)  != RCC_OscInitStruct->PLL.PLLMUL))
 8001318:	697a      	ldr	r2, [r7, #20]
 800131a:	23f0      	movs	r3, #240	; 0xf0
 800131c:	039b      	lsls	r3, r3, #14
 800131e:	401a      	ands	r2, r3
 8001320:	687b      	ldr	r3, [r7, #4]
 8001322:	6a9b      	ldr	r3, [r3, #40]	; 0x28
           (READ_BIT(pll_config2, RCC_CFGR2_PREDIV) != RCC_OscInitStruct->PLL.PREDIV)    ||
 8001324:	429a      	cmp	r2, r3
 8001326:	d001      	beq.n	800132c <HAL_RCC_OscConfig+0x618>
        {
          return HAL_ERROR;
 8001328:	2301      	movs	r3, #1
 800132a:	e000      	b.n	800132e <HAL_RCC_OscConfig+0x61a>
        }
      }
    }
  }

  return HAL_OK;
 800132c:	2300      	movs	r3, #0
}
 800132e:	0018      	movs	r0, r3
 8001330:	46bd      	mov	sp, r7
 8001332:	b008      	add	sp, #32
 8001334:	bd80      	pop	{r7, pc}
 8001336:	46c0      	nop			; (mov r8, r8)
 8001338:	40021000 	.word	0x40021000
 800133c:	00001388 	.word	0x00001388
 8001340:	efffffff 	.word	0xefffffff
 8001344:	feffffff 	.word	0xfeffffff
 8001348:	ffc2ffff 	.word	0xffc2ffff

0800134c <HAL_RCC_ClockConfig>:
  *         You can use @ref HAL_RCC_GetClockConfig() function to know which clock is
  *         currently used as system clock source.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef  *RCC_ClkInitStruct, uint32_t FLatency)
{
 800134c:	b580      	push	{r7, lr}
 800134e:	b084      	sub	sp, #16
 8001350:	af00      	add	r7, sp, #0
 8001352:	6078      	str	r0, [r7, #4]
 8001354:	6039      	str	r1, [r7, #0]
  uint32_t tickstart;

  /* Check Null pointer */
  if(RCC_ClkInitStruct == NULL)
 8001356:	687b      	ldr	r3, [r7, #4]
 8001358:	2b00      	cmp	r3, #0
 800135a:	d101      	bne.n	8001360 <HAL_RCC_ClockConfig+0x14>
  {
    return HAL_ERROR;
 800135c:	2301      	movs	r3, #1
 800135e:	e0b3      	b.n	80014c8 <HAL_RCC_ClockConfig+0x17c>
  /* To correctly read data from FLASH memory, the number of wait states (LATENCY) 
  must be correctly programmed according to the frequency of the CPU clock 
    (HCLK) of the device. */

  /* Increasing the number of wait states because of higher CPU frequency */
  if(FLatency > __HAL_FLASH_GET_LATENCY())
 8001360:	4b5b      	ldr	r3, [pc, #364]	; (80014d0 <HAL_RCC_ClockConfig+0x184>)
 8001362:	681b      	ldr	r3, [r3, #0]
 8001364:	2201      	movs	r2, #1
 8001366:	4013      	ands	r3, r2
 8001368:	683a      	ldr	r2, [r7, #0]
 800136a:	429a      	cmp	r2, r3
 800136c:	d911      	bls.n	8001392 <HAL_RCC_ClockConfig+0x46>
  {    
    /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
    __HAL_FLASH_SET_LATENCY(FLatency);
 800136e:	4b58      	ldr	r3, [pc, #352]	; (80014d0 <HAL_RCC_ClockConfig+0x184>)
 8001370:	681b      	ldr	r3, [r3, #0]
 8001372:	2201      	movs	r2, #1
 8001374:	4393      	bics	r3, r2
 8001376:	0019      	movs	r1, r3
 8001378:	4b55      	ldr	r3, [pc, #340]	; (80014d0 <HAL_RCC_ClockConfig+0x184>)
 800137a:	683a      	ldr	r2, [r7, #0]
 800137c:	430a      	orrs	r2, r1
 800137e:	601a      	str	r2, [r3, #0]
    
    /* Check that the new number of wait states is taken into account to access the Flash
    memory by reading the FLASH_ACR register */
    if(__HAL_FLASH_GET_LATENCY() != FLatency)
 8001380:	4b53      	ldr	r3, [pc, #332]	; (80014d0 <HAL_RCC_ClockConfig+0x184>)
 8001382:	681b      	ldr	r3, [r3, #0]
 8001384:	2201      	movs	r2, #1
 8001386:	4013      	ands	r3, r2
 8001388:	683a      	ldr	r2, [r7, #0]
 800138a:	429a      	cmp	r2, r3
 800138c:	d001      	beq.n	8001392 <HAL_RCC_ClockConfig+0x46>
    {
      return HAL_ERROR;
 800138e:	2301      	movs	r3, #1
 8001390:	e09a      	b.n	80014c8 <HAL_RCC_ClockConfig+0x17c>
    }
  }

  /*-------------------------- HCLK Configuration --------------------------*/
  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
 8001392:	687b      	ldr	r3, [r7, #4]
 8001394:	681b      	ldr	r3, [r3, #0]
 8001396:	2202      	movs	r2, #2
 8001398:	4013      	ands	r3, r2
 800139a:	d015      	beq.n	80013c8 <HAL_RCC_ClockConfig+0x7c>
  {
    /* Set the highest APB divider in order to ensure that we do not go through
       a non-spec phase whatever we decrease or increase HCLK. */
    if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
 800139c:	687b      	ldr	r3, [r7, #4]
 800139e:	681b      	ldr	r3, [r3, #0]
 80013a0:	2204      	movs	r2, #4
 80013a2:	4013      	ands	r3, r2
 80013a4:	d006      	beq.n	80013b4 <HAL_RCC_ClockConfig+0x68>
    {
      MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_HCLK_DIV16);
 80013a6:	4b4b      	ldr	r3, [pc, #300]	; (80014d4 <HAL_RCC_ClockConfig+0x188>)
 80013a8:	685a      	ldr	r2, [r3, #4]
 80013aa:	4b4a      	ldr	r3, [pc, #296]	; (80014d4 <HAL_RCC_ClockConfig+0x188>)
 80013ac:	21e0      	movs	r1, #224	; 0xe0
 80013ae:	00c9      	lsls	r1, r1, #3
 80013b0:	430a      	orrs	r2, r1
 80013b2:	605a      	str	r2, [r3, #4]
    }

    /* Set the new HCLK clock divider */
    assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
    MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
 80013b4:	4b47      	ldr	r3, [pc, #284]	; (80014d4 <HAL_RCC_ClockConfig+0x188>)
 80013b6:	685b      	ldr	r3, [r3, #4]
 80013b8:	22f0      	movs	r2, #240	; 0xf0
 80013ba:	4393      	bics	r3, r2
 80013bc:	0019      	movs	r1, r3
 80013be:	687b      	ldr	r3, [r7, #4]
 80013c0:	689a      	ldr	r2, [r3, #8]
 80013c2:	4b44      	ldr	r3, [pc, #272]	; (80014d4 <HAL_RCC_ClockConfig+0x188>)
 80013c4:	430a      	orrs	r2, r1
 80013c6:	605a      	str	r2, [r3, #4]
  }

  /*------------------------- SYSCLK Configuration ---------------------------*/ 
  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
 80013c8:	687b      	ldr	r3, [r7, #4]
 80013ca:	681b      	ldr	r3, [r3, #0]
 80013cc:	2201      	movs	r2, #1
 80013ce:	4013      	ands	r3, r2
 80013d0:	d040      	beq.n	8001454 <HAL_RCC_ClockConfig+0x108>
  {
    assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
    
    /* HSE is selected as System Clock Source */
    if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
 80013d2:	687b      	ldr	r3, [r7, #4]
 80013d4:	685b      	ldr	r3, [r3, #4]
 80013d6:	2b01      	cmp	r3, #1
 80013d8:	d107      	bne.n	80013ea <HAL_RCC_ClockConfig+0x9e>
    {
      /* Check the HSE ready flag */  
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
 80013da:	4b3e      	ldr	r3, [pc, #248]	; (80014d4 <HAL_RCC_ClockConfig+0x188>)
 80013dc:	681a      	ldr	r2, [r3, #0]
 80013de:	2380      	movs	r3, #128	; 0x80
 80013e0:	029b      	lsls	r3, r3, #10
 80013e2:	4013      	ands	r3, r2
 80013e4:	d114      	bne.n	8001410 <HAL_RCC_ClockConfig+0xc4>
      {
        return HAL_ERROR;
 80013e6:	2301      	movs	r3, #1
 80013e8:	e06e      	b.n	80014c8 <HAL_RCC_ClockConfig+0x17c>
      }
    }
    /* PLL is selected as System Clock Source */
    else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
 80013ea:	687b      	ldr	r3, [r7, #4]
 80013ec:	685b      	ldr	r3, [r3, #4]
 80013ee:	2b02      	cmp	r3, #2
 80013f0:	d107      	bne.n	8001402 <HAL_RCC_ClockConfig+0xb6>
    {
      /* Check the PLL ready flag */  
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
 80013f2:	4b38      	ldr	r3, [pc, #224]	; (80014d4 <HAL_RCC_ClockConfig+0x188>)
 80013f4:	681a      	ldr	r2, [r3, #0]
 80013f6:	2380      	movs	r3, #128	; 0x80
 80013f8:	049b      	lsls	r3, r3, #18
 80013fa:	4013      	ands	r3, r2
 80013fc:	d108      	bne.n	8001410 <HAL_RCC_ClockConfig+0xc4>
      {
        return HAL_ERROR;
 80013fe:	2301      	movs	r3, #1
 8001400:	e062      	b.n	80014c8 <HAL_RCC_ClockConfig+0x17c>
#endif /* RCC_CFGR_SWS_HSI48 */
    /* HSI is selected as System Clock Source */
    else
    {
      /* Check the HSI ready flag */  
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
 8001402:	4b34      	ldr	r3, [pc, #208]	; (80014d4 <HAL_RCC_ClockConfig+0x188>)
 8001404:	681b      	ldr	r3, [r3, #0]
 8001406:	2202      	movs	r2, #2
 8001408:	4013      	ands	r3, r2
 800140a:	d101      	bne.n	8001410 <HAL_RCC_ClockConfig+0xc4>
      {
        return HAL_ERROR;
 800140c:	2301      	movs	r3, #1
 800140e:	e05b      	b.n	80014c8 <HAL_RCC_ClockConfig+0x17c>
      }
    }
    __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
 8001410:	4b30      	ldr	r3, [pc, #192]	; (80014d4 <HAL_RCC_ClockConfig+0x188>)
 8001412:	685b      	ldr	r3, [r3, #4]
 8001414:	2203      	movs	r2, #3
 8001416:	4393      	bics	r3, r2
 8001418:	0019      	movs	r1, r3
 800141a:	687b      	ldr	r3, [r7, #4]
 800141c:	685a      	ldr	r2, [r3, #4]
 800141e:	4b2d      	ldr	r3, [pc, #180]	; (80014d4 <HAL_RCC_ClockConfig+0x188>)
 8001420:	430a      	orrs	r2, r1
 8001422:	605a      	str	r2, [r3, #4]

    /* Get Start Tick */
    tickstart = HAL_GetTick();
 8001424:	f7ff fa14 	bl	8000850 <HAL_GetTick>
 8001428:	0003      	movs	r3, r0
 800142a:	60fb      	str	r3, [r7, #12]
    
    while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
 800142c:	e009      	b.n	8001442 <HAL_RCC_ClockConfig+0xf6>
    {
      if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
 800142e:	f7ff fa0f 	bl	8000850 <HAL_GetTick>
 8001432:	0002      	movs	r2, r0
 8001434:	68fb      	ldr	r3, [r7, #12]
 8001436:	1ad3      	subs	r3, r2, r3
 8001438:	4a27      	ldr	r2, [pc, #156]	; (80014d8 <HAL_RCC_ClockConfig+0x18c>)
 800143a:	4293      	cmp	r3, r2
 800143c:	d901      	bls.n	8001442 <HAL_RCC_ClockConfig+0xf6>
      {
        return HAL_TIMEOUT;
 800143e:	2303      	movs	r3, #3
 8001440:	e042      	b.n	80014c8 <HAL_RCC_ClockConfig+0x17c>
    while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
 8001442:	4b24      	ldr	r3, [pc, #144]	; (80014d4 <HAL_RCC_ClockConfig+0x188>)
 8001444:	685b      	ldr	r3, [r3, #4]
 8001446:	220c      	movs	r2, #12
 8001448:	401a      	ands	r2, r3
 800144a:	687b      	ldr	r3, [r7, #4]
 800144c:	685b      	ldr	r3, [r3, #4]
 800144e:	009b      	lsls	r3, r3, #2
 8001450:	429a      	cmp	r2, r3
 8001452:	d1ec      	bne.n	800142e <HAL_RCC_ClockConfig+0xe2>
      }
    }
  }

  /* Decreasing the number of wait states because of lower CPU frequency */
  if(FLatency < __HAL_FLASH_GET_LATENCY())
 8001454:	4b1e      	ldr	r3, [pc, #120]	; (80014d0 <HAL_RCC_ClockConfig+0x184>)
 8001456:	681b      	ldr	r3, [r3, #0]
 8001458:	2201      	movs	r2, #1
 800145a:	4013      	ands	r3, r2
 800145c:	683a      	ldr	r2, [r7, #0]
 800145e:	429a      	cmp	r2, r3
 8001460:	d211      	bcs.n	8001486 <HAL_RCC_ClockConfig+0x13a>
  {    
    /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
    __HAL_FLASH_SET_LATENCY(FLatency);
 8001462:	4b1b      	ldr	r3, [pc, #108]	; (80014d0 <HAL_RCC_ClockConfig+0x184>)
 8001464:	681b      	ldr	r3, [r3, #0]
 8001466:	2201      	movs	r2, #1
 8001468:	4393      	bics	r3, r2
 800146a:	0019      	movs	r1, r3
 800146c:	4b18      	ldr	r3, [pc, #96]	; (80014d0 <HAL_RCC_ClockConfig+0x184>)
 800146e:	683a      	ldr	r2, [r7, #0]
 8001470:	430a      	orrs	r2, r1
 8001472:	601a      	str	r2, [r3, #0]
    
    /* Check that the new number of wait states is taken into account to access the Flash
    memory by reading the FLASH_ACR register */
    if(__HAL_FLASH_GET_LATENCY() != FLatency)
 8001474:	4b16      	ldr	r3, [pc, #88]	; (80014d0 <HAL_RCC_ClockConfig+0x184>)
 8001476:	681b      	ldr	r3, [r3, #0]
 8001478:	2201      	movs	r2, #1
 800147a:	4013      	ands	r3, r2
 800147c:	683a      	ldr	r2, [r7, #0]
 800147e:	429a      	cmp	r2, r3
 8001480:	d001      	beq.n	8001486 <HAL_RCC_ClockConfig+0x13a>
    {
      return HAL_ERROR;
 8001482:	2301      	movs	r3, #1
 8001484:	e020      	b.n	80014c8 <HAL_RCC_ClockConfig+0x17c>
    }
  }    

  /*-------------------------- PCLK1 Configuration ---------------------------*/ 
  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
 8001486:	687b      	ldr	r3, [r7, #4]
 8001488:	681b      	ldr	r3, [r3, #0]
 800148a:	2204      	movs	r2, #4
 800148c:	4013      	ands	r3, r2
 800148e:	d009      	beq.n	80014a4 <HAL_RCC_ClockConfig+0x158>
  {
    assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
    MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_ClkInitStruct->APB1CLKDivider);
 8001490:	4b10      	ldr	r3, [pc, #64]	; (80014d4 <HAL_RCC_ClockConfig+0x188>)
 8001492:	685b      	ldr	r3, [r3, #4]
 8001494:	4a11      	ldr	r2, [pc, #68]	; (80014dc <HAL_RCC_ClockConfig+0x190>)
 8001496:	4013      	ands	r3, r2
 8001498:	0019      	movs	r1, r3
 800149a:	687b      	ldr	r3, [r7, #4]
 800149c:	68da      	ldr	r2, [r3, #12]
 800149e:	4b0d      	ldr	r3, [pc, #52]	; (80014d4 <HAL_RCC_ClockConfig+0x188>)
 80014a0:	430a      	orrs	r2, r1
 80014a2:	605a      	str	r2, [r3, #4]
  }
  
  /* Update the SystemCoreClock global variable */
  SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_BITNUMBER];
 80014a4:	f000 f820 	bl	80014e8 <HAL_RCC_GetSysClockFreq>
 80014a8:	0001      	movs	r1, r0
 80014aa:	4b0a      	ldr	r3, [pc, #40]	; (80014d4 <HAL_RCC_ClockConfig+0x188>)
 80014ac:	685b      	ldr	r3, [r3, #4]
 80014ae:	091b      	lsrs	r3, r3, #4
 80014b0:	220f      	movs	r2, #15
 80014b2:	4013      	ands	r3, r2
 80014b4:	4a0a      	ldr	r2, [pc, #40]	; (80014e0 <HAL_RCC_ClockConfig+0x194>)
 80014b6:	5cd3      	ldrb	r3, [r2, r3]
 80014b8:	000a      	movs	r2, r1
 80014ba:	40da      	lsrs	r2, r3
 80014bc:	4b09      	ldr	r3, [pc, #36]	; (80014e4 <HAL_RCC_ClockConfig+0x198>)
 80014be:	601a      	str	r2, [r3, #0]

  /* Configure the source of time base considering new system clocks settings*/
  HAL_InitTick (TICK_INT_PRIORITY);
 80014c0:	2000      	movs	r0, #0
 80014c2:	f7ff f8fd 	bl	80006c0 <HAL_InitTick>
  
  return HAL_OK;
 80014c6:	2300      	movs	r3, #0
}
 80014c8:	0018      	movs	r0, r3
 80014ca:	46bd      	mov	sp, r7
 80014cc:	b004      	add	sp, #16
 80014ce:	bd80      	pop	{r7, pc}
 80014d0:	40022000 	.word	0x40022000
 80014d4:	40021000 	.word	0x40021000
 80014d8:	00001388 	.word	0x00001388
 80014dc:	fffff8ff 	.word	0xfffff8ff
 80014e0:	08003f7c 	.word	0x08003f7c
 80014e4:	20000004 	.word	0x20000004

080014e8 <HAL_RCC_GetSysClockFreq>:
  *         right SYSCLK value. Otherwise, any configuration based on this function will be incorrect.
  *         
  * @retval SYSCLK frequency
  */
uint32_t HAL_RCC_GetSysClockFreq(void)
{
 80014e8:	b590      	push	{r4, r7, lr}
 80014ea:	b08f      	sub	sp, #60	; 0x3c
 80014ec:	af00      	add	r7, sp, #0
  const uint8_t aPLLMULFactorTable[16] = { 2U,  3U,  4U,  5U,  6U,  7U,  8U,  9U,
 80014ee:	2314      	movs	r3, #20
 80014f0:	18fb      	adds	r3, r7, r3
 80014f2:	4a2b      	ldr	r2, [pc, #172]	; (80015a0 <HAL_RCC_GetSysClockFreq+0xb8>)
 80014f4:	ca13      	ldmia	r2!, {r0, r1, r4}
 80014f6:	c313      	stmia	r3!, {r0, r1, r4}
 80014f8:	6812      	ldr	r2, [r2, #0]
 80014fa:	601a      	str	r2, [r3, #0]
                                         10U, 11U, 12U, 13U, 14U, 15U, 16U, 16U};
  const uint8_t aPredivFactorTable[16] = { 1U, 2U,  3U,  4U,  5U,  6U,  7U,  8U,
 80014fc:	1d3b      	adds	r3, r7, #4
 80014fe:	4a29      	ldr	r2, [pc, #164]	; (80015a4 <HAL_RCC_GetSysClockFreq+0xbc>)
 8001500:	ca13      	ldmia	r2!, {r0, r1, r4}
 8001502:	c313      	stmia	r3!, {r0, r1, r4}
 8001504:	6812      	ldr	r2, [r2, #0]
 8001506:	601a      	str	r2, [r3, #0]
                                           9U,10U, 11U, 12U, 13U, 14U, 15U, 16U};

  uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U;
 8001508:	2300      	movs	r3, #0
 800150a:	62fb      	str	r3, [r7, #44]	; 0x2c
 800150c:	2300      	movs	r3, #0
 800150e:	62bb      	str	r3, [r7, #40]	; 0x28
 8001510:	2300      	movs	r3, #0
 8001512:	637b      	str	r3, [r7, #52]	; 0x34
 8001514:	2300      	movs	r3, #0
 8001516:	627b      	str	r3, [r7, #36]	; 0x24
  uint32_t sysclockfreq = 0U;
 8001518:	2300      	movs	r3, #0
 800151a:	633b      	str	r3, [r7, #48]	; 0x30
  
  tmpreg = RCC->CFGR;
 800151c:	4b22      	ldr	r3, [pc, #136]	; (80015a8 <HAL_RCC_GetSysClockFreq+0xc0>)
 800151e:	685b      	ldr	r3, [r3, #4]
 8001520:	62fb      	str	r3, [r7, #44]	; 0x2c
  
  /* Get SYSCLK source -------------------------------------------------------*/
  switch (tmpreg & RCC_CFGR_SWS)
 8001522:	6afb      	ldr	r3, [r7, #44]	; 0x2c
 8001524:	220c      	movs	r2, #12
 8001526:	4013      	ands	r3, r2
 8001528:	2b04      	cmp	r3, #4
 800152a:	d002      	beq.n	8001532 <HAL_RCC_GetSysClockFreq+0x4a>
 800152c:	2b08      	cmp	r3, #8
 800152e:	d003      	beq.n	8001538 <HAL_RCC_GetSysClockFreq+0x50>
 8001530:	e02d      	b.n	800158e <HAL_RCC_GetSysClockFreq+0xa6>
  {
    case RCC_SYSCLKSOURCE_STATUS_HSE:  /* HSE used as system clock */
    {
      sysclockfreq = HSE_VALUE;
 8001532:	4b1e      	ldr	r3, [pc, #120]	; (80015ac <HAL_RCC_GetSysClockFreq+0xc4>)
 8001534:	633b      	str	r3, [r7, #48]	; 0x30
      break;
 8001536:	e02d      	b.n	8001594 <HAL_RCC_GetSysClockFreq+0xac>
    }
    case RCC_SYSCLKSOURCE_STATUS_PLLCLK:  /* PLL used as system clock */
    {
      pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMUL) >> RCC_CFGR_PLLMUL_BITNUMBER];
 8001538:	6afb      	ldr	r3, [r7, #44]	; 0x2c
 800153a:	0c9b      	lsrs	r3, r3, #18
 800153c:	220f      	movs	r2, #15
 800153e:	4013      	ands	r3, r2
 8001540:	2214      	movs	r2, #20
 8001542:	18ba      	adds	r2, r7, r2
 8001544:	5cd3      	ldrb	r3, [r2, r3]
 8001546:	627b      	str	r3, [r7, #36]	; 0x24
      prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV) >> RCC_CFGR2_PREDIV_BITNUMBER];
 8001548:	4b17      	ldr	r3, [pc, #92]	; (80015a8 <HAL_RCC_GetSysClockFreq+0xc0>)
 800154a:	6adb      	ldr	r3, [r3, #44]	; 0x2c
 800154c:	220f      	movs	r2, #15
 800154e:	4013      	ands	r3, r2
 8001550:	1d3a      	adds	r2, r7, #4
 8001552:	5cd3      	ldrb	r3, [r2, r3]
 8001554:	62bb      	str	r3, [r7, #40]	; 0x28
      if ((tmpreg & RCC_CFGR_PLLSRC) == RCC_PLLSOURCE_HSE)
 8001556:	6afa      	ldr	r2, [r7, #44]	; 0x2c
 8001558:	2380      	movs	r3, #128	; 0x80
 800155a:	025b      	lsls	r3, r3, #9
 800155c:	4013      	ands	r3, r2
 800155e:	d009      	beq.n	8001574 <HAL_RCC_GetSysClockFreq+0x8c>
      {
        /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV * PLLMUL */
        pllclk = (uint32_t)((uint64_t) HSE_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul);
 8001560:	6ab9      	ldr	r1, [r7, #40]	; 0x28
 8001562:	4812      	ldr	r0, [pc, #72]	; (80015ac <HAL_RCC_GetSysClockFreq+0xc4>)
 8001564:	f7fe fdd0 	bl	8000108 <__udivsi3>
 8001568:	0003      	movs	r3, r0
 800156a:	001a      	movs	r2, r3
 800156c:	6a7b      	ldr	r3, [r7, #36]	; 0x24
 800156e:	4353      	muls	r3, r2
 8001570:	637b      	str	r3, [r7, #52]	; 0x34
 8001572:	e009      	b.n	8001588 <HAL_RCC_GetSysClockFreq+0xa0>
#if  (defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F070x6) || defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F070xB) || defined(STM32F091xC) || defined(STM32F098xx) || defined(STM32F030xC))
        /* HSI used as PLL clock source : PLLCLK = HSI/PREDIV * PLLMUL */
        pllclk = (uint32_t)((uint64_t) HSI_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul);
#else
        /* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */
        pllclk = (uint32_t)((uint64_t) (HSI_VALUE >> 1U) * ((uint64_t) pllmul));
 8001574:	6a79      	ldr	r1, [r7, #36]	; 0x24
 8001576:	000a      	movs	r2, r1
 8001578:	0152      	lsls	r2, r2, #5
 800157a:	1a52      	subs	r2, r2, r1
 800157c:	0193      	lsls	r3, r2, #6
 800157e:	1a9b      	subs	r3, r3, r2
 8001580:	00db      	lsls	r3, r3, #3
 8001582:	185b      	adds	r3, r3, r1
 8001584:	021b      	lsls	r3, r3, #8
 8001586:	637b      	str	r3, [r7, #52]	; 0x34
#endif
      }
      sysclockfreq = pllclk;
 8001588:	6b7b      	ldr	r3, [r7, #52]	; 0x34
 800158a:	633b      	str	r3, [r7, #48]	; 0x30
      break;
 800158c:	e002      	b.n	8001594 <HAL_RCC_GetSysClockFreq+0xac>
    }
#endif /* RCC_CFGR_SWS_HSI48 */
    case RCC_SYSCLKSOURCE_STATUS_HSI:  /* HSI used as system clock source */
    default: /* HSI used as system clock */
    {
      sysclockfreq = HSI_VALUE;
 800158e:	4b07      	ldr	r3, [pc, #28]	; (80015ac <HAL_RCC_GetSysClockFreq+0xc4>)
 8001590:	633b      	str	r3, [r7, #48]	; 0x30
      break;
 8001592:	46c0      	nop			; (mov r8, r8)
    }
  }
  return sysclockfreq;
 8001594:	6b3b      	ldr	r3, [r7, #48]	; 0x30
}
 8001596:	0018      	movs	r0, r3
 8001598:	46bd      	mov	sp, r7
 800159a:	b00f      	add	sp, #60	; 0x3c
 800159c:	bd90      	pop	{r4, r7, pc}
 800159e:	46c0      	nop			; (mov r8, r8)
 80015a0:	08003f44 	.word	0x08003f44
 80015a4:	08003f54 	.word	0x08003f54
 80015a8:	40021000 	.word	0x40021000
 80015ac:	007a1200 	.word	0x007a1200

080015b0 <HAL_RCC_GetHCLKFreq>:
  * @note   The SystemCoreClock CMSIS variable is used to store System Clock Frequency 
  *         and updated within this function
  * @retval HCLK frequency
  */
uint32_t HAL_RCC_GetHCLKFreq(void)
{
 80015b0:	b580      	push	{r7, lr}
 80015b2:	af00      	add	r7, sp, #0
  return SystemCoreClock;
 80015b4:	4b02      	ldr	r3, [pc, #8]	; (80015c0 <HAL_RCC_GetHCLKFreq+0x10>)
 80015b6:	681b      	ldr	r3, [r3, #0]
}
 80015b8:	0018      	movs	r0, r3
 80015ba:	46bd      	mov	sp, r7
 80015bc:	bd80      	pop	{r7, pc}
 80015be:	46c0      	nop			; (mov r8, r8)
 80015c0:	20000004 	.word	0x20000004

080015c4 <HAL_RCC_GetPCLK1Freq>:
  * @note   Each time PCLK1 changes, this function must be called to update the
  *         right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
  * @retval PCLK1 frequency
  */
uint32_t HAL_RCC_GetPCLK1Freq(void)
{
 80015c4:	b580      	push	{r7, lr}
 80015c6:	af00      	add	r7, sp, #0
  /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
  return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE) >> RCC_CFGR_PPRE_BITNUMBER]);
 80015c8:	f7ff fff2 	bl	80015b0 <HAL_RCC_GetHCLKFreq>
 80015cc:	0001      	movs	r1, r0
 80015ce:	4b06      	ldr	r3, [pc, #24]	; (80015e8 <HAL_RCC_GetPCLK1Freq+0x24>)
 80015d0:	685b      	ldr	r3, [r3, #4]
 80015d2:	0a1b      	lsrs	r3, r3, #8
 80015d4:	2207      	movs	r2, #7
 80015d6:	4013      	ands	r3, r2
 80015d8:	4a04      	ldr	r2, [pc, #16]	; (80015ec <HAL_RCC_GetPCLK1Freq+0x28>)
 80015da:	5cd3      	ldrb	r3, [r2, r3]
 80015dc:	40d9      	lsrs	r1, r3
 80015de:	000b      	movs	r3, r1
}    
 80015e0:	0018      	movs	r0, r3
 80015e2:	46bd      	mov	sp, r7
 80015e4:	bd80      	pop	{r7, pc}
 80015e6:	46c0      	nop			; (mov r8, r8)
 80015e8:	40021000 	.word	0x40021000
 80015ec:	08003f8c 	.word	0x08003f8c

080015f0 <HAL_RCC_GetClockConfig>:
  * contains the current clock configuration.
  * @param  pFLatency Pointer on the Flash Latency.
  * @retval None
  */
void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef  *RCC_ClkInitStruct, uint32_t *pFLatency)
{
 80015f0:	b580      	push	{r7, lr}
 80015f2:	b082      	sub	sp, #8
 80015f4:	af00      	add	r7, sp, #0
 80015f6:	6078      	str	r0, [r7, #4]
 80015f8:	6039      	str	r1, [r7, #0]
  /* Check the parameters */
  assert_param(RCC_ClkInitStruct != NULL);
  assert_param(pFLatency != NULL);

  /* Set all possible values for the Clock type parameter --------------------*/
  RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1;
 80015fa:	687b      	ldr	r3, [r7, #4]
 80015fc:	2207      	movs	r2, #7
 80015fe:	601a      	str	r2, [r3, #0]
  
  /* Get the SYSCLK configuration --------------------------------------------*/ 
  RCC_ClkInitStruct->SYSCLKSource = (uint32_t)(RCC->CFGR & RCC_CFGR_SW);
 8001600:	4b0e      	ldr	r3, [pc, #56]	; (800163c <HAL_RCC_GetClockConfig+0x4c>)
 8001602:	685b      	ldr	r3, [r3, #4]
 8001604:	2203      	movs	r2, #3
 8001606:	401a      	ands	r2, r3
 8001608:	687b      	ldr	r3, [r7, #4]
 800160a:	605a      	str	r2, [r3, #4]
  
  /* Get the HCLK configuration ----------------------------------------------*/ 
  RCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_HPRE); 
 800160c:	4b0b      	ldr	r3, [pc, #44]	; (800163c <HAL_RCC_GetClockConfig+0x4c>)
 800160e:	685b      	ldr	r3, [r3, #4]
 8001610:	22f0      	movs	r2, #240	; 0xf0
 8001612:	401a      	ands	r2, r3
 8001614:	687b      	ldr	r3, [r7, #4]
 8001616:	609a      	str	r2, [r3, #8]
  
  /* Get the APB1 configuration ----------------------------------------------*/ 
  RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE);   
 8001618:	4b08      	ldr	r3, [pc, #32]	; (800163c <HAL_RCC_GetClockConfig+0x4c>)
 800161a:	685a      	ldr	r2, [r3, #4]
 800161c:	23e0      	movs	r3, #224	; 0xe0
 800161e:	00db      	lsls	r3, r3, #3
 8001620:	401a      	ands	r2, r3
 8001622:	687b      	ldr	r3, [r7, #4]
 8001624:	60da      	str	r2, [r3, #12]
  /* Get the Flash Wait State (Latency) configuration ------------------------*/   
  *pFLatency = __HAL_FLASH_GET_LATENCY(); 
 8001626:	4b06      	ldr	r3, [pc, #24]	; (8001640 <HAL_RCC_GetClockConfig+0x50>)
 8001628:	681b      	ldr	r3, [r3, #0]
 800162a:	2201      	movs	r2, #1
 800162c:	401a      	ands	r2, r3
 800162e:	683b      	ldr	r3, [r7, #0]
 8001630:	601a      	str	r2, [r3, #0]
}
 8001632:	46c0      	nop			; (mov r8, r8)
 8001634:	46bd      	mov	sp, r7
 8001636:	b002      	add	sp, #8
 8001638:	bd80      	pop	{r7, pc}
 800163a:	46c0      	nop			; (mov r8, r8)
 800163c:	40021000 	.word	0x40021000
 8001640:	40022000 	.word	0x40022000

08001644 <HAL_TIM_Base_Init>:
  *         Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init()
  * @param  htim TIM Base handle
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim)
{
 8001644:	b580      	push	{r7, lr}
 8001646:	b082      	sub	sp, #8
 8001648:	af00      	add	r7, sp, #0
 800164a:	6078      	str	r0, [r7, #4]
  /* Check the TIM handle allocation */
  if (htim == NULL)
 800164c:	687b      	ldr	r3, [r7, #4]
 800164e:	2b00      	cmp	r3, #0
 8001650:	d101      	bne.n	8001656 <HAL_TIM_Base_Init+0x12>
  {
    return HAL_ERROR;
 8001652:	2301      	movs	r3, #1
 8001654:	e01e      	b.n	8001694 <HAL_TIM_Base_Init+0x50>
  assert_param(IS_TIM_INSTANCE(htim->Instance));
  assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
  assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
  assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));

  if (htim->State == HAL_TIM_STATE_RESET)
 8001656:	687b      	ldr	r3, [r7, #4]
 8001658:	223d      	movs	r2, #61	; 0x3d
 800165a:	5c9b      	ldrb	r3, [r3, r2]
 800165c:	b2db      	uxtb	r3, r3
 800165e:	2b00      	cmp	r3, #0
 8001660:	d107      	bne.n	8001672 <HAL_TIM_Base_Init+0x2e>
  {
    /* Allocate lock resource and initialize it */
    htim->Lock = HAL_UNLOCKED;
 8001662:	687b      	ldr	r3, [r7, #4]
 8001664:	223c      	movs	r2, #60	; 0x3c
 8001666:	2100      	movs	r1, #0
 8001668:	5499      	strb	r1, [r3, r2]
    }
    /* Init the low level hardware : GPIO, CLOCK, NVIC */
    htim->Base_MspInitCallback(htim);
#else
    /* Init the low level hardware : GPIO, CLOCK, NVIC */
    HAL_TIM_Base_MspInit(htim);
 800166a:	687b      	ldr	r3, [r7, #4]
 800166c:	0018      	movs	r0, r3
 800166e:	f000 f815 	bl	800169c <HAL_TIM_Base_MspInit>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
  }

  /* Set the TIM state */
  htim->State = HAL_TIM_STATE_BUSY;
 8001672:	687b      	ldr	r3, [r7, #4]
 8001674:	223d      	movs	r2, #61	; 0x3d
 8001676:	2102      	movs	r1, #2
 8001678:	5499      	strb	r1, [r3, r2]

  /* Set the Time Base configuration */
  TIM_Base_SetConfig(htim->Instance, &htim->Init);
 800167a:	687b      	ldr	r3, [r7, #4]
 800167c:	681a      	ldr	r2, [r3, #0]
 800167e:	687b      	ldr	r3, [r7, #4]
 8001680:	3304      	adds	r3, #4
 8001682:	0019      	movs	r1, r3
 8001684:	0010      	movs	r0, r2
 8001686:	f000 f969 	bl	800195c <TIM_Base_SetConfig>

  /* Initialize the TIM state*/
  htim->State = HAL_TIM_STATE_READY;
 800168a:	687b      	ldr	r3, [r7, #4]
 800168c:	223d      	movs	r2, #61	; 0x3d
 800168e:	2101      	movs	r1, #1
 8001690:	5499      	strb	r1, [r3, r2]

  return HAL_OK;
 8001692:	2300      	movs	r3, #0
}
 8001694:	0018      	movs	r0, r3
 8001696:	46bd      	mov	sp, r7
 8001698:	b002      	add	sp, #8
 800169a:	bd80      	pop	{r7, pc}

0800169c <HAL_TIM_Base_MspInit>:
  * @brief  Initializes the TIM Base MSP.
  * @param  htim TIM Base handle
  * @retval None
  */
__weak void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim)
{
 800169c:	b580      	push	{r7, lr}
 800169e:	b082      	sub	sp, #8
 80016a0:	af00      	add	r7, sp, #0
 80016a2:	6078      	str	r0, [r7, #4]
  UNUSED(htim);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_TIM_Base_MspInit could be implemented in the user file
   */
}
 80016a4:	46c0      	nop			; (mov r8, r8)
 80016a6:	46bd      	mov	sp, r7
 80016a8:	b002      	add	sp, #8
 80016aa:	bd80      	pop	{r7, pc}

080016ac <HAL_TIM_Base_Start_IT>:
  * @brief  Starts the TIM Base generation in interrupt mode.
  * @param  htim TIM Base handle
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim)
{
 80016ac:	b580      	push	{r7, lr}
 80016ae:	b084      	sub	sp, #16
 80016b0:	af00      	add	r7, sp, #0
 80016b2:	6078      	str	r0, [r7, #4]

  /* Check the parameters */
  assert_param(IS_TIM_INSTANCE(htim->Instance));

  /* Enable the TIM Update interrupt */
  __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE);
 80016b4:	687b      	ldr	r3, [r7, #4]
 80016b6:	681b      	ldr	r3, [r3, #0]
 80016b8:	68da      	ldr	r2, [r3, #12]
 80016ba:	687b      	ldr	r3, [r7, #4]
 80016bc:	681b      	ldr	r3, [r3, #0]
 80016be:	2101      	movs	r1, #1
 80016c0:	430a      	orrs	r2, r1
 80016c2:	60da      	str	r2, [r3, #12]

  /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
 80016c4:	687b      	ldr	r3, [r7, #4]
 80016c6:	681b      	ldr	r3, [r3, #0]
 80016c8:	689b      	ldr	r3, [r3, #8]
 80016ca:	2207      	movs	r2, #7
 80016cc:	4013      	ands	r3, r2
 80016ce:	60fb      	str	r3, [r7, #12]
  if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
 80016d0:	68fb      	ldr	r3, [r7, #12]
 80016d2:	2b06      	cmp	r3, #6
 80016d4:	d007      	beq.n	80016e6 <HAL_TIM_Base_Start_IT+0x3a>
  {
    __HAL_TIM_ENABLE(htim);
 80016d6:	687b      	ldr	r3, [r7, #4]
 80016d8:	681b      	ldr	r3, [r3, #0]
 80016da:	681a      	ldr	r2, [r3, #0]
 80016dc:	687b      	ldr	r3, [r7, #4]
 80016de:	681b      	ldr	r3, [r3, #0]
 80016e0:	2101      	movs	r1, #1
 80016e2:	430a      	orrs	r2, r1
 80016e4:	601a      	str	r2, [r3, #0]
  }

  /* Return function status */
  return HAL_OK;
 80016e6:	2300      	movs	r3, #0
}
 80016e8:	0018      	movs	r0, r3
 80016ea:	46bd      	mov	sp, r7
 80016ec:	b004      	add	sp, #16
 80016ee:	bd80      	pop	{r7, pc}

080016f0 <HAL_TIM_IRQHandler>:
  * @brief  This function handles TIM interrupts requests.
  * @param  htim TIM  handle
  * @retval None
  */
void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
{
 80016f0:	b580      	push	{r7, lr}
 80016f2:	b082      	sub	sp, #8
 80016f4:	af00      	add	r7, sp, #0
 80016f6:	6078      	str	r0, [r7, #4]
  /* Capture compare 1 event */
  if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
 80016f8:	687b      	ldr	r3, [r7, #4]
 80016fa:	681b      	ldr	r3, [r3, #0]
 80016fc:	691b      	ldr	r3, [r3, #16]
 80016fe:	2202      	movs	r2, #2
 8001700:	4013      	ands	r3, r2
 8001702:	2b02      	cmp	r3, #2
 8001704:	d124      	bne.n	8001750 <HAL_TIM_IRQHandler+0x60>
  {
    if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) != RESET)
 8001706:	687b      	ldr	r3, [r7, #4]
 8001708:	681b      	ldr	r3, [r3, #0]
 800170a:	68db      	ldr	r3, [r3, #12]
 800170c:	2202      	movs	r2, #2
 800170e:	4013      	ands	r3, r2
 8001710:	2b02      	cmp	r3, #2
 8001712:	d11d      	bne.n	8001750 <HAL_TIM_IRQHandler+0x60>
    {
      {
        __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1);
 8001714:	687b      	ldr	r3, [r7, #4]
 8001716:	681b      	ldr	r3, [r3, #0]
 8001718:	2203      	movs	r2, #3
 800171a:	4252      	negs	r2, r2
 800171c:	611a      	str	r2, [r3, #16]
        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
 800171e:	687b      	ldr	r3, [r7, #4]
 8001720:	2201      	movs	r2, #1
 8001722:	771a      	strb	r2, [r3, #28]

        /* Input capture event */
        if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U)
 8001724:	687b      	ldr	r3, [r7, #4]
 8001726:	681b      	ldr	r3, [r3, #0]
 8001728:	699b      	ldr	r3, [r3, #24]
 800172a:	2203      	movs	r2, #3
 800172c:	4013      	ands	r3, r2
 800172e:	d004      	beq.n	800173a <HAL_TIM_IRQHandler+0x4a>
        {
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
          htim->IC_CaptureCallback(htim);
#else
          HAL_TIM_IC_CaptureCallback(htim);
 8001730:	687b      	ldr	r3, [r7, #4]
 8001732:	0018      	movs	r0, r3
 8001734:	f000 f8fa 	bl	800192c <HAL_TIM_IC_CaptureCallback>
 8001738:	e007      	b.n	800174a <HAL_TIM_IRQHandler+0x5a>
        {
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
          htim->OC_DelayElapsedCallback(htim);
          htim->PWM_PulseFinishedCallback(htim);
#else
          HAL_TIM_OC_DelayElapsedCallback(htim);
 800173a:	687b      	ldr	r3, [r7, #4]
 800173c:	0018      	movs	r0, r3
 800173e:	f000 f8ed 	bl	800191c <HAL_TIM_OC_DelayElapsedCallback>
          HAL_TIM_PWM_PulseFinishedCallback(htim);
 8001742:	687b      	ldr	r3, [r7, #4]
 8001744:	0018      	movs	r0, r3
 8001746:	f000 f8f9 	bl	800193c <HAL_TIM_PWM_PulseFinishedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
        }
        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 800174a:	687b      	ldr	r3, [r7, #4]
 800174c:	2200      	movs	r2, #0
 800174e:	771a      	strb	r2, [r3, #28]
      }
    }
  }
  /* Capture compare 2 event */
  if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET)
 8001750:	687b      	ldr	r3, [r7, #4]
 8001752:	681b      	ldr	r3, [r3, #0]
 8001754:	691b      	ldr	r3, [r3, #16]
 8001756:	2204      	movs	r2, #4
 8001758:	4013      	ands	r3, r2
 800175a:	2b04      	cmp	r3, #4
 800175c:	d125      	bne.n	80017aa <HAL_TIM_IRQHandler+0xba>
  {
    if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) != RESET)
 800175e:	687b      	ldr	r3, [r7, #4]
 8001760:	681b      	ldr	r3, [r3, #0]
 8001762:	68db      	ldr	r3, [r3, #12]
 8001764:	2204      	movs	r2, #4
 8001766:	4013      	ands	r3, r2
 8001768:	2b04      	cmp	r3, #4
 800176a:	d11e      	bne.n	80017aa <HAL_TIM_IRQHandler+0xba>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2);
 800176c:	687b      	ldr	r3, [r7, #4]
 800176e:	681b      	ldr	r3, [r3, #0]
 8001770:	2205      	movs	r2, #5
 8001772:	4252      	negs	r2, r2
 8001774:	611a      	str	r2, [r3, #16]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
 8001776:	687b      	ldr	r3, [r7, #4]
 8001778:	2202      	movs	r2, #2
 800177a:	771a      	strb	r2, [r3, #28]
      /* Input capture event */
      if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
 800177c:	687b      	ldr	r3, [r7, #4]
 800177e:	681b      	ldr	r3, [r3, #0]
 8001780:	699a      	ldr	r2, [r3, #24]
 8001782:	23c0      	movs	r3, #192	; 0xc0
 8001784:	009b      	lsls	r3, r3, #2
 8001786:	4013      	ands	r3, r2
 8001788:	d004      	beq.n	8001794 <HAL_TIM_IRQHandler+0xa4>
      {
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
        htim->IC_CaptureCallback(htim);
#else
        HAL_TIM_IC_CaptureCallback(htim);
 800178a:	687b      	ldr	r3, [r7, #4]
 800178c:	0018      	movs	r0, r3
 800178e:	f000 f8cd 	bl	800192c <HAL_TIM_IC_CaptureCallback>
 8001792:	e007      	b.n	80017a4 <HAL_TIM_IRQHandler+0xb4>
      {
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
        htim->OC_DelayElapsedCallback(htim);
        htim->PWM_PulseFinishedCallback(htim);
#else
        HAL_TIM_OC_DelayElapsedCallback(htim);
 8001794:	687b      	ldr	r3, [r7, #4]
 8001796:	0018      	movs	r0, r3
 8001798:	f000 f8c0 	bl	800191c <HAL_TIM_OC_DelayElapsedCallback>
        HAL_TIM_PWM_PulseFinishedCallback(htim);
 800179c:	687b      	ldr	r3, [r7, #4]
 800179e:	0018      	movs	r0, r3
 80017a0:	f000 f8cc 	bl	800193c <HAL_TIM_PWM_PulseFinishedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
      }
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 80017a4:	687b      	ldr	r3, [r7, #4]
 80017a6:	2200      	movs	r2, #0
 80017a8:	771a      	strb	r2, [r3, #28]
    }
  }
  /* Capture compare 3 event */
  if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET)
 80017aa:	687b      	ldr	r3, [r7, #4]
 80017ac:	681b      	ldr	r3, [r3, #0]
 80017ae:	691b      	ldr	r3, [r3, #16]
 80017b0:	2208      	movs	r2, #8
 80017b2:	4013      	ands	r3, r2
 80017b4:	2b08      	cmp	r3, #8
 80017b6:	d124      	bne.n	8001802 <HAL_TIM_IRQHandler+0x112>
  {
    if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) != RESET)
 80017b8:	687b      	ldr	r3, [r7, #4]
 80017ba:	681b      	ldr	r3, [r3, #0]
 80017bc:	68db      	ldr	r3, [r3, #12]
 80017be:	2208      	movs	r2, #8
 80017c0:	4013      	ands	r3, r2
 80017c2:	2b08      	cmp	r3, #8
 80017c4:	d11d      	bne.n	8001802 <HAL_TIM_IRQHandler+0x112>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3);
 80017c6:	687b      	ldr	r3, [r7, #4]
 80017c8:	681b      	ldr	r3, [r3, #0]
 80017ca:	2209      	movs	r2, #9
 80017cc:	4252      	negs	r2, r2
 80017ce:	611a      	str	r2, [r3, #16]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
 80017d0:	687b      	ldr	r3, [r7, #4]
 80017d2:	2204      	movs	r2, #4
 80017d4:	771a      	strb	r2, [r3, #28]
      /* Input capture event */
      if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
 80017d6:	687b      	ldr	r3, [r7, #4]
 80017d8:	681b      	ldr	r3, [r3, #0]
 80017da:	69db      	ldr	r3, [r3, #28]
 80017dc:	2203      	movs	r2, #3
 80017de:	4013      	ands	r3, r2
 80017e0:	d004      	beq.n	80017ec <HAL_TIM_IRQHandler+0xfc>
      {
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
        htim->IC_CaptureCallback(htim);
#else
        HAL_TIM_IC_CaptureCallback(htim);
 80017e2:	687b      	ldr	r3, [r7, #4]
 80017e4:	0018      	movs	r0, r3
 80017e6:	f000 f8a1 	bl	800192c <HAL_TIM_IC_CaptureCallback>
 80017ea:	e007      	b.n	80017fc <HAL_TIM_IRQHandler+0x10c>
      {
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
        htim->OC_DelayElapsedCallback(htim);
        htim->PWM_PulseFinishedCallback(htim);
#else
        HAL_TIM_OC_DelayElapsedCallback(htim);
 80017ec:	687b      	ldr	r3, [r7, #4]
 80017ee:	0018      	movs	r0, r3
 80017f0:	f000 f894 	bl	800191c <HAL_TIM_OC_DelayElapsedCallback>
        HAL_TIM_PWM_PulseFinishedCallback(htim);
 80017f4:	687b      	ldr	r3, [r7, #4]
 80017f6:	0018      	movs	r0, r3
 80017f8:	f000 f8a0 	bl	800193c <HAL_TIM_PWM_PulseFinishedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
      }
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 80017fc:	687b      	ldr	r3, [r7, #4]
 80017fe:	2200      	movs	r2, #0
 8001800:	771a      	strb	r2, [r3, #28]
    }
  }
  /* Capture compare 4 event */
  if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET)
 8001802:	687b      	ldr	r3, [r7, #4]
 8001804:	681b      	ldr	r3, [r3, #0]
 8001806:	691b      	ldr	r3, [r3, #16]
 8001808:	2210      	movs	r2, #16
 800180a:	4013      	ands	r3, r2
 800180c:	2b10      	cmp	r3, #16
 800180e:	d125      	bne.n	800185c <HAL_TIM_IRQHandler+0x16c>
  {
    if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) != RESET)
 8001810:	687b      	ldr	r3, [r7, #4]
 8001812:	681b      	ldr	r3, [r3, #0]
 8001814:	68db      	ldr	r3, [r3, #12]
 8001816:	2210      	movs	r2, #16
 8001818:	4013      	ands	r3, r2
 800181a:	2b10      	cmp	r3, #16
 800181c:	d11e      	bne.n	800185c <HAL_TIM_IRQHandler+0x16c>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4);
 800181e:	687b      	ldr	r3, [r7, #4]
 8001820:	681b      	ldr	r3, [r3, #0]
 8001822:	2211      	movs	r2, #17
 8001824:	4252      	negs	r2, r2
 8001826:	611a      	str	r2, [r3, #16]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
 8001828:	687b      	ldr	r3, [r7, #4]
 800182a:	2208      	movs	r2, #8
 800182c:	771a      	strb	r2, [r3, #28]
      /* Input capture event */
      if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
 800182e:	687b      	ldr	r3, [r7, #4]
 8001830:	681b      	ldr	r3, [r3, #0]
 8001832:	69da      	ldr	r2, [r3, #28]
 8001834:	23c0      	movs	r3, #192	; 0xc0
 8001836:	009b      	lsls	r3, r3, #2
 8001838:	4013      	ands	r3, r2
 800183a:	d004      	beq.n	8001846 <HAL_TIM_IRQHandler+0x156>
      {
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
        htim->IC_CaptureCallback(htim);
#else
        HAL_TIM_IC_CaptureCallback(htim);
 800183c:	687b      	ldr	r3, [r7, #4]
 800183e:	0018      	movs	r0, r3
 8001840:	f000 f874 	bl	800192c <HAL_TIM_IC_CaptureCallback>
 8001844:	e007      	b.n	8001856 <HAL_TIM_IRQHandler+0x166>
      {
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
        htim->OC_DelayElapsedCallback(htim);
        htim->PWM_PulseFinishedCallback(htim);
#else
        HAL_TIM_OC_DelayElapsedCallback(htim);
 8001846:	687b      	ldr	r3, [r7, #4]
 8001848:	0018      	movs	r0, r3
 800184a:	f000 f867 	bl	800191c <HAL_TIM_OC_DelayElapsedCallback>
        HAL_TIM_PWM_PulseFinishedCallback(htim);
 800184e:	687b      	ldr	r3, [r7, #4]
 8001850:	0018      	movs	r0, r3
 8001852:	f000 f873 	bl	800193c <HAL_TIM_PWM_PulseFinishedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
      }
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 8001856:	687b      	ldr	r3, [r7, #4]
 8001858:	2200      	movs	r2, #0
 800185a:	771a      	strb	r2, [r3, #28]
    }
  }
  /* TIM Update event */
  if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET)
 800185c:	687b      	ldr	r3, [r7, #4]
 800185e:	681b      	ldr	r3, [r3, #0]
 8001860:	691b      	ldr	r3, [r3, #16]
 8001862:	2201      	movs	r2, #1
 8001864:	4013      	ands	r3, r2
 8001866:	2b01      	cmp	r3, #1
 8001868:	d10f      	bne.n	800188a <HAL_TIM_IRQHandler+0x19a>
  {
    if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) != RESET)
 800186a:	687b      	ldr	r3, [r7, #4]
 800186c:	681b      	ldr	r3, [r3, #0]
 800186e:	68db      	ldr	r3, [r3, #12]
 8001870:	2201      	movs	r2, #1
 8001872:	4013      	ands	r3, r2
 8001874:	2b01      	cmp	r3, #1
 8001876:	d108      	bne.n	800188a <HAL_TIM_IRQHandler+0x19a>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE);
 8001878:	687b      	ldr	r3, [r7, #4]
 800187a:	681b      	ldr	r3, [r3, #0]
 800187c:	2202      	movs	r2, #2
 800187e:	4252      	negs	r2, r2
 8001880:	611a      	str	r2, [r3, #16]
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
      htim->PeriodElapsedCallback(htim);
#else
      HAL_TIM_PeriodElapsedCallback(htim);
 8001882:	687b      	ldr	r3, [r7, #4]
 8001884:	0018      	movs	r0, r3
 8001886:	f7fe fed9 	bl	800063c <HAL_TIM_PeriodElapsedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
    }
  }
  /* TIM Break input event */
  if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET)
 800188a:	687b      	ldr	r3, [r7, #4]
 800188c:	681b      	ldr	r3, [r3, #0]
 800188e:	691b      	ldr	r3, [r3, #16]
 8001890:	2280      	movs	r2, #128	; 0x80
 8001892:	4013      	ands	r3, r2
 8001894:	2b80      	cmp	r3, #128	; 0x80
 8001896:	d10f      	bne.n	80018b8 <HAL_TIM_IRQHandler+0x1c8>
  {
    if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) != RESET)
 8001898:	687b      	ldr	r3, [r7, #4]
 800189a:	681b      	ldr	r3, [r3, #0]
 800189c:	68db      	ldr	r3, [r3, #12]
 800189e:	2280      	movs	r2, #128	; 0x80
 80018a0:	4013      	ands	r3, r2
 80018a2:	2b80      	cmp	r3, #128	; 0x80
 80018a4:	d108      	bne.n	80018b8 <HAL_TIM_IRQHandler+0x1c8>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK);
 80018a6:	687b      	ldr	r3, [r7, #4]
 80018a8:	681b      	ldr	r3, [r3, #0]
 80018aa:	2281      	movs	r2, #129	; 0x81
 80018ac:	4252      	negs	r2, r2
 80018ae:	611a      	str	r2, [r3, #16]
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
      htim->BreakCallback(htim);
#else
      HAL_TIMEx_BreakCallback(htim);
 80018b0:	687b      	ldr	r3, [r7, #4]
 80018b2:	0018      	movs	r0, r3
 80018b4:	f000 f8d0 	bl	8001a58 <HAL_TIMEx_BreakCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
    }
  }
  /* TIM Trigger detection event */
  if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET)
 80018b8:	687b      	ldr	r3, [r7, #4]
 80018ba:	681b      	ldr	r3, [r3, #0]
 80018bc:	691b      	ldr	r3, [r3, #16]
 80018be:	2240      	movs	r2, #64	; 0x40
 80018c0:	4013      	ands	r3, r2
 80018c2:	2b40      	cmp	r3, #64	; 0x40
 80018c4:	d10f      	bne.n	80018e6 <HAL_TIM_IRQHandler+0x1f6>
  {
    if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) != RESET)
 80018c6:	687b      	ldr	r3, [r7, #4]
 80018c8:	681b      	ldr	r3, [r3, #0]
 80018ca:	68db      	ldr	r3, [r3, #12]
 80018cc:	2240      	movs	r2, #64	; 0x40
 80018ce:	4013      	ands	r3, r2
 80018d0:	2b40      	cmp	r3, #64	; 0x40
 80018d2:	d108      	bne.n	80018e6 <HAL_TIM_IRQHandler+0x1f6>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER);
 80018d4:	687b      	ldr	r3, [r7, #4]
 80018d6:	681b      	ldr	r3, [r3, #0]
 80018d8:	2241      	movs	r2, #65	; 0x41
 80018da:	4252      	negs	r2, r2
 80018dc:	611a      	str	r2, [r3, #16]
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
      htim->TriggerCallback(htim);
#else
      HAL_TIM_TriggerCallback(htim);
 80018de:	687b      	ldr	r3, [r7, #4]
 80018e0:	0018      	movs	r0, r3
 80018e2:	f000 f833 	bl	800194c <HAL_TIM_TriggerCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
    }
  }
  /* TIM commutation event */
  if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET)
 80018e6:	687b      	ldr	r3, [r7, #4]
 80018e8:	681b      	ldr	r3, [r3, #0]
 80018ea:	691b      	ldr	r3, [r3, #16]
 80018ec:	2220      	movs	r2, #32
 80018ee:	4013      	ands	r3, r2
 80018f0:	2b20      	cmp	r3, #32
 80018f2:	d10f      	bne.n	8001914 <HAL_TIM_IRQHandler+0x224>
  {
    if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) != RESET)
 80018f4:	687b      	ldr	r3, [r7, #4]
 80018f6:	681b      	ldr	r3, [r3, #0]
 80018f8:	68db      	ldr	r3, [r3, #12]
 80018fa:	2220      	movs	r2, #32
 80018fc:	4013      	ands	r3, r2
 80018fe:	2b20      	cmp	r3, #32
 8001900:	d108      	bne.n	8001914 <HAL_TIM_IRQHandler+0x224>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM);
 8001902:	687b      	ldr	r3, [r7, #4]
 8001904:	681b      	ldr	r3, [r3, #0]
 8001906:	2221      	movs	r2, #33	; 0x21
 8001908:	4252      	negs	r2, r2
 800190a:	611a      	str	r2, [r3, #16]
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
      htim->CommutationCallback(htim);
#else
      HAL_TIMEx_CommutCallback(htim);
 800190c:	687b      	ldr	r3, [r7, #4]
 800190e:	0018      	movs	r0, r3
 8001910:	f000 f89a 	bl	8001a48 <HAL_TIMEx_CommutCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
    }
  }
}
 8001914:	46c0      	nop			; (mov r8, r8)
 8001916:	46bd      	mov	sp, r7
 8001918:	b002      	add	sp, #8
 800191a:	bd80      	pop	{r7, pc}

0800191c <HAL_TIM_OC_DelayElapsedCallback>:
  * @brief  Output Compare callback in non-blocking mode
  * @param  htim TIM OC handle
  * @retval None
  */
__weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim)
{
 800191c:	b580      	push	{r7, lr}
 800191e:	b082      	sub	sp, #8
 8001920:	af00      	add	r7, sp, #0
 8001922:	6078      	str	r0, [r7, #4]
  UNUSED(htim);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file
   */
}
 8001924:	46c0      	nop			; (mov r8, r8)
 8001926:	46bd      	mov	sp, r7
 8001928:	b002      	add	sp, #8
 800192a:	bd80      	pop	{r7, pc}

0800192c <HAL_TIM_IC_CaptureCallback>:
  * @brief  Input Capture callback in non-blocking mode
  * @param  htim TIM IC handle
  * @retval None
  */
__weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim)
{
 800192c:	b580      	push	{r7, lr}
 800192e:	b082      	sub	sp, #8
 8001930:	af00      	add	r7, sp, #0
 8001932:	6078      	str	r0, [r7, #4]
  UNUSED(htim);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_TIM_IC_CaptureCallback could be implemented in the user file
   */
}
 8001934:	46c0      	nop			; (mov r8, r8)
 8001936:	46bd      	mov	sp, r7
 8001938:	b002      	add	sp, #8
 800193a:	bd80      	pop	{r7, pc}

0800193c <HAL_TIM_PWM_PulseFinishedCallback>:
  * @brief  PWM Pulse finished callback in non-blocking mode
  * @param  htim TIM handle
  * @retval None
  */
__weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim)
{
 800193c:	b580      	push	{r7, lr}
 800193e:	b082      	sub	sp, #8
 8001940:	af00      	add	r7, sp, #0
 8001942:	6078      	str	r0, [r7, #4]
  UNUSED(htim);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file
   */
}
 8001944:	46c0      	nop			; (mov r8, r8)
 8001946:	46bd      	mov	sp, r7
 8001948:	b002      	add	sp, #8
 800194a:	bd80      	pop	{r7, pc}

0800194c <HAL_TIM_TriggerCallback>:
  * @brief  Hall Trigger detection callback in non-blocking mode
  * @param  htim TIM handle
  * @retval None
  */
__weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim)
{
 800194c:	b580      	push	{r7, lr}
 800194e:	b082      	sub	sp, #8
 8001950:	af00      	add	r7, sp, #0
 8001952:	6078      	str	r0, [r7, #4]
  UNUSED(htim);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_TIM_TriggerCallback could be implemented in the user file
   */
}
 8001954:	46c0      	nop			; (mov r8, r8)
 8001956:	46bd      	mov	sp, r7
 8001958:	b002      	add	sp, #8
 800195a:	bd80      	pop	{r7, pc}

0800195c <TIM_Base_SetConfig>:
  * @param  TIMx TIM peripheral
  * @param  Structure TIM Base configuration structure
  * @retval None
  */
void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure)
{
 800195c:	b580      	push	{r7, lr}
 800195e:	b084      	sub	sp, #16
 8001960:	af00      	add	r7, sp, #0
 8001962:	6078      	str	r0, [r7, #4]
 8001964:	6039      	str	r1, [r7, #0]
  uint32_t tmpcr1;
  tmpcr1 = TIMx->CR1;
 8001966:	687b      	ldr	r3, [r7, #4]
 8001968:	681b      	ldr	r3, [r3, #0]
 800196a:	60fb      	str	r3, [r7, #12]

  /* Set TIM Time Base Unit parameters ---------------------------------------*/
  if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
 800196c:	687b      	ldr	r3, [r7, #4]
 800196e:	4a2f      	ldr	r2, [pc, #188]	; (8001a2c <TIM_Base_SetConfig+0xd0>)
 8001970:	4293      	cmp	r3, r2
 8001972:	d003      	beq.n	800197c <TIM_Base_SetConfig+0x20>
 8001974:	687b      	ldr	r3, [r7, #4]
 8001976:	4a2e      	ldr	r2, [pc, #184]	; (8001a30 <TIM_Base_SetConfig+0xd4>)
 8001978:	4293      	cmp	r3, r2
 800197a:	d108      	bne.n	800198e <TIM_Base_SetConfig+0x32>
  {
    /* Select the Counter Mode */
    tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
 800197c:	68fb      	ldr	r3, [r7, #12]
 800197e:	2270      	movs	r2, #112	; 0x70
 8001980:	4393      	bics	r3, r2
 8001982:	60fb      	str	r3, [r7, #12]
    tmpcr1 |= Structure->CounterMode;
 8001984:	683b      	ldr	r3, [r7, #0]
 8001986:	685b      	ldr	r3, [r3, #4]
 8001988:	68fa      	ldr	r2, [r7, #12]
 800198a:	4313      	orrs	r3, r2
 800198c:	60fb      	str	r3, [r7, #12]
  }

  if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
 800198e:	687b      	ldr	r3, [r7, #4]
 8001990:	4a26      	ldr	r2, [pc, #152]	; (8001a2c <TIM_Base_SetConfig+0xd0>)
 8001992:	4293      	cmp	r3, r2
 8001994:	d013      	beq.n	80019be <TIM_Base_SetConfig+0x62>
 8001996:	687b      	ldr	r3, [r7, #4]
 8001998:	4a25      	ldr	r2, [pc, #148]	; (8001a30 <TIM_Base_SetConfig+0xd4>)
 800199a:	4293      	cmp	r3, r2
 800199c:	d00f      	beq.n	80019be <TIM_Base_SetConfig+0x62>
 800199e:	687b      	ldr	r3, [r7, #4]
 80019a0:	4a24      	ldr	r2, [pc, #144]	; (8001a34 <TIM_Base_SetConfig+0xd8>)
 80019a2:	4293      	cmp	r3, r2
 80019a4:	d00b      	beq.n	80019be <TIM_Base_SetConfig+0x62>
 80019a6:	687b      	ldr	r3, [r7, #4]
 80019a8:	4a23      	ldr	r2, [pc, #140]	; (8001a38 <TIM_Base_SetConfig+0xdc>)
 80019aa:	4293      	cmp	r3, r2
 80019ac:	d007      	beq.n	80019be <TIM_Base_SetConfig+0x62>
 80019ae:	687b      	ldr	r3, [r7, #4]
 80019b0:	4a22      	ldr	r2, [pc, #136]	; (8001a3c <TIM_Base_SetConfig+0xe0>)
 80019b2:	4293      	cmp	r3, r2
 80019b4:	d003      	beq.n	80019be <TIM_Base_SetConfig+0x62>
 80019b6:	687b      	ldr	r3, [r7, #4]
 80019b8:	4a21      	ldr	r2, [pc, #132]	; (8001a40 <TIM_Base_SetConfig+0xe4>)
 80019ba:	4293      	cmp	r3, r2
 80019bc:	d108      	bne.n	80019d0 <TIM_Base_SetConfig+0x74>
  {
    /* Set the clock division */
    tmpcr1 &= ~TIM_CR1_CKD;
 80019be:	68fb      	ldr	r3, [r7, #12]
 80019c0:	4a20      	ldr	r2, [pc, #128]	; (8001a44 <TIM_Base_SetConfig+0xe8>)
 80019c2:	4013      	ands	r3, r2
 80019c4:	60fb      	str	r3, [r7, #12]
    tmpcr1 |= (uint32_t)Structure->ClockDivision;
 80019c6:	683b      	ldr	r3, [r7, #0]
 80019c8:	68db      	ldr	r3, [r3, #12]
 80019ca:	68fa      	ldr	r2, [r7, #12]
 80019cc:	4313      	orrs	r3, r2
 80019ce:	60fb      	str	r3, [r7, #12]
  }

  /* Set the auto-reload preload */
  MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload);
 80019d0:	68fb      	ldr	r3, [r7, #12]
 80019d2:	2280      	movs	r2, #128	; 0x80
 80019d4:	4393      	bics	r3, r2
 80019d6:	001a      	movs	r2, r3
 80019d8:	683b      	ldr	r3, [r7, #0]
 80019da:	695b      	ldr	r3, [r3, #20]
 80019dc:	4313      	orrs	r3, r2
 80019de:	60fb      	str	r3, [r7, #12]

  TIMx->CR1 = tmpcr1;
 80019e0:	687b      	ldr	r3, [r7, #4]
 80019e2:	68fa      	ldr	r2, [r7, #12]
 80019e4:	601a      	str	r2, [r3, #0]

  /* Set the Autoreload value */
  TIMx->ARR = (uint32_t)Structure->Period ;
 80019e6:	683b      	ldr	r3, [r7, #0]
 80019e8:	689a      	ldr	r2, [r3, #8]
 80019ea:	687b      	ldr	r3, [r7, #4]
 80019ec:	62da      	str	r2, [r3, #44]	; 0x2c

  /* Set the Prescaler value */
  TIMx->PSC = Structure->Prescaler;
 80019ee:	683b      	ldr	r3, [r7, #0]
 80019f0:	681a      	ldr	r2, [r3, #0]
 80019f2:	687b      	ldr	r3, [r7, #4]
 80019f4:	629a      	str	r2, [r3, #40]	; 0x28

  if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx))
 80019f6:	687b      	ldr	r3, [r7, #4]
 80019f8:	4a0c      	ldr	r2, [pc, #48]	; (8001a2c <TIM_Base_SetConfig+0xd0>)
 80019fa:	4293      	cmp	r3, r2
 80019fc:	d00b      	beq.n	8001a16 <TIM_Base_SetConfig+0xba>
 80019fe:	687b      	ldr	r3, [r7, #4]
 8001a00:	4a0d      	ldr	r2, [pc, #52]	; (8001a38 <TIM_Base_SetConfig+0xdc>)
 8001a02:	4293      	cmp	r3, r2
 8001a04:	d007      	beq.n	8001a16 <TIM_Base_SetConfig+0xba>
 8001a06:	687b      	ldr	r3, [r7, #4]
 8001a08:	4a0c      	ldr	r2, [pc, #48]	; (8001a3c <TIM_Base_SetConfig+0xe0>)
 8001a0a:	4293      	cmp	r3, r2
 8001a0c:	d003      	beq.n	8001a16 <TIM_Base_SetConfig+0xba>
 8001a0e:	687b      	ldr	r3, [r7, #4]
 8001a10:	4a0b      	ldr	r2, [pc, #44]	; (8001a40 <TIM_Base_SetConfig+0xe4>)
 8001a12:	4293      	cmp	r3, r2
 8001a14:	d103      	bne.n	8001a1e <TIM_Base_SetConfig+0xc2>
  {
    /* Set the Repetition Counter value */
    TIMx->RCR = Structure->RepetitionCounter;
 8001a16:	683b      	ldr	r3, [r7, #0]
 8001a18:	691a      	ldr	r2, [r3, #16]
 8001a1a:	687b      	ldr	r3, [r7, #4]
 8001a1c:	631a      	str	r2, [r3, #48]	; 0x30
  }

  /* Generate an update event to reload the Prescaler
     and the repetition counter (only for advanced timer) value immediately */
  TIMx->EGR = TIM_EGR_UG;
 8001a1e:	687b      	ldr	r3, [r7, #4]
 8001a20:	2201      	movs	r2, #1
 8001a22:	615a      	str	r2, [r3, #20]
}
 8001a24:	46c0      	nop			; (mov r8, r8)
 8001a26:	46bd      	mov	sp, r7
 8001a28:	b004      	add	sp, #16
 8001a2a:	bd80      	pop	{r7, pc}
 8001a2c:	40012c00 	.word	0x40012c00
 8001a30:	40000400 	.word	0x40000400
 8001a34:	40002000 	.word	0x40002000
 8001a38:	40014000 	.word	0x40014000
 8001a3c:	40014400 	.word	0x40014400
 8001a40:	40014800 	.word	0x40014800
 8001a44:	fffffcff 	.word	0xfffffcff

08001a48 <HAL_TIMEx_CommutCallback>:
  * @brief  Hall commutation changed callback in non-blocking mode
  * @param  htim TIM handle
  * @retval None
  */
__weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim)
{
 8001a48:	b580      	push	{r7, lr}
 8001a4a:	b082      	sub	sp, #8
 8001a4c:	af00      	add	r7, sp, #0
 8001a4e:	6078      	str	r0, [r7, #4]
  UNUSED(htim);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_TIMEx_CommutCallback could be implemented in the user file
   */
}
 8001a50:	46c0      	nop			; (mov r8, r8)
 8001a52:	46bd      	mov	sp, r7
 8001a54:	b002      	add	sp, #8
 8001a56:	bd80      	pop	{r7, pc}

08001a58 <HAL_TIMEx_BreakCallback>:
  * @brief  Hall Break detection callback in non-blocking mode
  * @param  htim TIM handle
  * @retval None
  */
__weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
{
 8001a58:	b580      	push	{r7, lr}
 8001a5a:	b082      	sub	sp, #8
 8001a5c:	af00      	add	r7, sp, #0
 8001a5e:	6078      	str	r0, [r7, #4]
  UNUSED(htim);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_TIMEx_BreakCallback could be implemented in the user file
   */
}
 8001a60:	46c0      	nop			; (mov r8, r8)
 8001a62:	46bd      	mov	sp, r7
 8001a64:	b002      	add	sp, #8
 8001a66:	bd80      	pop	{r7, pc}

08001a68 <osKernelInitialize>:
}
#endif /* SysTick */

/*---------------------------------------------------------------------------*/

osStatus_t osKernelInitialize (void) {
 8001a68:	b580      	push	{r7, lr}
 8001a6a:	b084      	sub	sp, #16
 8001a6c:	af00      	add	r7, sp, #0
 */
__STATIC_FORCEINLINE uint32_t __get_IPSR(void)
{
  uint32_t result;

  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8001a6e:	f3ef 8305 	mrs	r3, IPSR
 8001a72:	60bb      	str	r3, [r7, #8]
  return(result);
 8001a74:	68bb      	ldr	r3, [r7, #8]
  osStatus_t stat;

  if (IS_IRQ()) {
 8001a76:	2b00      	cmp	r3, #0
 8001a78:	d109      	bne.n	8001a8e <osKernelInitialize+0x26>
 */
__STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)
{
  uint32_t result;

  __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
 8001a7a:	f3ef 8310 	mrs	r3, PRIMASK
 8001a7e:	607b      	str	r3, [r7, #4]
  return(result);
 8001a80:	687b      	ldr	r3, [r7, #4]
 8001a82:	2b00      	cmp	r3, #0
 8001a84:	d007      	beq.n	8001a96 <osKernelInitialize+0x2e>
 8001a86:	4b0d      	ldr	r3, [pc, #52]	; (8001abc <osKernelInitialize+0x54>)
 8001a88:	681b      	ldr	r3, [r3, #0]
 8001a8a:	2b02      	cmp	r3, #2
 8001a8c:	d103      	bne.n	8001a96 <osKernelInitialize+0x2e>
    stat = osErrorISR;
 8001a8e:	2306      	movs	r3, #6
 8001a90:	425b      	negs	r3, r3
 8001a92:	60fb      	str	r3, [r7, #12]
 8001a94:	e00c      	b.n	8001ab0 <osKernelInitialize+0x48>
  }
  else {
    if (KernelState == osKernelInactive) {
 8001a96:	4b09      	ldr	r3, [pc, #36]	; (8001abc <osKernelInitialize+0x54>)
 8001a98:	681b      	ldr	r3, [r3, #0]
 8001a9a:	2b00      	cmp	r3, #0
 8001a9c:	d105      	bne.n	8001aaa <osKernelInitialize+0x42>
      #if defined(USE_FreeRTOS_HEAP_5)
        vPortDefineHeapRegions (xHeapRegions);
      #endif
      KernelState = osKernelReady;
 8001a9e:	4b07      	ldr	r3, [pc, #28]	; (8001abc <osKernelInitialize+0x54>)
 8001aa0:	2201      	movs	r2, #1
 8001aa2:	601a      	str	r2, [r3, #0]
      stat = osOK;
 8001aa4:	2300      	movs	r3, #0
 8001aa6:	60fb      	str	r3, [r7, #12]
 8001aa8:	e002      	b.n	8001ab0 <osKernelInitialize+0x48>
    } else {
      stat = osError;
 8001aaa:	2301      	movs	r3, #1
 8001aac:	425b      	negs	r3, r3
 8001aae:	60fb      	str	r3, [r7, #12]
    }
  }

  return (stat);
 8001ab0:	68fb      	ldr	r3, [r7, #12]
}
 8001ab2:	0018      	movs	r0, r3
 8001ab4:	46bd      	mov	sp, r7
 8001ab6:	b004      	add	sp, #16
 8001ab8:	bd80      	pop	{r7, pc}
 8001aba:	46c0      	nop			; (mov r8, r8)
 8001abc:	20000030 	.word	0x20000030

08001ac0 <osKernelStart>:
  }

  return (state);
}

osStatus_t osKernelStart (void) {
 8001ac0:	b580      	push	{r7, lr}
 8001ac2:	b084      	sub	sp, #16
 8001ac4:	af00      	add	r7, sp, #0
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8001ac6:	f3ef 8305 	mrs	r3, IPSR
 8001aca:	60bb      	str	r3, [r7, #8]
  return(result);
 8001acc:	68bb      	ldr	r3, [r7, #8]
  osStatus_t stat;

  if (IS_IRQ()) {
 8001ace:	2b00      	cmp	r3, #0
 8001ad0:	d109      	bne.n	8001ae6 <osKernelStart+0x26>
  __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
 8001ad2:	f3ef 8310 	mrs	r3, PRIMASK
 8001ad6:	607b      	str	r3, [r7, #4]
  return(result);
 8001ad8:	687b      	ldr	r3, [r7, #4]
 8001ada:	2b00      	cmp	r3, #0
 8001adc:	d007      	beq.n	8001aee <osKernelStart+0x2e>
 8001ade:	4b0e      	ldr	r3, [pc, #56]	; (8001b18 <osKernelStart+0x58>)
 8001ae0:	681b      	ldr	r3, [r3, #0]
 8001ae2:	2b02      	cmp	r3, #2
 8001ae4:	d103      	bne.n	8001aee <osKernelStart+0x2e>
    stat = osErrorISR;
 8001ae6:	2306      	movs	r3, #6
 8001ae8:	425b      	negs	r3, r3
 8001aea:	60fb      	str	r3, [r7, #12]
 8001aec:	e00e      	b.n	8001b0c <osKernelStart+0x4c>
  }
  else {
    if (KernelState == osKernelReady) {
 8001aee:	4b0a      	ldr	r3, [pc, #40]	; (8001b18 <osKernelStart+0x58>)
 8001af0:	681b      	ldr	r3, [r3, #0]
 8001af2:	2b01      	cmp	r3, #1
 8001af4:	d107      	bne.n	8001b06 <osKernelStart+0x46>
      KernelState = osKernelRunning;
 8001af6:	4b08      	ldr	r3, [pc, #32]	; (8001b18 <osKernelStart+0x58>)
 8001af8:	2202      	movs	r2, #2
 8001afa:	601a      	str	r2, [r3, #0]
      vTaskStartScheduler();
 8001afc:	f000 ff7e 	bl	80029fc <vTaskStartScheduler>
      stat = osOK;
 8001b00:	2300      	movs	r3, #0
 8001b02:	60fb      	str	r3, [r7, #12]
 8001b04:	e002      	b.n	8001b0c <osKernelStart+0x4c>
    } else {
      stat = osError;
 8001b06:	2301      	movs	r3, #1
 8001b08:	425b      	negs	r3, r3
 8001b0a:	60fb      	str	r3, [r7, #12]
    }
  }

  return (stat);
 8001b0c:	68fb      	ldr	r3, [r7, #12]
}
 8001b0e:	0018      	movs	r0, r3
 8001b10:	46bd      	mov	sp, r7
 8001b12:	b004      	add	sp, #16
 8001b14:	bd80      	pop	{r7, pc}
 8001b16:	46c0      	nop			; (mov r8, r8)
 8001b18:	20000030 	.word	0x20000030

08001b1c <osThreadNew>:
  return (configCPU_CLOCK_HZ);
}

/*---------------------------------------------------------------------------*/

osThreadId_t osThreadNew (osThreadFunc_t func, void *argument, const osThreadAttr_t *attr) {
 8001b1c:	b5b0      	push	{r4, r5, r7, lr}
 8001b1e:	b090      	sub	sp, #64	; 0x40
 8001b20:	af04      	add	r7, sp, #16
 8001b22:	60f8      	str	r0, [r7, #12]
 8001b24:	60b9      	str	r1, [r7, #8]
 8001b26:	607a      	str	r2, [r7, #4]
  uint32_t stack;
  TaskHandle_t hTask;
  UBaseType_t prio;
  int32_t mem;

  hTask = NULL;
 8001b28:	2300      	movs	r3, #0
 8001b2a:	613b      	str	r3, [r7, #16]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8001b2c:	f3ef 8305 	mrs	r3, IPSR
 8001b30:	61fb      	str	r3, [r7, #28]
  return(result);
 8001b32:	69fb      	ldr	r3, [r7, #28]

  if (!IS_IRQ() && (func != NULL)) {
 8001b34:	2b00      	cmp	r3, #0
 8001b36:	d000      	beq.n	8001b3a <osThreadNew+0x1e>
 8001b38:	e090      	b.n	8001c5c <osThreadNew+0x140>
  __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
 8001b3a:	f3ef 8310 	mrs	r3, PRIMASK
 8001b3e:	61bb      	str	r3, [r7, #24]
  return(result);
 8001b40:	69bb      	ldr	r3, [r7, #24]
 8001b42:	2b00      	cmp	r3, #0
 8001b44:	d004      	beq.n	8001b50 <osThreadNew+0x34>
 8001b46:	4b48      	ldr	r3, [pc, #288]	; (8001c68 <osThreadNew+0x14c>)
 8001b48:	681b      	ldr	r3, [r3, #0]
 8001b4a:	2b02      	cmp	r3, #2
 8001b4c:	d100      	bne.n	8001b50 <osThreadNew+0x34>
 8001b4e:	e085      	b.n	8001c5c <osThreadNew+0x140>
 8001b50:	68fb      	ldr	r3, [r7, #12]
 8001b52:	2b00      	cmp	r3, #0
 8001b54:	d100      	bne.n	8001b58 <osThreadNew+0x3c>
 8001b56:	e081      	b.n	8001c5c <osThreadNew+0x140>
    stack = configMINIMAL_STACK_SIZE;
 8001b58:	2380      	movs	r3, #128	; 0x80
 8001b5a:	62bb      	str	r3, [r7, #40]	; 0x28
    prio  = (UBaseType_t)osPriorityNormal;
 8001b5c:	2318      	movs	r3, #24
 8001b5e:	627b      	str	r3, [r7, #36]	; 0x24

    empty = '\0';
 8001b60:	2117      	movs	r1, #23
 8001b62:	187b      	adds	r3, r7, r1
 8001b64:	2200      	movs	r2, #0
 8001b66:	701a      	strb	r2, [r3, #0]
    name  = &empty;
 8001b68:	187b      	adds	r3, r7, r1
 8001b6a:	62fb      	str	r3, [r7, #44]	; 0x2c
    mem   = -1;
 8001b6c:	2301      	movs	r3, #1
 8001b6e:	425b      	negs	r3, r3
 8001b70:	623b      	str	r3, [r7, #32]

    if (attr != NULL) {
 8001b72:	687b      	ldr	r3, [r7, #4]
 8001b74:	2b00      	cmp	r3, #0
 8001b76:	d044      	beq.n	8001c02 <osThreadNew+0xe6>
      if (attr->name != NULL) {
 8001b78:	687b      	ldr	r3, [r7, #4]
 8001b7a:	681b      	ldr	r3, [r3, #0]
 8001b7c:	2b00      	cmp	r3, #0
 8001b7e:	d002      	beq.n	8001b86 <osThreadNew+0x6a>
        name = attr->name;
 8001b80:	687b      	ldr	r3, [r7, #4]
 8001b82:	681b      	ldr	r3, [r3, #0]
 8001b84:	62fb      	str	r3, [r7, #44]	; 0x2c
      }
      if (attr->priority != osPriorityNone) {
 8001b86:	687b      	ldr	r3, [r7, #4]
 8001b88:	699b      	ldr	r3, [r3, #24]
 8001b8a:	2b00      	cmp	r3, #0
 8001b8c:	d002      	beq.n	8001b94 <osThreadNew+0x78>
        prio = (UBaseType_t)attr->priority;
 8001b8e:	687b      	ldr	r3, [r7, #4]
 8001b90:	699b      	ldr	r3, [r3, #24]
 8001b92:	627b      	str	r3, [r7, #36]	; 0x24
      }

      if ((prio < osPriorityIdle) || (prio > osPriorityISR) || ((attr->attr_bits & osThreadJoinable) == osThreadJoinable)) {
 8001b94:	6a7b      	ldr	r3, [r7, #36]	; 0x24
 8001b96:	2b00      	cmp	r3, #0
 8001b98:	d007      	beq.n	8001baa <osThreadNew+0x8e>
 8001b9a:	6a7b      	ldr	r3, [r7, #36]	; 0x24
 8001b9c:	2b38      	cmp	r3, #56	; 0x38
 8001b9e:	d804      	bhi.n	8001baa <osThreadNew+0x8e>
 8001ba0:	687b      	ldr	r3, [r7, #4]
 8001ba2:	685b      	ldr	r3, [r3, #4]
 8001ba4:	2201      	movs	r2, #1
 8001ba6:	4013      	ands	r3, r2
 8001ba8:	d001      	beq.n	8001bae <osThreadNew+0x92>
        return (NULL);
 8001baa:	2300      	movs	r3, #0
 8001bac:	e057      	b.n	8001c5e <osThreadNew+0x142>
      }

      if (attr->stack_size > 0U) {
 8001bae:	687b      	ldr	r3, [r7, #4]
 8001bb0:	695b      	ldr	r3, [r3, #20]
 8001bb2:	2b00      	cmp	r3, #0
 8001bb4:	d003      	beq.n	8001bbe <osThreadNew+0xa2>
        /* In FreeRTOS stack is not in bytes, but in sizeof(StackType_t) which is 4 on ARM ports.       */
        /* Stack size should be therefore 4 byte aligned in order to avoid division caused side effects */
        stack = attr->stack_size / sizeof(StackType_t);
 8001bb6:	687b      	ldr	r3, [r7, #4]
 8001bb8:	695b      	ldr	r3, [r3, #20]
 8001bba:	089b      	lsrs	r3, r3, #2
 8001bbc:	62bb      	str	r3, [r7, #40]	; 0x28
      }

      if ((attr->cb_mem    != NULL) && (attr->cb_size    >= sizeof(StaticTask_t)) &&
 8001bbe:	687b      	ldr	r3, [r7, #4]
 8001bc0:	689b      	ldr	r3, [r3, #8]
 8001bc2:	2b00      	cmp	r3, #0
 8001bc4:	d00e      	beq.n	8001be4 <osThreadNew+0xc8>
 8001bc6:	687b      	ldr	r3, [r7, #4]
 8001bc8:	68db      	ldr	r3, [r3, #12]
 8001bca:	2b5b      	cmp	r3, #91	; 0x5b
 8001bcc:	d90a      	bls.n	8001be4 <osThreadNew+0xc8>
          (attr->stack_mem != NULL) && (attr->stack_size >  0U)) {
 8001bce:	687b      	ldr	r3, [r7, #4]
 8001bd0:	691b      	ldr	r3, [r3, #16]
      if ((attr->cb_mem    != NULL) && (attr->cb_size    >= sizeof(StaticTask_t)) &&
 8001bd2:	2b00      	cmp	r3, #0
 8001bd4:	d006      	beq.n	8001be4 <osThreadNew+0xc8>
          (attr->stack_mem != NULL) && (attr->stack_size >  0U)) {
 8001bd6:	687b      	ldr	r3, [r7, #4]
 8001bd8:	695b      	ldr	r3, [r3, #20]
 8001bda:	2b00      	cmp	r3, #0
 8001bdc:	d002      	beq.n	8001be4 <osThreadNew+0xc8>
        mem = 1;
 8001bde:	2301      	movs	r3, #1
 8001be0:	623b      	str	r3, [r7, #32]
 8001be2:	e010      	b.n	8001c06 <osThreadNew+0xea>
      }
      else {
        if ((attr->cb_mem == NULL) && (attr->cb_size == 0U) && (attr->stack_mem == NULL)) {
 8001be4:	687b      	ldr	r3, [r7, #4]
 8001be6:	689b      	ldr	r3, [r3, #8]
 8001be8:	2b00      	cmp	r3, #0
 8001bea:	d10c      	bne.n	8001c06 <osThreadNew+0xea>
 8001bec:	687b      	ldr	r3, [r7, #4]
 8001bee:	68db      	ldr	r3, [r3, #12]
 8001bf0:	2b00      	cmp	r3, #0
 8001bf2:	d108      	bne.n	8001c06 <osThreadNew+0xea>
 8001bf4:	687b      	ldr	r3, [r7, #4]
 8001bf6:	691b      	ldr	r3, [r3, #16]
 8001bf8:	2b00      	cmp	r3, #0
 8001bfa:	d104      	bne.n	8001c06 <osThreadNew+0xea>
          mem = 0;
 8001bfc:	2300      	movs	r3, #0
 8001bfe:	623b      	str	r3, [r7, #32]
 8001c00:	e001      	b.n	8001c06 <osThreadNew+0xea>
        }
      }
    }
    else {
      mem = 0;
 8001c02:	2300      	movs	r3, #0
 8001c04:	623b      	str	r3, [r7, #32]
    }

    if (mem == 1) {
 8001c06:	6a3b      	ldr	r3, [r7, #32]
 8001c08:	2b01      	cmp	r3, #1
 8001c0a:	d112      	bne.n	8001c32 <osThreadNew+0x116>
      hTask = xTaskCreateStatic ((TaskFunction_t)func, name, stack, argument, prio, (StackType_t  *)attr->stack_mem,
 8001c0c:	687b      	ldr	r3, [r7, #4]
 8001c0e:	691a      	ldr	r2, [r3, #16]
                                                                                    (StaticTask_t *)attr->cb_mem);
 8001c10:	687b      	ldr	r3, [r7, #4]
 8001c12:	689b      	ldr	r3, [r3, #8]
      hTask = xTaskCreateStatic ((TaskFunction_t)func, name, stack, argument, prio, (StackType_t  *)attr->stack_mem,
 8001c14:	68bd      	ldr	r5, [r7, #8]
 8001c16:	6abc      	ldr	r4, [r7, #40]	; 0x28
 8001c18:	6af9      	ldr	r1, [r7, #44]	; 0x2c
 8001c1a:	68f8      	ldr	r0, [r7, #12]
 8001c1c:	9302      	str	r3, [sp, #8]
 8001c1e:	9201      	str	r2, [sp, #4]
 8001c20:	6a7b      	ldr	r3, [r7, #36]	; 0x24
 8001c22:	9300      	str	r3, [sp, #0]
 8001c24:	002b      	movs	r3, r5
 8001c26:	0022      	movs	r2, r4
 8001c28:	f000 fd49 	bl	80026be <xTaskCreateStatic>
 8001c2c:	0003      	movs	r3, r0
 8001c2e:	613b      	str	r3, [r7, #16]
 8001c30:	e014      	b.n	8001c5c <osThreadNew+0x140>
    }
    else {
      if (mem == 0) {
 8001c32:	6a3b      	ldr	r3, [r7, #32]
 8001c34:	2b00      	cmp	r3, #0
 8001c36:	d111      	bne.n	8001c5c <osThreadNew+0x140>
        if (xTaskCreate ((TaskFunction_t)func, name, (uint16_t)stack, argument, prio, &hTask) != pdPASS) {
 8001c38:	6abb      	ldr	r3, [r7, #40]	; 0x28
 8001c3a:	b29a      	uxth	r2, r3
 8001c3c:	68bc      	ldr	r4, [r7, #8]
 8001c3e:	6af9      	ldr	r1, [r7, #44]	; 0x2c
 8001c40:	68f8      	ldr	r0, [r7, #12]
 8001c42:	2310      	movs	r3, #16
 8001c44:	18fb      	adds	r3, r7, r3
 8001c46:	9301      	str	r3, [sp, #4]
 8001c48:	6a7b      	ldr	r3, [r7, #36]	; 0x24
 8001c4a:	9300      	str	r3, [sp, #0]
 8001c4c:	0023      	movs	r3, r4
 8001c4e:	f000 fd79 	bl	8002744 <xTaskCreate>
 8001c52:	0003      	movs	r3, r0
 8001c54:	2b01      	cmp	r3, #1
 8001c56:	d001      	beq.n	8001c5c <osThreadNew+0x140>
          hTask = NULL;
 8001c58:	2300      	movs	r3, #0
 8001c5a:	613b      	str	r3, [r7, #16]
        }
      }
    }
  }

  return ((osThreadId_t)hTask);
 8001c5c:	693b      	ldr	r3, [r7, #16]
}
 8001c5e:	0018      	movs	r0, r3
 8001c60:	46bd      	mov	sp, r7
 8001c62:	b00c      	add	sp, #48	; 0x30
 8001c64:	bdb0      	pop	{r4, r5, r7, pc}
 8001c66:	46c0      	nop			; (mov r8, r8)
 8001c68:	20000030 	.word	0x20000030

08001c6c <osDelay>:

  /* Return flags before clearing */
  return (rflags);
}

osStatus_t osDelay (uint32_t ticks) {
 8001c6c:	b580      	push	{r7, lr}
 8001c6e:	b086      	sub	sp, #24
 8001c70:	af00      	add	r7, sp, #0
 8001c72:	6078      	str	r0, [r7, #4]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8001c74:	f3ef 8305 	mrs	r3, IPSR
 8001c78:	613b      	str	r3, [r7, #16]
  return(result);
 8001c7a:	693b      	ldr	r3, [r7, #16]
  osStatus_t stat;

  if (IS_IRQ()) {
 8001c7c:	2b00      	cmp	r3, #0
 8001c7e:	d109      	bne.n	8001c94 <osDelay+0x28>
  __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
 8001c80:	f3ef 8310 	mrs	r3, PRIMASK
 8001c84:	60fb      	str	r3, [r7, #12]
  return(result);
 8001c86:	68fb      	ldr	r3, [r7, #12]
 8001c88:	2b00      	cmp	r3, #0
 8001c8a:	d007      	beq.n	8001c9c <osDelay+0x30>
 8001c8c:	4b0a      	ldr	r3, [pc, #40]	; (8001cb8 <osDelay+0x4c>)
 8001c8e:	681b      	ldr	r3, [r3, #0]
 8001c90:	2b02      	cmp	r3, #2
 8001c92:	d103      	bne.n	8001c9c <osDelay+0x30>
    stat = osErrorISR;
 8001c94:	2306      	movs	r3, #6
 8001c96:	425b      	negs	r3, r3
 8001c98:	617b      	str	r3, [r7, #20]
 8001c9a:	e008      	b.n	8001cae <osDelay+0x42>
  }
  else {
    stat = osOK;
 8001c9c:	2300      	movs	r3, #0
 8001c9e:	617b      	str	r3, [r7, #20]

    if (ticks != 0U) {
 8001ca0:	687b      	ldr	r3, [r7, #4]
 8001ca2:	2b00      	cmp	r3, #0
 8001ca4:	d003      	beq.n	8001cae <osDelay+0x42>
      vTaskDelay(ticks);
 8001ca6:	687b      	ldr	r3, [r7, #4]
 8001ca8:	0018      	movs	r0, r3
 8001caa:	f000 fe81 	bl	80029b0 <vTaskDelay>
    }
  }

  return (stat);
 8001cae:	697b      	ldr	r3, [r7, #20]
}
 8001cb0:	0018      	movs	r0, r3
 8001cb2:	46bd      	mov	sp, r7
 8001cb4:	b006      	add	sp, #24
 8001cb6:	bd80      	pop	{r7, pc}
 8001cb8:	20000030 	.word	0x20000030

08001cbc <vApplicationGetIdleTaskMemory>:

/*
  vApplicationGetIdleTaskMemory gets called when configSUPPORT_STATIC_ALLOCATION
  equals to 1 and is required for static memory allocation support.
*/
void vApplicationGetIdleTaskMemory (StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize) {
 8001cbc:	b580      	push	{r7, lr}
 8001cbe:	b084      	sub	sp, #16
 8001cc0:	af00      	add	r7, sp, #0
 8001cc2:	60f8      	str	r0, [r7, #12]
 8001cc4:	60b9      	str	r1, [r7, #8]
 8001cc6:	607a      	str	r2, [r7, #4]
  *ppxIdleTaskTCBBuffer   = &Idle_TCB;
 8001cc8:	68fb      	ldr	r3, [r7, #12]
 8001cca:	4a06      	ldr	r2, [pc, #24]	; (8001ce4 <vApplicationGetIdleTaskMemory+0x28>)
 8001ccc:	601a      	str	r2, [r3, #0]
  *ppxIdleTaskStackBuffer = &Idle_Stack[0];
 8001cce:	68bb      	ldr	r3, [r7, #8]
 8001cd0:	4a05      	ldr	r2, [pc, #20]	; (8001ce8 <vApplicationGetIdleTaskMemory+0x2c>)
 8001cd2:	601a      	str	r2, [r3, #0]
  *pulIdleTaskStackSize   = (uint32_t)configMINIMAL_STACK_SIZE;
 8001cd4:	687b      	ldr	r3, [r7, #4]
 8001cd6:	2280      	movs	r2, #128	; 0x80
 8001cd8:	601a      	str	r2, [r3, #0]
}
 8001cda:	46c0      	nop			; (mov r8, r8)
 8001cdc:	46bd      	mov	sp, r7
 8001cde:	b004      	add	sp, #16
 8001ce0:	bd80      	pop	{r7, pc}
 8001ce2:	46c0      	nop			; (mov r8, r8)
 8001ce4:	20000034 	.word	0x20000034
 8001ce8:	20000090 	.word	0x20000090

08001cec <vApplicationGetTimerTaskMemory>:

/*
  vApplicationGetTimerTaskMemory gets called when configSUPPORT_STATIC_ALLOCATION
  equals to 1 and is required for static memory allocation support.
*/
void vApplicationGetTimerTaskMemory (StaticTask_t **ppxTimerTaskTCBBuffer, StackType_t **ppxTimerTaskStackBuffer, uint32_t *pulTimerTaskStackSize) {
 8001cec:	b580      	push	{r7, lr}
 8001cee:	b084      	sub	sp, #16
 8001cf0:	af00      	add	r7, sp, #0
 8001cf2:	60f8      	str	r0, [r7, #12]
 8001cf4:	60b9      	str	r1, [r7, #8]
 8001cf6:	607a      	str	r2, [r7, #4]
  *ppxTimerTaskTCBBuffer   = &Timer_TCB;
 8001cf8:	68fb      	ldr	r3, [r7, #12]
 8001cfa:	4a06      	ldr	r2, [pc, #24]	; (8001d14 <vApplicationGetTimerTaskMemory+0x28>)
 8001cfc:	601a      	str	r2, [r3, #0]
  *ppxTimerTaskStackBuffer = &Timer_Stack[0];
 8001cfe:	68bb      	ldr	r3, [r7, #8]
 8001d00:	4a05      	ldr	r2, [pc, #20]	; (8001d18 <vApplicationGetTimerTaskMemory+0x2c>)
 8001d02:	601a      	str	r2, [r3, #0]
  *pulTimerTaskStackSize   = (uint32_t)configTIMER_TASK_STACK_DEPTH;
 8001d04:	687b      	ldr	r3, [r7, #4]
 8001d06:	2280      	movs	r2, #128	; 0x80
 8001d08:	0052      	lsls	r2, r2, #1
 8001d0a:	601a      	str	r2, [r3, #0]
}
 8001d0c:	46c0      	nop			; (mov r8, r8)
 8001d0e:	46bd      	mov	sp, r7
 8001d10:	b004      	add	sp, #16
 8001d12:	bd80      	pop	{r7, pc}
 8001d14:	20000290 	.word	0x20000290
 8001d18:	200002ec 	.word	0x200002ec

08001d1c <vListInitialise>:
/*-----------------------------------------------------------
 * PUBLIC LIST API documented in list.h
 *----------------------------------------------------------*/

void vListInitialise( List_t * const pxList )
{
 8001d1c:	b580      	push	{r7, lr}
 8001d1e:	b082      	sub	sp, #8
 8001d20:	af00      	add	r7, sp, #0
 8001d22:	6078      	str	r0, [r7, #4]
	/* The list structure contains a list item which is used to mark the
	end of the list.  To initialise the list the list end is inserted
	as the only list entry. */
	pxList->pxIndex = ( ListItem_t * ) &( pxList->xListEnd );			/*lint !e826 !e740 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
 8001d24:	687b      	ldr	r3, [r7, #4]
 8001d26:	3308      	adds	r3, #8
 8001d28:	001a      	movs	r2, r3
 8001d2a:	687b      	ldr	r3, [r7, #4]
 8001d2c:	605a      	str	r2, [r3, #4]

	/* The list end value is the highest possible value in the list to
	ensure it remains at the end of the list. */
	pxList->xListEnd.xItemValue = portMAX_DELAY;
 8001d2e:	687b      	ldr	r3, [r7, #4]
 8001d30:	2201      	movs	r2, #1
 8001d32:	4252      	negs	r2, r2
 8001d34:	609a      	str	r2, [r3, #8]

	/* The list end next and previous pointers point to itself so we know
	when the list is empty. */
	pxList->xListEnd.pxNext = ( ListItem_t * ) &( pxList->xListEnd );	/*lint !e826 !e740 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
 8001d36:	687b      	ldr	r3, [r7, #4]
 8001d38:	3308      	adds	r3, #8
 8001d3a:	001a      	movs	r2, r3
 8001d3c:	687b      	ldr	r3, [r7, #4]
 8001d3e:	60da      	str	r2, [r3, #12]
	pxList->xListEnd.pxPrevious = ( ListItem_t * ) &( pxList->xListEnd );/*lint !e826 !e740 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
 8001d40:	687b      	ldr	r3, [r7, #4]
 8001d42:	3308      	adds	r3, #8
 8001d44:	001a      	movs	r2, r3
 8001d46:	687b      	ldr	r3, [r7, #4]
 8001d48:	611a      	str	r2, [r3, #16]

	pxList->uxNumberOfItems = ( UBaseType_t ) 0U;
 8001d4a:	687b      	ldr	r3, [r7, #4]
 8001d4c:	2200      	movs	r2, #0
 8001d4e:	601a      	str	r2, [r3, #0]

	/* Write known values into the list if
	configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
	listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList );
	listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList );
}
 8001d50:	46c0      	nop			; (mov r8, r8)
 8001d52:	46bd      	mov	sp, r7
 8001d54:	b002      	add	sp, #8
 8001d56:	bd80      	pop	{r7, pc}

08001d58 <vListInitialiseItem>:
/*-----------------------------------------------------------*/

void vListInitialiseItem( ListItem_t * const pxItem )
{
 8001d58:	b580      	push	{r7, lr}
 8001d5a:	b082      	sub	sp, #8
 8001d5c:	af00      	add	r7, sp, #0
 8001d5e:	6078      	str	r0, [r7, #4]
	/* Make sure the list item is not recorded as being on a list. */
	pxItem->pvContainer = NULL;
 8001d60:	687b      	ldr	r3, [r7, #4]
 8001d62:	2200      	movs	r2, #0
 8001d64:	611a      	str	r2, [r3, #16]

	/* Write known values into the list item if
	configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
	listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
	listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
}
 8001d66:	46c0      	nop			; (mov r8, r8)
 8001d68:	46bd      	mov	sp, r7
 8001d6a:	b002      	add	sp, #8
 8001d6c:	bd80      	pop	{r7, pc}

08001d6e <vListInsertEnd>:
/*-----------------------------------------------------------*/

void vListInsertEnd( List_t * const pxList, ListItem_t * const pxNewListItem )
{
 8001d6e:	b580      	push	{r7, lr}
 8001d70:	b084      	sub	sp, #16
 8001d72:	af00      	add	r7, sp, #0
 8001d74:	6078      	str	r0, [r7, #4]
 8001d76:	6039      	str	r1, [r7, #0]
ListItem_t * const pxIndex = pxList->pxIndex;
 8001d78:	687b      	ldr	r3, [r7, #4]
 8001d7a:	685b      	ldr	r3, [r3, #4]
 8001d7c:	60fb      	str	r3, [r7, #12]
	listTEST_LIST_ITEM_INTEGRITY( pxNewListItem );

	/* Insert a new list item into pxList, but rather than sort the list,
	makes the new list item the last item to be removed by a call to
	listGET_OWNER_OF_NEXT_ENTRY(). */
	pxNewListItem->pxNext = pxIndex;
 8001d7e:	683b      	ldr	r3, [r7, #0]
 8001d80:	68fa      	ldr	r2, [r7, #12]
 8001d82:	605a      	str	r2, [r3, #4]
	pxNewListItem->pxPrevious = pxIndex->pxPrevious;
 8001d84:	68fb      	ldr	r3, [r7, #12]
 8001d86:	689a      	ldr	r2, [r3, #8]
 8001d88:	683b      	ldr	r3, [r7, #0]
 8001d8a:	609a      	str	r2, [r3, #8]

	/* Only used during decision coverage testing. */
	mtCOVERAGE_TEST_DELAY();

	pxIndex->pxPrevious->pxNext = pxNewListItem;
 8001d8c:	68fb      	ldr	r3, [r7, #12]
 8001d8e:	689b      	ldr	r3, [r3, #8]
 8001d90:	683a      	ldr	r2, [r7, #0]
 8001d92:	605a      	str	r2, [r3, #4]
	pxIndex->pxPrevious = pxNewListItem;
 8001d94:	68fb      	ldr	r3, [r7, #12]
 8001d96:	683a      	ldr	r2, [r7, #0]
 8001d98:	609a      	str	r2, [r3, #8]

	/* Remember which list the item is in. */
	pxNewListItem->pvContainer = ( void * ) pxList;
 8001d9a:	683b      	ldr	r3, [r7, #0]
 8001d9c:	687a      	ldr	r2, [r7, #4]
 8001d9e:	611a      	str	r2, [r3, #16]

	( pxList->uxNumberOfItems )++;
 8001da0:	687b      	ldr	r3, [r7, #4]
 8001da2:	681b      	ldr	r3, [r3, #0]
 8001da4:	1c5a      	adds	r2, r3, #1
 8001da6:	687b      	ldr	r3, [r7, #4]
 8001da8:	601a      	str	r2, [r3, #0]
}
 8001daa:	46c0      	nop			; (mov r8, r8)
 8001dac:	46bd      	mov	sp, r7
 8001dae:	b004      	add	sp, #16
 8001db0:	bd80      	pop	{r7, pc}

08001db2 <vListInsert>:
/*-----------------------------------------------------------*/

void vListInsert( List_t * const pxList, ListItem_t * const pxNewListItem )
{
 8001db2:	b580      	push	{r7, lr}
 8001db4:	b084      	sub	sp, #16
 8001db6:	af00      	add	r7, sp, #0
 8001db8:	6078      	str	r0, [r7, #4]
 8001dba:	6039      	str	r1, [r7, #0]
ListItem_t *pxIterator;
const TickType_t xValueOfInsertion = pxNewListItem->xItemValue;
 8001dbc:	683b      	ldr	r3, [r7, #0]
 8001dbe:	681b      	ldr	r3, [r3, #0]
 8001dc0:	60bb      	str	r3, [r7, #8]
	new list item should be placed after it.  This ensures that TCB's which are
	stored in ready lists (all of which have the same xItemValue value) get a
	share of the CPU.  However, if the xItemValue is the same as the back marker
	the iteration loop below will not end.  Therefore the value is checked
	first, and the algorithm slightly modified if necessary. */
	if( xValueOfInsertion == portMAX_DELAY )
 8001dc2:	68bb      	ldr	r3, [r7, #8]
 8001dc4:	3301      	adds	r3, #1
 8001dc6:	d103      	bne.n	8001dd0 <vListInsert+0x1e>
	{
		pxIterator = pxList->xListEnd.pxPrevious;
 8001dc8:	687b      	ldr	r3, [r7, #4]
 8001dca:	691b      	ldr	r3, [r3, #16]
 8001dcc:	60fb      	str	r3, [r7, #12]
 8001dce:	e00c      	b.n	8001dea <vListInsert+0x38>
			4) Using a queue or semaphore before it has been initialised or
			   before the scheduler has been started (are interrupts firing
			   before vTaskStartScheduler() has been called?).
		**********************************************************************/

		for( pxIterator = ( ListItem_t * ) &( pxList->xListEnd ); pxIterator->pxNext->xItemValue <= xValueOfInsertion; pxIterator = pxIterator->pxNext ) /*lint !e826 !e740 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
 8001dd0:	687b      	ldr	r3, [r7, #4]
 8001dd2:	3308      	adds	r3, #8
 8001dd4:	60fb      	str	r3, [r7, #12]
 8001dd6:	e002      	b.n	8001dde <vListInsert+0x2c>
 8001dd8:	68fb      	ldr	r3, [r7, #12]
 8001dda:	685b      	ldr	r3, [r3, #4]
 8001ddc:	60fb      	str	r3, [r7, #12]
 8001dde:	68fb      	ldr	r3, [r7, #12]
 8001de0:	685b      	ldr	r3, [r3, #4]
 8001de2:	681b      	ldr	r3, [r3, #0]
 8001de4:	68ba      	ldr	r2, [r7, #8]
 8001de6:	429a      	cmp	r2, r3
 8001de8:	d2f6      	bcs.n	8001dd8 <vListInsert+0x26>
			/* There is nothing to do here, just iterating to the wanted
			insertion position. */
		}
	}

	pxNewListItem->pxNext = pxIterator->pxNext;
 8001dea:	68fb      	ldr	r3, [r7, #12]
 8001dec:	685a      	ldr	r2, [r3, #4]
 8001dee:	683b      	ldr	r3, [r7, #0]
 8001df0:	605a      	str	r2, [r3, #4]
	pxNewListItem->pxNext->pxPrevious = pxNewListItem;
 8001df2:	683b      	ldr	r3, [r7, #0]
 8001df4:	685b      	ldr	r3, [r3, #4]
 8001df6:	683a      	ldr	r2, [r7, #0]
 8001df8:	609a      	str	r2, [r3, #8]
	pxNewListItem->pxPrevious = pxIterator;
 8001dfa:	683b      	ldr	r3, [r7, #0]
 8001dfc:	68fa      	ldr	r2, [r7, #12]
 8001dfe:	609a      	str	r2, [r3, #8]
	pxIterator->pxNext = pxNewListItem;
 8001e00:	68fb      	ldr	r3, [r7, #12]
 8001e02:	683a      	ldr	r2, [r7, #0]
 8001e04:	605a      	str	r2, [r3, #4]

	/* Remember which list the item is in.  This allows fast removal of the
	item later. */
	pxNewListItem->pvContainer = ( void * ) pxList;
 8001e06:	683b      	ldr	r3, [r7, #0]
 8001e08:	687a      	ldr	r2, [r7, #4]
 8001e0a:	611a      	str	r2, [r3, #16]

	( pxList->uxNumberOfItems )++;
 8001e0c:	687b      	ldr	r3, [r7, #4]
 8001e0e:	681b      	ldr	r3, [r3, #0]
 8001e10:	1c5a      	adds	r2, r3, #1
 8001e12:	687b      	ldr	r3, [r7, #4]
 8001e14:	601a      	str	r2, [r3, #0]
}
 8001e16:	46c0      	nop			; (mov r8, r8)
 8001e18:	46bd      	mov	sp, r7
 8001e1a:	b004      	add	sp, #16
 8001e1c:	bd80      	pop	{r7, pc}

08001e1e <uxListRemove>:
/*-----------------------------------------------------------*/

UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove )
{
 8001e1e:	b580      	push	{r7, lr}
 8001e20:	b084      	sub	sp, #16
 8001e22:	af00      	add	r7, sp, #0
 8001e24:	6078      	str	r0, [r7, #4]
/* The list item knows which list it is in.  Obtain the list from the list
item. */
List_t * const pxList = ( List_t * ) pxItemToRemove->pvContainer;
 8001e26:	687b      	ldr	r3, [r7, #4]
 8001e28:	691b      	ldr	r3, [r3, #16]
 8001e2a:	60fb      	str	r3, [r7, #12]

	pxItemToRemove->pxNext->pxPrevious = pxItemToRemove->pxPrevious;
 8001e2c:	687b      	ldr	r3, [r7, #4]
 8001e2e:	685b      	ldr	r3, [r3, #4]
 8001e30:	687a      	ldr	r2, [r7, #4]
 8001e32:	6892      	ldr	r2, [r2, #8]
 8001e34:	609a      	str	r2, [r3, #8]
	pxItemToRemove->pxPrevious->pxNext = pxItemToRemove->pxNext;
 8001e36:	687b      	ldr	r3, [r7, #4]
 8001e38:	689b      	ldr	r3, [r3, #8]
 8001e3a:	687a      	ldr	r2, [r7, #4]
 8001e3c:	6852      	ldr	r2, [r2, #4]
 8001e3e:	605a      	str	r2, [r3, #4]

	/* Only used during decision coverage testing. */
	mtCOVERAGE_TEST_DELAY();

	/* Make sure the index is left pointing to a valid item. */
	if( pxList->pxIndex == pxItemToRemove )
 8001e40:	68fb      	ldr	r3, [r7, #12]
 8001e42:	685b      	ldr	r3, [r3, #4]
 8001e44:	687a      	ldr	r2, [r7, #4]
 8001e46:	429a      	cmp	r2, r3
 8001e48:	d103      	bne.n	8001e52 <uxListRemove+0x34>
	{
		pxList->pxIndex = pxItemToRemove->pxPrevious;
 8001e4a:	687b      	ldr	r3, [r7, #4]
 8001e4c:	689a      	ldr	r2, [r3, #8]
 8001e4e:	68fb      	ldr	r3, [r7, #12]
 8001e50:	605a      	str	r2, [r3, #4]
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	pxItemToRemove->pvContainer = NULL;
 8001e52:	687b      	ldr	r3, [r7, #4]
 8001e54:	2200      	movs	r2, #0
 8001e56:	611a      	str	r2, [r3, #16]
	( pxList->uxNumberOfItems )--;
 8001e58:	68fb      	ldr	r3, [r7, #12]
 8001e5a:	681b      	ldr	r3, [r3, #0]
 8001e5c:	1e5a      	subs	r2, r3, #1
 8001e5e:	68fb      	ldr	r3, [r7, #12]
 8001e60:	601a      	str	r2, [r3, #0]

	return pxList->uxNumberOfItems;
 8001e62:	68fb      	ldr	r3, [r7, #12]
 8001e64:	681b      	ldr	r3, [r3, #0]
}
 8001e66:	0018      	movs	r0, r3
 8001e68:	46bd      	mov	sp, r7
 8001e6a:	b004      	add	sp, #16
 8001e6c:	bd80      	pop	{r7, pc}

08001e6e <xQueueGenericReset>:
	}														\
	taskEXIT_CRITICAL()
/*-----------------------------------------------------------*/

BaseType_t xQueueGenericReset( QueueHandle_t xQueue, BaseType_t xNewQueue )
{
 8001e6e:	b580      	push	{r7, lr}
 8001e70:	b084      	sub	sp, #16
 8001e72:	af00      	add	r7, sp, #0
 8001e74:	6078      	str	r0, [r7, #4]
 8001e76:	6039      	str	r1, [r7, #0]
Queue_t * const pxQueue = ( Queue_t * ) xQueue;
 8001e78:	687b      	ldr	r3, [r7, #4]
 8001e7a:	60fb      	str	r3, [r7, #12]

	configASSERT( pxQueue );
 8001e7c:	68fb      	ldr	r3, [r7, #12]
 8001e7e:	2b00      	cmp	r3, #0
 8001e80:	d101      	bne.n	8001e86 <xQueueGenericReset+0x18>
 8001e82:	b672      	cpsid	i
 8001e84:	e7fe      	b.n	8001e84 <xQueueGenericReset+0x16>

	taskENTER_CRITICAL();
 8001e86:	f001 fdd3 	bl	8003a30 <vPortEnterCritical>
	{
		pxQueue->pcTail = pxQueue->pcHead + ( pxQueue->uxLength * pxQueue->uxItemSize );
 8001e8a:	68fb      	ldr	r3, [r7, #12]
 8001e8c:	681a      	ldr	r2, [r3, #0]
 8001e8e:	68fb      	ldr	r3, [r7, #12]
 8001e90:	6bd9      	ldr	r1, [r3, #60]	; 0x3c
 8001e92:	68fb      	ldr	r3, [r7, #12]
 8001e94:	6c1b      	ldr	r3, [r3, #64]	; 0x40
 8001e96:	434b      	muls	r3, r1
 8001e98:	18d2      	adds	r2, r2, r3
 8001e9a:	68fb      	ldr	r3, [r7, #12]
 8001e9c:	605a      	str	r2, [r3, #4]
		pxQueue->uxMessagesWaiting = ( UBaseType_t ) 0U;
 8001e9e:	68fb      	ldr	r3, [r7, #12]
 8001ea0:	2200      	movs	r2, #0
 8001ea2:	639a      	str	r2, [r3, #56]	; 0x38
		pxQueue->pcWriteTo = pxQueue->pcHead;
 8001ea4:	68fb      	ldr	r3, [r7, #12]
 8001ea6:	681a      	ldr	r2, [r3, #0]
 8001ea8:	68fb      	ldr	r3, [r7, #12]
 8001eaa:	609a      	str	r2, [r3, #8]
		pxQueue->u.pcReadFrom = pxQueue->pcHead + ( ( pxQueue->uxLength - ( UBaseType_t ) 1U ) * pxQueue->uxItemSize );
 8001eac:	68fb      	ldr	r3, [r7, #12]
 8001eae:	681a      	ldr	r2, [r3, #0]
 8001eb0:	68fb      	ldr	r3, [r7, #12]
 8001eb2:	6bdb      	ldr	r3, [r3, #60]	; 0x3c
 8001eb4:	1e59      	subs	r1, r3, #1
 8001eb6:	68fb      	ldr	r3, [r7, #12]
 8001eb8:	6c1b      	ldr	r3, [r3, #64]	; 0x40
 8001eba:	434b      	muls	r3, r1
 8001ebc:	18d2      	adds	r2, r2, r3
 8001ebe:	68fb      	ldr	r3, [r7, #12]
 8001ec0:	60da      	str	r2, [r3, #12]
		pxQueue->cRxLock = queueUNLOCKED;
 8001ec2:	68fb      	ldr	r3, [r7, #12]
 8001ec4:	2244      	movs	r2, #68	; 0x44
 8001ec6:	21ff      	movs	r1, #255	; 0xff
 8001ec8:	5499      	strb	r1, [r3, r2]
		pxQueue->cTxLock = queueUNLOCKED;
 8001eca:	68fb      	ldr	r3, [r7, #12]
 8001ecc:	2245      	movs	r2, #69	; 0x45
 8001ece:	21ff      	movs	r1, #255	; 0xff
 8001ed0:	5499      	strb	r1, [r3, r2]

		if( xNewQueue == pdFALSE )
 8001ed2:	683b      	ldr	r3, [r7, #0]
 8001ed4:	2b00      	cmp	r3, #0
 8001ed6:	d10d      	bne.n	8001ef4 <xQueueGenericReset+0x86>
			/* If there are tasks blocked waiting to read from the queue, then
			the tasks will remain blocked as after this function exits the queue
			will still be empty.  If there are tasks blocked waiting to write to
			the queue, then one should be unblocked as after this function exits
			it will be possible to write to it. */
			if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
 8001ed8:	68fb      	ldr	r3, [r7, #12]
 8001eda:	691b      	ldr	r3, [r3, #16]
 8001edc:	2b00      	cmp	r3, #0
 8001ede:	d013      	beq.n	8001f08 <xQueueGenericReset+0x9a>
			{
				if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
 8001ee0:	68fb      	ldr	r3, [r7, #12]
 8001ee2:	3310      	adds	r3, #16
 8001ee4:	0018      	movs	r0, r3
 8001ee6:	f000 ffcd 	bl	8002e84 <xTaskRemoveFromEventList>
 8001eea:	1e03      	subs	r3, r0, #0
 8001eec:	d00c      	beq.n	8001f08 <xQueueGenericReset+0x9a>
				{
					queueYIELD_IF_USING_PREEMPTION();
 8001eee:	f001 fd8f 	bl	8003a10 <vPortYield>
 8001ef2:	e009      	b.n	8001f08 <xQueueGenericReset+0x9a>
			}
		}
		else
		{
			/* Ensure the event queues start in the correct state. */
			vListInitialise( &( pxQueue->xTasksWaitingToSend ) );
 8001ef4:	68fb      	ldr	r3, [r7, #12]
 8001ef6:	3310      	adds	r3, #16
 8001ef8:	0018      	movs	r0, r3
 8001efa:	f7ff ff0f 	bl	8001d1c <vListInitialise>
			vListInitialise( &( pxQueue->xTasksWaitingToReceive ) );
 8001efe:	68fb      	ldr	r3, [r7, #12]
 8001f00:	3324      	adds	r3, #36	; 0x24
 8001f02:	0018      	movs	r0, r3
 8001f04:	f7ff ff0a 	bl	8001d1c <vListInitialise>
		}
	}
	taskEXIT_CRITICAL();
 8001f08:	f001 fda4 	bl	8003a54 <vPortExitCritical>

	/* A value is returned for calling semantic consistency with previous
	versions. */
	return pdPASS;
 8001f0c:	2301      	movs	r3, #1
}
 8001f0e:	0018      	movs	r0, r3
 8001f10:	46bd      	mov	sp, r7
 8001f12:	b004      	add	sp, #16
 8001f14:	bd80      	pop	{r7, pc}

08001f16 <xQueueGenericCreateStatic>:
/*-----------------------------------------------------------*/

#if( configSUPPORT_STATIC_ALLOCATION == 1 )

	QueueHandle_t xQueueGenericCreateStatic( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, StaticQueue_t *pxStaticQueue, const uint8_t ucQueueType )
	{
 8001f16:	b590      	push	{r4, r7, lr}
 8001f18:	b089      	sub	sp, #36	; 0x24
 8001f1a:	af02      	add	r7, sp, #8
 8001f1c:	60f8      	str	r0, [r7, #12]
 8001f1e:	60b9      	str	r1, [r7, #8]
 8001f20:	607a      	str	r2, [r7, #4]
 8001f22:	603b      	str	r3, [r7, #0]
	Queue_t *pxNewQueue;

		configASSERT( uxQueueLength > ( UBaseType_t ) 0 );
 8001f24:	68fb      	ldr	r3, [r7, #12]
 8001f26:	2b00      	cmp	r3, #0
 8001f28:	d101      	bne.n	8001f2e <xQueueGenericCreateStatic+0x18>
 8001f2a:	b672      	cpsid	i
 8001f2c:	e7fe      	b.n	8001f2c <xQueueGenericCreateStatic+0x16>

		/* The StaticQueue_t structure and the queue storage area must be
		supplied. */
		configASSERT( pxStaticQueue != NULL );
 8001f2e:	683b      	ldr	r3, [r7, #0]
 8001f30:	2b00      	cmp	r3, #0
 8001f32:	d101      	bne.n	8001f38 <xQueueGenericCreateStatic+0x22>
 8001f34:	b672      	cpsid	i
 8001f36:	e7fe      	b.n	8001f36 <xQueueGenericCreateStatic+0x20>

		/* A queue storage area should be provided if the item size is not 0, and
		should not be provided if the item size is 0. */
		configASSERT( !( ( pucQueueStorage != NULL ) && ( uxItemSize == 0 ) ) );
 8001f38:	687b      	ldr	r3, [r7, #4]
 8001f3a:	2b00      	cmp	r3, #0
 8001f3c:	d002      	beq.n	8001f44 <xQueueGenericCreateStatic+0x2e>
 8001f3e:	68bb      	ldr	r3, [r7, #8]
 8001f40:	2b00      	cmp	r3, #0
 8001f42:	d001      	beq.n	8001f48 <xQueueGenericCreateStatic+0x32>
 8001f44:	2301      	movs	r3, #1
 8001f46:	e000      	b.n	8001f4a <xQueueGenericCreateStatic+0x34>
 8001f48:	2300      	movs	r3, #0
 8001f4a:	2b00      	cmp	r3, #0
 8001f4c:	d101      	bne.n	8001f52 <xQueueGenericCreateStatic+0x3c>
 8001f4e:	b672      	cpsid	i
 8001f50:	e7fe      	b.n	8001f50 <xQueueGenericCreateStatic+0x3a>
		configASSERT( !( ( pucQueueStorage == NULL ) && ( uxItemSize != 0 ) ) );
 8001f52:	687b      	ldr	r3, [r7, #4]
 8001f54:	2b00      	cmp	r3, #0
 8001f56:	d102      	bne.n	8001f5e <xQueueGenericCreateStatic+0x48>
 8001f58:	68bb      	ldr	r3, [r7, #8]
 8001f5a:	2b00      	cmp	r3, #0
 8001f5c:	d101      	bne.n	8001f62 <xQueueGenericCreateStatic+0x4c>
 8001f5e:	2301      	movs	r3, #1
 8001f60:	e000      	b.n	8001f64 <xQueueGenericCreateStatic+0x4e>
 8001f62:	2300      	movs	r3, #0
 8001f64:	2b00      	cmp	r3, #0
 8001f66:	d101      	bne.n	8001f6c <xQueueGenericCreateStatic+0x56>
 8001f68:	b672      	cpsid	i
 8001f6a:	e7fe      	b.n	8001f6a <xQueueGenericCreateStatic+0x54>
		#if( configASSERT_DEFINED == 1 )
		{
			/* Sanity check that the size of the structure used to declare a
			variable of type StaticQueue_t or StaticSemaphore_t equals the size of
			the real queue and semaphore structures. */
			volatile size_t xSize = sizeof( StaticQueue_t );
 8001f6c:	2350      	movs	r3, #80	; 0x50
 8001f6e:	613b      	str	r3, [r7, #16]
			configASSERT( xSize == sizeof( Queue_t ) );
 8001f70:	693b      	ldr	r3, [r7, #16]
 8001f72:	2b50      	cmp	r3, #80	; 0x50
 8001f74:	d001      	beq.n	8001f7a <xQueueGenericCreateStatic+0x64>
 8001f76:	b672      	cpsid	i
 8001f78:	e7fe      	b.n	8001f78 <xQueueGenericCreateStatic+0x62>
		#endif /* configASSERT_DEFINED */

		/* The address of a statically allocated queue was passed in, use it.
		The address of a statically allocated storage area was also passed in
		but is already set. */
		pxNewQueue = ( Queue_t * ) pxStaticQueue; /*lint !e740 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */
 8001f7a:	683b      	ldr	r3, [r7, #0]
 8001f7c:	617b      	str	r3, [r7, #20]

		if( pxNewQueue != NULL )
 8001f7e:	697b      	ldr	r3, [r7, #20]
 8001f80:	2b00      	cmp	r3, #0
 8001f82:	d00e      	beq.n	8001fa2 <xQueueGenericCreateStatic+0x8c>
			#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
			{
				/* Queues can be allocated wither statically or dynamically, so
				note this queue was allocated statically in case the queue is
				later deleted. */
				pxNewQueue->ucStaticallyAllocated = pdTRUE;
 8001f84:	697b      	ldr	r3, [r7, #20]
 8001f86:	2246      	movs	r2, #70	; 0x46
 8001f88:	2101      	movs	r1, #1
 8001f8a:	5499      	strb	r1, [r3, r2]
			}
			#endif /* configSUPPORT_DYNAMIC_ALLOCATION */

			prvInitialiseNewQueue( uxQueueLength, uxItemSize, pucQueueStorage, ucQueueType, pxNewQueue );
 8001f8c:	2328      	movs	r3, #40	; 0x28
 8001f8e:	18fb      	adds	r3, r7, r3
 8001f90:	781c      	ldrb	r4, [r3, #0]
 8001f92:	687a      	ldr	r2, [r7, #4]
 8001f94:	68b9      	ldr	r1, [r7, #8]
 8001f96:	68f8      	ldr	r0, [r7, #12]
 8001f98:	697b      	ldr	r3, [r7, #20]
 8001f9a:	9300      	str	r3, [sp, #0]
 8001f9c:	0023      	movs	r3, r4
 8001f9e:	f000 f805 	bl	8001fac <prvInitialiseNewQueue>
		else
		{
			traceQUEUE_CREATE_FAILED( ucQueueType );
		}

		return pxNewQueue;
 8001fa2:	697b      	ldr	r3, [r7, #20]
	}
 8001fa4:	0018      	movs	r0, r3
 8001fa6:	46bd      	mov	sp, r7
 8001fa8:	b007      	add	sp, #28
 8001faa:	bd90      	pop	{r4, r7, pc}

08001fac <prvInitialiseNewQueue>:

#endif /* configSUPPORT_STATIC_ALLOCATION */
/*-----------------------------------------------------------*/

static void prvInitialiseNewQueue( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, const uint8_t ucQueueType, Queue_t *pxNewQueue )
{
 8001fac:	b580      	push	{r7, lr}
 8001fae:	b084      	sub	sp, #16
 8001fb0:	af00      	add	r7, sp, #0
 8001fb2:	60f8      	str	r0, [r7, #12]
 8001fb4:	60b9      	str	r1, [r7, #8]
 8001fb6:	607a      	str	r2, [r7, #4]
 8001fb8:	001a      	movs	r2, r3
 8001fba:	1cfb      	adds	r3, r7, #3
 8001fbc:	701a      	strb	r2, [r3, #0]
	/* Remove compiler warnings about unused parameters should
	configUSE_TRACE_FACILITY not be set to 1. */
	( void ) ucQueueType;

	if( uxItemSize == ( UBaseType_t ) 0 )
 8001fbe:	68bb      	ldr	r3, [r7, #8]
 8001fc0:	2b00      	cmp	r3, #0
 8001fc2:	d103      	bne.n	8001fcc <prvInitialiseNewQueue+0x20>
	{
		/* No RAM was allocated for the queue storage area, but PC head cannot
		be set to NULL because NULL is used as a key to say the queue is used as
		a mutex.  Therefore just set pcHead to point to the queue as a benign
		value that is known to be within the memory map. */
		pxNewQueue->pcHead = ( int8_t * ) pxNewQueue;
 8001fc4:	69bb      	ldr	r3, [r7, #24]
 8001fc6:	69ba      	ldr	r2, [r7, #24]
 8001fc8:	601a      	str	r2, [r3, #0]
 8001fca:	e002      	b.n	8001fd2 <prvInitialiseNewQueue+0x26>
	}
	else
	{
		/* Set the head to the start of the queue storage area. */
		pxNewQueue->pcHead = ( int8_t * ) pucQueueStorage;
 8001fcc:	69bb      	ldr	r3, [r7, #24]
 8001fce:	687a      	ldr	r2, [r7, #4]
 8001fd0:	601a      	str	r2, [r3, #0]
	}

	/* Initialise the queue members as described where the queue type is
	defined. */
	pxNewQueue->uxLength = uxQueueLength;
 8001fd2:	69bb      	ldr	r3, [r7, #24]
 8001fd4:	68fa      	ldr	r2, [r7, #12]
 8001fd6:	63da      	str	r2, [r3, #60]	; 0x3c
	pxNewQueue->uxItemSize = uxItemSize;
 8001fd8:	69bb      	ldr	r3, [r7, #24]
 8001fda:	68ba      	ldr	r2, [r7, #8]
 8001fdc:	641a      	str	r2, [r3, #64]	; 0x40
	( void ) xQueueGenericReset( pxNewQueue, pdTRUE );
 8001fde:	69bb      	ldr	r3, [r7, #24]
 8001fe0:	2101      	movs	r1, #1
 8001fe2:	0018      	movs	r0, r3
 8001fe4:	f7ff ff43 	bl	8001e6e <xQueueGenericReset>

	#if ( configUSE_TRACE_FACILITY == 1 )
	{
		pxNewQueue->ucQueueType = ucQueueType;
 8001fe8:	69bb      	ldr	r3, [r7, #24]
 8001fea:	1cfa      	adds	r2, r7, #3
 8001fec:	214c      	movs	r1, #76	; 0x4c
 8001fee:	7812      	ldrb	r2, [r2, #0]
 8001ff0:	545a      	strb	r2, [r3, r1]
		pxNewQueue->pxQueueSetContainer = NULL;
	}
	#endif /* configUSE_QUEUE_SETS */

	traceQUEUE_CREATE( pxNewQueue );
}
 8001ff2:	46c0      	nop			; (mov r8, r8)
 8001ff4:	46bd      	mov	sp, r7
 8001ff6:	b004      	add	sp, #16
 8001ff8:	bd80      	pop	{r7, pc}

08001ffa <xQueueGenericSend>:

#endif /* ( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) */
/*-----------------------------------------------------------*/

BaseType_t xQueueGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, const BaseType_t xCopyPosition )
{
 8001ffa:	b580      	push	{r7, lr}
 8001ffc:	b08a      	sub	sp, #40	; 0x28
 8001ffe:	af00      	add	r7, sp, #0
 8002000:	60f8      	str	r0, [r7, #12]
 8002002:	60b9      	str	r1, [r7, #8]
 8002004:	607a      	str	r2, [r7, #4]
 8002006:	603b      	str	r3, [r7, #0]
BaseType_t xEntryTimeSet = pdFALSE, xYieldRequired;
 8002008:	2300      	movs	r3, #0
 800200a:	627b      	str	r3, [r7, #36]	; 0x24
TimeOut_t xTimeOut;
Queue_t * const pxQueue = ( Queue_t * ) xQueue;
 800200c:	68fb      	ldr	r3, [r7, #12]
 800200e:	623b      	str	r3, [r7, #32]

	configASSERT( pxQueue );
 8002010:	6a3b      	ldr	r3, [r7, #32]
 8002012:	2b00      	cmp	r3, #0
 8002014:	d101      	bne.n	800201a <xQueueGenericSend+0x20>
 8002016:	b672      	cpsid	i
 8002018:	e7fe      	b.n	8002018 <xQueueGenericSend+0x1e>
	configASSERT( !( ( pvItemToQueue == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
 800201a:	68bb      	ldr	r3, [r7, #8]
 800201c:	2b00      	cmp	r3, #0
 800201e:	d103      	bne.n	8002028 <xQueueGenericSend+0x2e>
 8002020:	6a3b      	ldr	r3, [r7, #32]
 8002022:	6c1b      	ldr	r3, [r3, #64]	; 0x40
 8002024:	2b00      	cmp	r3, #0
 8002026:	d101      	bne.n	800202c <xQueueGenericSend+0x32>
 8002028:	2301      	movs	r3, #1
 800202a:	e000      	b.n	800202e <xQueueGenericSend+0x34>
 800202c:	2300      	movs	r3, #0
 800202e:	2b00      	cmp	r3, #0
 8002030:	d101      	bne.n	8002036 <xQueueGenericSend+0x3c>
 8002032:	b672      	cpsid	i
 8002034:	e7fe      	b.n	8002034 <xQueueGenericSend+0x3a>
	configASSERT( !( ( xCopyPosition == queueOVERWRITE ) && ( pxQueue->uxLength != 1 ) ) );
 8002036:	683b      	ldr	r3, [r7, #0]
 8002038:	2b02      	cmp	r3, #2
 800203a:	d103      	bne.n	8002044 <xQueueGenericSend+0x4a>
 800203c:	6a3b      	ldr	r3, [r7, #32]
 800203e:	6bdb      	ldr	r3, [r3, #60]	; 0x3c
 8002040:	2b01      	cmp	r3, #1
 8002042:	d101      	bne.n	8002048 <xQueueGenericSend+0x4e>
 8002044:	2301      	movs	r3, #1
 8002046:	e000      	b.n	800204a <xQueueGenericSend+0x50>
 8002048:	2300      	movs	r3, #0
 800204a:	2b00      	cmp	r3, #0
 800204c:	d101      	bne.n	8002052 <xQueueGenericSend+0x58>
 800204e:	b672      	cpsid	i
 8002050:	e7fe      	b.n	8002050 <xQueueGenericSend+0x56>
	#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
	{
		configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
 8002052:	f001 f8af 	bl	80031b4 <xTaskGetSchedulerState>
 8002056:	1e03      	subs	r3, r0, #0
 8002058:	d102      	bne.n	8002060 <xQueueGenericSend+0x66>
 800205a:	687b      	ldr	r3, [r7, #4]
 800205c:	2b00      	cmp	r3, #0
 800205e:	d101      	bne.n	8002064 <xQueueGenericSend+0x6a>
 8002060:	2301      	movs	r3, #1
 8002062:	e000      	b.n	8002066 <xQueueGenericSend+0x6c>
 8002064:	2300      	movs	r3, #0
 8002066:	2b00      	cmp	r3, #0
 8002068:	d101      	bne.n	800206e <xQueueGenericSend+0x74>
 800206a:	b672      	cpsid	i
 800206c:	e7fe      	b.n	800206c <xQueueGenericSend+0x72>
	/* This function relaxes the coding standard somewhat to allow return
	statements within the function itself.  This is done in the interest
	of execution time efficiency. */
	for( ;; )
	{
		taskENTER_CRITICAL();
 800206e:	f001 fcdf 	bl	8003a30 <vPortEnterCritical>
		{
			/* Is there room on the queue now?  The running task must be the
			highest priority task wanting to access the queue.  If the head item
			in the queue is to be overwritten then it does not matter if the
			queue is full. */
			if( ( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) || ( xCopyPosition == queueOVERWRITE ) )
 8002072:	6a3b      	ldr	r3, [r7, #32]
 8002074:	6b9a      	ldr	r2, [r3, #56]	; 0x38
 8002076:	6a3b      	ldr	r3, [r7, #32]
 8002078:	6bdb      	ldr	r3, [r3, #60]	; 0x3c
 800207a:	429a      	cmp	r2, r3
 800207c:	d302      	bcc.n	8002084 <xQueueGenericSend+0x8a>
 800207e:	683b      	ldr	r3, [r7, #0]
 8002080:	2b02      	cmp	r3, #2
 8002082:	d11e      	bne.n	80020c2 <xQueueGenericSend+0xc8>
			{
				traceQUEUE_SEND( pxQueue );
				xYieldRequired = prvCopyDataToQueue( pxQueue, pvItemToQueue, xCopyPosition );
 8002084:	683a      	ldr	r2, [r7, #0]
 8002086:	68b9      	ldr	r1, [r7, #8]
 8002088:	6a3b      	ldr	r3, [r7, #32]
 800208a:	0018      	movs	r0, r3
 800208c:	f000 f99f 	bl	80023ce <prvCopyDataToQueue>
 8002090:	0003      	movs	r3, r0
 8002092:	61fb      	str	r3, [r7, #28]
				}
				#else /* configUSE_QUEUE_SETS */
				{
					/* If there was a task waiting for data to arrive on the
					queue then unblock it now. */
					if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
 8002094:	6a3b      	ldr	r3, [r7, #32]
 8002096:	6a5b      	ldr	r3, [r3, #36]	; 0x24
 8002098:	2b00      	cmp	r3, #0
 800209a:	d009      	beq.n	80020b0 <xQueueGenericSend+0xb6>
					{
						if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
 800209c:	6a3b      	ldr	r3, [r7, #32]
 800209e:	3324      	adds	r3, #36	; 0x24
 80020a0:	0018      	movs	r0, r3
 80020a2:	f000 feef 	bl	8002e84 <xTaskRemoveFromEventList>
 80020a6:	1e03      	subs	r3, r0, #0
 80020a8:	d007      	beq.n	80020ba <xQueueGenericSend+0xc0>
						{
							/* The unblocked task has a priority higher than
							our own so yield immediately.  Yes it is ok to do
							this from within the critical section - the kernel
							takes care of that. */
							queueYIELD_IF_USING_PREEMPTION();
 80020aa:	f001 fcb1 	bl	8003a10 <vPortYield>
 80020ae:	e004      	b.n	80020ba <xQueueGenericSend+0xc0>
						else
						{
							mtCOVERAGE_TEST_MARKER();
						}
					}
					else if( xYieldRequired != pdFALSE )
 80020b0:	69fb      	ldr	r3, [r7, #28]
 80020b2:	2b00      	cmp	r3, #0
 80020b4:	d001      	beq.n	80020ba <xQueueGenericSend+0xc0>
					{
						/* This path is a special case that will only get
						executed if the task was holding multiple mutexes and
						the mutexes were given back in an order that is
						different to that in which they were taken. */
						queueYIELD_IF_USING_PREEMPTION();
 80020b6:	f001 fcab 	bl	8003a10 <vPortYield>
						mtCOVERAGE_TEST_MARKER();
					}
				}
				#endif /* configUSE_QUEUE_SETS */

				taskEXIT_CRITICAL();
 80020ba:	f001 fccb 	bl	8003a54 <vPortExitCritical>
				return pdPASS;
 80020be:	2301      	movs	r3, #1
 80020c0:	e05b      	b.n	800217a <xQueueGenericSend+0x180>
			}
			else
			{
				if( xTicksToWait == ( TickType_t ) 0 )
 80020c2:	687b      	ldr	r3, [r7, #4]
 80020c4:	2b00      	cmp	r3, #0
 80020c6:	d103      	bne.n	80020d0 <xQueueGenericSend+0xd6>
				{
					/* The queue was full and no block time is specified (or
					the block time has expired) so leave now. */
					taskEXIT_CRITICAL();
 80020c8:	f001 fcc4 	bl	8003a54 <vPortExitCritical>

					/* Return to the original privilege level before exiting
					the function. */
					traceQUEUE_SEND_FAILED( pxQueue );
					return errQUEUE_FULL;
 80020cc:	2300      	movs	r3, #0
 80020ce:	e054      	b.n	800217a <xQueueGenericSend+0x180>
				}
				else if( xEntryTimeSet == pdFALSE )
 80020d0:	6a7b      	ldr	r3, [r7, #36]	; 0x24
 80020d2:	2b00      	cmp	r3, #0
 80020d4:	d106      	bne.n	80020e4 <xQueueGenericSend+0xea>
				{
					/* The queue was full and a block time was specified so
					configure the timeout structure. */
					vTaskInternalSetTimeOutState( &xTimeOut );
 80020d6:	2314      	movs	r3, #20
 80020d8:	18fb      	adds	r3, r7, r3
 80020da:	0018      	movs	r0, r3
 80020dc:	f000 ff2e 	bl	8002f3c <vTaskInternalSetTimeOutState>
					xEntryTimeSet = pdTRUE;
 80020e0:	2301      	movs	r3, #1
 80020e2:	627b      	str	r3, [r7, #36]	; 0x24
					/* Entry time was already set. */
					mtCOVERAGE_TEST_MARKER();
				}
			}
		}
		taskEXIT_CRITICAL();
 80020e4:	f001 fcb6 	bl	8003a54 <vPortExitCritical>

		/* Interrupts and other tasks can send to and receive from the queue
		now the critical section has been exited. */

		vTaskSuspendAll();
 80020e8:	f000 fcdc 	bl	8002aa4 <vTaskSuspendAll>
		prvLockQueue( pxQueue );
 80020ec:	f001 fca0 	bl	8003a30 <vPortEnterCritical>
 80020f0:	6a3b      	ldr	r3, [r7, #32]
 80020f2:	2244      	movs	r2, #68	; 0x44
 80020f4:	5c9b      	ldrb	r3, [r3, r2]
 80020f6:	b25b      	sxtb	r3, r3
 80020f8:	3301      	adds	r3, #1
 80020fa:	d103      	bne.n	8002104 <xQueueGenericSend+0x10a>
 80020fc:	6a3b      	ldr	r3, [r7, #32]
 80020fe:	2244      	movs	r2, #68	; 0x44
 8002100:	2100      	movs	r1, #0
 8002102:	5499      	strb	r1, [r3, r2]
 8002104:	6a3b      	ldr	r3, [r7, #32]
 8002106:	2245      	movs	r2, #69	; 0x45
 8002108:	5c9b      	ldrb	r3, [r3, r2]
 800210a:	b25b      	sxtb	r3, r3
 800210c:	3301      	adds	r3, #1
 800210e:	d103      	bne.n	8002118 <xQueueGenericSend+0x11e>
 8002110:	6a3b      	ldr	r3, [r7, #32]
 8002112:	2245      	movs	r2, #69	; 0x45
 8002114:	2100      	movs	r1, #0
 8002116:	5499      	strb	r1, [r3, r2]
 8002118:	f001 fc9c 	bl	8003a54 <vPortExitCritical>

		/* Update the timeout state to see if it has expired yet. */
		if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE )
 800211c:	1d3a      	adds	r2, r7, #4
 800211e:	2314      	movs	r3, #20
 8002120:	18fb      	adds	r3, r7, r3
 8002122:	0011      	movs	r1, r2
 8002124:	0018      	movs	r0, r3
 8002126:	f000 ff1d 	bl	8002f64 <xTaskCheckForTimeOut>
 800212a:	1e03      	subs	r3, r0, #0
 800212c:	d11e      	bne.n	800216c <xQueueGenericSend+0x172>
		{
			if( prvIsQueueFull( pxQueue ) != pdFALSE )
 800212e:	6a3b      	ldr	r3, [r7, #32]
 8002130:	0018      	movs	r0, r3
 8002132:	f000 fa51 	bl	80025d8 <prvIsQueueFull>
 8002136:	1e03      	subs	r3, r0, #0
 8002138:	d011      	beq.n	800215e <xQueueGenericSend+0x164>
			{
				traceBLOCKING_ON_QUEUE_SEND( pxQueue );
				vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToSend ), xTicksToWait );
 800213a:	6a3b      	ldr	r3, [r7, #32]
 800213c:	3310      	adds	r3, #16
 800213e:	687a      	ldr	r2, [r7, #4]
 8002140:	0011      	movs	r1, r2
 8002142:	0018      	movs	r0, r3
 8002144:	f000 fe5a 	bl	8002dfc <vTaskPlaceOnEventList>
				/* Unlocking the queue means queue events can effect the
				event list.  It is possible that interrupts occurring now
				remove this task from the event list again - but as the
				scheduler is suspended the task will go onto the pending
				ready last instead of the actual ready list. */
				prvUnlockQueue( pxQueue );
 8002148:	6a3b      	ldr	r3, [r7, #32]
 800214a:	0018      	movs	r0, r3
 800214c:	f000 f9d0 	bl	80024f0 <prvUnlockQueue>
				/* Resuming the scheduler will move tasks from the pending
				ready list into the ready list - so it is feasible that this
				task is already in a ready list before it yields - in which
				case the yield will not cause a context switch unless there
				is also a higher priority task in the pending ready list. */
				if( xTaskResumeAll() == pdFALSE )
 8002150:	f000 fcb4 	bl	8002abc <xTaskResumeAll>
 8002154:	1e03      	subs	r3, r0, #0
 8002156:	d18a      	bne.n	800206e <xQueueGenericSend+0x74>
				{
					portYIELD_WITHIN_API();
 8002158:	f001 fc5a 	bl	8003a10 <vPortYield>
 800215c:	e787      	b.n	800206e <xQueueGenericSend+0x74>
				}
			}
			else
			{
				/* Try again. */
				prvUnlockQueue( pxQueue );
 800215e:	6a3b      	ldr	r3, [r7, #32]
 8002160:	0018      	movs	r0, r3
 8002162:	f000 f9c5 	bl	80024f0 <prvUnlockQueue>
				( void ) xTaskResumeAll();
 8002166:	f000 fca9 	bl	8002abc <xTaskResumeAll>
 800216a:	e780      	b.n	800206e <xQueueGenericSend+0x74>
			}
		}
		else
		{
			/* The timeout has expired. */
			prvUnlockQueue( pxQueue );
 800216c:	6a3b      	ldr	r3, [r7, #32]
 800216e:	0018      	movs	r0, r3
 8002170:	f000 f9be 	bl	80024f0 <prvUnlockQueue>
			( void ) xTaskResumeAll();
 8002174:	f000 fca2 	bl	8002abc <xTaskResumeAll>

			traceQUEUE_SEND_FAILED( pxQueue );
			return errQUEUE_FULL;
 8002178:	2300      	movs	r3, #0
		}
	}
}
 800217a:	0018      	movs	r0, r3
 800217c:	46bd      	mov	sp, r7
 800217e:	b00a      	add	sp, #40	; 0x28
 8002180:	bd80      	pop	{r7, pc}

08002182 <xQueueGenericSendFromISR>:
/*-----------------------------------------------------------*/

BaseType_t xQueueGenericSendFromISR( QueueHandle_t xQueue, const void * const pvItemToQueue, BaseType_t * const pxHigherPriorityTaskWoken, const BaseType_t xCopyPosition )
{
 8002182:	b590      	push	{r4, r7, lr}
 8002184:	b089      	sub	sp, #36	; 0x24
 8002186:	af00      	add	r7, sp, #0
 8002188:	60f8      	str	r0, [r7, #12]
 800218a:	60b9      	str	r1, [r7, #8]
 800218c:	607a      	str	r2, [r7, #4]
 800218e:	603b      	str	r3, [r7, #0]
BaseType_t xReturn;
UBaseType_t uxSavedInterruptStatus;
Queue_t * const pxQueue = ( Queue_t * ) xQueue;
 8002190:	68fb      	ldr	r3, [r7, #12]
 8002192:	61bb      	str	r3, [r7, #24]

	configASSERT( pxQueue );
 8002194:	69bb      	ldr	r3, [r7, #24]
 8002196:	2b00      	cmp	r3, #0
 8002198:	d101      	bne.n	800219e <xQueueGenericSendFromISR+0x1c>
 800219a:	b672      	cpsid	i
 800219c:	e7fe      	b.n	800219c <xQueueGenericSendFromISR+0x1a>
	configASSERT( !( ( pvItemToQueue == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
 800219e:	68bb      	ldr	r3, [r7, #8]
 80021a0:	2b00      	cmp	r3, #0
 80021a2:	d103      	bne.n	80021ac <xQueueGenericSendFromISR+0x2a>
 80021a4:	69bb      	ldr	r3, [r7, #24]
 80021a6:	6c1b      	ldr	r3, [r3, #64]	; 0x40
 80021a8:	2b00      	cmp	r3, #0
 80021aa:	d101      	bne.n	80021b0 <xQueueGenericSendFromISR+0x2e>
 80021ac:	2301      	movs	r3, #1
 80021ae:	e000      	b.n	80021b2 <xQueueGenericSendFromISR+0x30>
 80021b0:	2300      	movs	r3, #0
 80021b2:	2b00      	cmp	r3, #0
 80021b4:	d101      	bne.n	80021ba <xQueueGenericSendFromISR+0x38>
 80021b6:	b672      	cpsid	i
 80021b8:	e7fe      	b.n	80021b8 <xQueueGenericSendFromISR+0x36>
	configASSERT( !( ( xCopyPosition == queueOVERWRITE ) && ( pxQueue->uxLength != 1 ) ) );
 80021ba:	683b      	ldr	r3, [r7, #0]
 80021bc:	2b02      	cmp	r3, #2
 80021be:	d103      	bne.n	80021c8 <xQueueGenericSendFromISR+0x46>
 80021c0:	69bb      	ldr	r3, [r7, #24]
 80021c2:	6bdb      	ldr	r3, [r3, #60]	; 0x3c
 80021c4:	2b01      	cmp	r3, #1
 80021c6:	d101      	bne.n	80021cc <xQueueGenericSendFromISR+0x4a>
 80021c8:	2301      	movs	r3, #1
 80021ca:	e000      	b.n	80021ce <xQueueGenericSendFromISR+0x4c>
 80021cc:	2300      	movs	r3, #0
 80021ce:	2b00      	cmp	r3, #0
 80021d0:	d101      	bne.n	80021d6 <xQueueGenericSendFromISR+0x54>
 80021d2:	b672      	cpsid	i
 80021d4:	e7fe      	b.n	80021d4 <xQueueGenericSendFromISR+0x52>
	/* Similar to xQueueGenericSend, except without blocking if there is no room
	in the queue.  Also don't directly wake a task that was blocked on a queue
	read, instead return a flag to say whether a context switch is required or
	not (i.e. has a task with a higher priority than us been woken by this
	post). */
	uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
 80021d6:	f001 fc55 	bl	8003a84 <ulSetInterruptMaskFromISR>
 80021da:	0003      	movs	r3, r0
 80021dc:	617b      	str	r3, [r7, #20]
	{
		if( ( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) || ( xCopyPosition == queueOVERWRITE ) )
 80021de:	69bb      	ldr	r3, [r7, #24]
 80021e0:	6b9a      	ldr	r2, [r3, #56]	; 0x38
 80021e2:	69bb      	ldr	r3, [r7, #24]
 80021e4:	6bdb      	ldr	r3, [r3, #60]	; 0x3c
 80021e6:	429a      	cmp	r2, r3
 80021e8:	d302      	bcc.n	80021f0 <xQueueGenericSendFromISR+0x6e>
 80021ea:	683b      	ldr	r3, [r7, #0]
 80021ec:	2b02      	cmp	r3, #2
 80021ee:	d12e      	bne.n	800224e <xQueueGenericSendFromISR+0xcc>
		{
			const int8_t cTxLock = pxQueue->cTxLock;
 80021f0:	2413      	movs	r4, #19
 80021f2:	193b      	adds	r3, r7, r4
 80021f4:	69ba      	ldr	r2, [r7, #24]
 80021f6:	2145      	movs	r1, #69	; 0x45
 80021f8:	5c52      	ldrb	r2, [r2, r1]
 80021fa:	701a      	strb	r2, [r3, #0]
			/* Semaphores use xQueueGiveFromISR(), so pxQueue will not be a
			semaphore or mutex.  That means prvCopyDataToQueue() cannot result
			in a task disinheriting a priority and prvCopyDataToQueue() can be
			called here even though the disinherit function does not check if
			the scheduler is suspended before accessing the ready lists. */
			( void ) prvCopyDataToQueue( pxQueue, pvItemToQueue, xCopyPosition );
 80021fc:	683a      	ldr	r2, [r7, #0]
 80021fe:	68b9      	ldr	r1, [r7, #8]
 8002200:	69bb      	ldr	r3, [r7, #24]
 8002202:	0018      	movs	r0, r3
 8002204:	f000 f8e3 	bl	80023ce <prvCopyDataToQueue>

			/* The event list is not altered if the queue is locked.  This will
			be done when the queue is unlocked later. */
			if( cTxLock == queueUNLOCKED )
 8002208:	193b      	adds	r3, r7, r4
 800220a:	781b      	ldrb	r3, [r3, #0]
 800220c:	b25b      	sxtb	r3, r3
 800220e:	3301      	adds	r3, #1
 8002210:	d111      	bne.n	8002236 <xQueueGenericSendFromISR+0xb4>
						}
					}
				}
				#else /* configUSE_QUEUE_SETS */
				{
					if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
 8002212:	69bb      	ldr	r3, [r7, #24]
 8002214:	6a5b      	ldr	r3, [r3, #36]	; 0x24
 8002216:	2b00      	cmp	r3, #0
 8002218:	d016      	beq.n	8002248 <xQueueGenericSendFromISR+0xc6>
					{
						if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
 800221a:	69bb      	ldr	r3, [r7, #24]
 800221c:	3324      	adds	r3, #36	; 0x24
 800221e:	0018      	movs	r0, r3
 8002220:	f000 fe30 	bl	8002e84 <xTaskRemoveFromEventList>
 8002224:	1e03      	subs	r3, r0, #0
 8002226:	d00f      	beq.n	8002248 <xQueueGenericSendFromISR+0xc6>
						{
							/* The task waiting has a higher priority so record that a
							context	switch is required. */
							if( pxHigherPriorityTaskWoken != NULL )
 8002228:	687b      	ldr	r3, [r7, #4]
 800222a:	2b00      	cmp	r3, #0
 800222c:	d00c      	beq.n	8002248 <xQueueGenericSendFromISR+0xc6>
							{
								*pxHigherPriorityTaskWoken = pdTRUE;
 800222e:	687b      	ldr	r3, [r7, #4]
 8002230:	2201      	movs	r2, #1
 8002232:	601a      	str	r2, [r3, #0]
 8002234:	e008      	b.n	8002248 <xQueueGenericSendFromISR+0xc6>
			}
			else
			{
				/* Increment the lock count so the task that unlocks the queue
				knows that data was posted while it was locked. */
				pxQueue->cTxLock = ( int8_t ) ( cTxLock + 1 );
 8002236:	2313      	movs	r3, #19
 8002238:	18fb      	adds	r3, r7, r3
 800223a:	781b      	ldrb	r3, [r3, #0]
 800223c:	3301      	adds	r3, #1
 800223e:	b2db      	uxtb	r3, r3
 8002240:	b259      	sxtb	r1, r3
 8002242:	69bb      	ldr	r3, [r7, #24]
 8002244:	2245      	movs	r2, #69	; 0x45
 8002246:	5499      	strb	r1, [r3, r2]
			}

			xReturn = pdPASS;
 8002248:	2301      	movs	r3, #1
 800224a:	61fb      	str	r3, [r7, #28]
		{
 800224c:	e001      	b.n	8002252 <xQueueGenericSendFromISR+0xd0>
		}
		else
		{
			traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue );
			xReturn = errQUEUE_FULL;
 800224e:	2300      	movs	r3, #0
 8002250:	61fb      	str	r3, [r7, #28]
		}
	}
	portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
 8002252:	697b      	ldr	r3, [r7, #20]
 8002254:	0018      	movs	r0, r3
 8002256:	f001 fc1b 	bl	8003a90 <vClearInterruptMaskFromISR>

	return xReturn;
 800225a:	69fb      	ldr	r3, [r7, #28]
}
 800225c:	0018      	movs	r0, r3
 800225e:	46bd      	mov	sp, r7
 8002260:	b009      	add	sp, #36	; 0x24
 8002262:	bd90      	pop	{r4, r7, pc}

08002264 <xQueueReceive>:
	return xReturn;
}
/*-----------------------------------------------------------*/

BaseType_t xQueueReceive( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait )
{
 8002264:	b580      	push	{r7, lr}
 8002266:	b08a      	sub	sp, #40	; 0x28
 8002268:	af00      	add	r7, sp, #0
 800226a:	60f8      	str	r0, [r7, #12]
 800226c:	60b9      	str	r1, [r7, #8]
 800226e:	607a      	str	r2, [r7, #4]
BaseType_t xEntryTimeSet = pdFALSE;
 8002270:	2300      	movs	r3, #0
 8002272:	627b      	str	r3, [r7, #36]	; 0x24
TimeOut_t xTimeOut;
Queue_t * const pxQueue = ( Queue_t * ) xQueue;
 8002274:	68fb      	ldr	r3, [r7, #12]
 8002276:	623b      	str	r3, [r7, #32]

	/* Check the pointer is not NULL. */
	configASSERT( ( pxQueue ) );
 8002278:	6a3b      	ldr	r3, [r7, #32]
 800227a:	2b00      	cmp	r3, #0
 800227c:	d101      	bne.n	8002282 <xQueueReceive+0x1e>
 800227e:	b672      	cpsid	i
 8002280:	e7fe      	b.n	8002280 <xQueueReceive+0x1c>

	/* The buffer into which data is received can only be NULL if the data size
	is zero (so no data is copied into the buffer. */
	configASSERT( !( ( ( pvBuffer ) == NULL ) && ( ( pxQueue )->uxItemSize != ( UBaseType_t ) 0U ) ) );
 8002282:	68bb      	ldr	r3, [r7, #8]
 8002284:	2b00      	cmp	r3, #0
 8002286:	d103      	bne.n	8002290 <xQueueReceive+0x2c>
 8002288:	6a3b      	ldr	r3, [r7, #32]
 800228a:	6c1b      	ldr	r3, [r3, #64]	; 0x40
 800228c:	2b00      	cmp	r3, #0
 800228e:	d101      	bne.n	8002294 <xQueueReceive+0x30>
 8002290:	2301      	movs	r3, #1
 8002292:	e000      	b.n	8002296 <xQueueReceive+0x32>
 8002294:	2300      	movs	r3, #0
 8002296:	2b00      	cmp	r3, #0
 8002298:	d101      	bne.n	800229e <xQueueReceive+0x3a>
 800229a:	b672      	cpsid	i
 800229c:	e7fe      	b.n	800229c <xQueueReceive+0x38>

	/* Cannot block if the scheduler is suspended. */
	#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
	{
		configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
 800229e:	f000 ff89 	bl	80031b4 <xTaskGetSchedulerState>
 80022a2:	1e03      	subs	r3, r0, #0
 80022a4:	d102      	bne.n	80022ac <xQueueReceive+0x48>
 80022a6:	687b      	ldr	r3, [r7, #4]
 80022a8:	2b00      	cmp	r3, #0
 80022aa:	d101      	bne.n	80022b0 <xQueueReceive+0x4c>
 80022ac:	2301      	movs	r3, #1
 80022ae:	e000      	b.n	80022b2 <xQueueReceive+0x4e>
 80022b0:	2300      	movs	r3, #0
 80022b2:	2b00      	cmp	r3, #0
 80022b4:	d101      	bne.n	80022ba <xQueueReceive+0x56>
 80022b6:	b672      	cpsid	i
 80022b8:	e7fe      	b.n	80022b8 <xQueueReceive+0x54>
	statements within the function itself.  This is done in the interest
	of execution time efficiency. */

	for( ;; )
	{
		taskENTER_CRITICAL();
 80022ba:	f001 fbb9 	bl	8003a30 <vPortEnterCritical>
		{
			const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
 80022be:	6a3b      	ldr	r3, [r7, #32]
 80022c0:	6b9b      	ldr	r3, [r3, #56]	; 0x38
 80022c2:	61fb      	str	r3, [r7, #28]

			/* Is there data in the queue now?  To be running the calling task
			must be the highest priority task wanting to access the queue. */
			if( uxMessagesWaiting > ( UBaseType_t ) 0 )
 80022c4:	69fb      	ldr	r3, [r7, #28]
 80022c6:	2b00      	cmp	r3, #0
 80022c8:	d01a      	beq.n	8002300 <xQueueReceive+0x9c>
			{
				/* Data available, remove one item. */
				prvCopyDataFromQueue( pxQueue, pvBuffer );
 80022ca:	68ba      	ldr	r2, [r7, #8]
 80022cc:	6a3b      	ldr	r3, [r7, #32]
 80022ce:	0011      	movs	r1, r2
 80022d0:	0018      	movs	r0, r3
 80022d2:	f000 f8e7 	bl	80024a4 <prvCopyDataFromQueue>
				traceQUEUE_RECEIVE( pxQueue );
				pxQueue->uxMessagesWaiting = uxMessagesWaiting - ( UBaseType_t ) 1;
 80022d6:	69fb      	ldr	r3, [r7, #28]
 80022d8:	1e5a      	subs	r2, r3, #1
 80022da:	6a3b      	ldr	r3, [r7, #32]
 80022dc:	639a      	str	r2, [r3, #56]	; 0x38

				/* There is now space in the queue, were any tasks waiting to
				post to the queue?  If so, unblock the highest priority waiting
				task. */
				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
 80022de:	6a3b      	ldr	r3, [r7, #32]
 80022e0:	691b      	ldr	r3, [r3, #16]
 80022e2:	2b00      	cmp	r3, #0
 80022e4:	d008      	beq.n	80022f8 <xQueueReceive+0x94>
				{
					if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
 80022e6:	6a3b      	ldr	r3, [r7, #32]
 80022e8:	3310      	adds	r3, #16
 80022ea:	0018      	movs	r0, r3
 80022ec:	f000 fdca 	bl	8002e84 <xTaskRemoveFromEventList>
 80022f0:	1e03      	subs	r3, r0, #0
 80022f2:	d001      	beq.n	80022f8 <xQueueReceive+0x94>
					{
						queueYIELD_IF_USING_PREEMPTION();
 80022f4:	f001 fb8c 	bl	8003a10 <vPortYield>
				else
				{
					mtCOVERAGE_TEST_MARKER();
				}

				taskEXIT_CRITICAL();
 80022f8:	f001 fbac 	bl	8003a54 <vPortExitCritical>
				return pdPASS;
 80022fc:	2301      	movs	r3, #1
 80022fe:	e062      	b.n	80023c6 <xQueueReceive+0x162>
			}
			else
			{
				if( xTicksToWait == ( TickType_t ) 0 )
 8002300:	687b      	ldr	r3, [r7, #4]
 8002302:	2b00      	cmp	r3, #0
 8002304:	d103      	bne.n	800230e <xQueueReceive+0xaa>
				{
					/* The queue was empty and no block time is specified (or
					the block time has expired) so leave now. */
					taskEXIT_CRITICAL();
 8002306:	f001 fba5 	bl	8003a54 <vPortExitCritical>
					traceQUEUE_RECEIVE_FAILED( pxQueue );
					return errQUEUE_EMPTY;
 800230a:	2300      	movs	r3, #0
 800230c:	e05b      	b.n	80023c6 <xQueueReceive+0x162>
				}
				else if( xEntryTimeSet == pdFALSE )
 800230e:	6a7b      	ldr	r3, [r7, #36]	; 0x24
 8002310:	2b00      	cmp	r3, #0
 8002312:	d106      	bne.n	8002322 <xQueueReceive+0xbe>
				{
					/* The queue was empty and a block time was specified so
					configure the timeout structure. */
					vTaskInternalSetTimeOutState( &xTimeOut );
 8002314:	2314      	movs	r3, #20
 8002316:	18fb      	adds	r3, r7, r3
 8002318:	0018      	movs	r0, r3
 800231a:	f000 fe0f 	bl	8002f3c <vTaskInternalSetTimeOutState>
					xEntryTimeSet = pdTRUE;
 800231e:	2301      	movs	r3, #1
 8002320:	627b      	str	r3, [r7, #36]	; 0x24
					/* Entry time was already set. */
					mtCOVERAGE_TEST_MARKER();
				}
			}
		}
		taskEXIT_CRITICAL();
 8002322:	f001 fb97 	bl	8003a54 <vPortExitCritical>

		/* Interrupts and other tasks can send to and receive from the queue
		now the critical section has been exited. */

		vTaskSuspendAll();
 8002326:	f000 fbbd 	bl	8002aa4 <vTaskSuspendAll>
		prvLockQueue( pxQueue );
 800232a:	f001 fb81 	bl	8003a30 <vPortEnterCritical>
 800232e:	6a3b      	ldr	r3, [r7, #32]
 8002330:	2244      	movs	r2, #68	; 0x44
 8002332:	5c9b      	ldrb	r3, [r3, r2]
 8002334:	b25b      	sxtb	r3, r3
 8002336:	3301      	adds	r3, #1
 8002338:	d103      	bne.n	8002342 <xQueueReceive+0xde>
 800233a:	6a3b      	ldr	r3, [r7, #32]
 800233c:	2244      	movs	r2, #68	; 0x44
 800233e:	2100      	movs	r1, #0
 8002340:	5499      	strb	r1, [r3, r2]
 8002342:	6a3b      	ldr	r3, [r7, #32]
 8002344:	2245      	movs	r2, #69	; 0x45
 8002346:	5c9b      	ldrb	r3, [r3, r2]
 8002348:	b25b      	sxtb	r3, r3
 800234a:	3301      	adds	r3, #1
 800234c:	d103      	bne.n	8002356 <xQueueReceive+0xf2>
 800234e:	6a3b      	ldr	r3, [r7, #32]
 8002350:	2245      	movs	r2, #69	; 0x45
 8002352:	2100      	movs	r1, #0
 8002354:	5499      	strb	r1, [r3, r2]
 8002356:	f001 fb7d 	bl	8003a54 <vPortExitCritical>

		/* Update the timeout state to see if it has expired yet. */
		if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE )
 800235a:	1d3a      	adds	r2, r7, #4
 800235c:	2314      	movs	r3, #20
 800235e:	18fb      	adds	r3, r7, r3
 8002360:	0011      	movs	r1, r2
 8002362:	0018      	movs	r0, r3
 8002364:	f000 fdfe 	bl	8002f64 <xTaskCheckForTimeOut>
 8002368:	1e03      	subs	r3, r0, #0
 800236a:	d11e      	bne.n	80023aa <xQueueReceive+0x146>
		{
			/* The timeout has not expired.  If the queue is still empty place
			the task on the list of tasks waiting to receive from the queue. */
			if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
 800236c:	6a3b      	ldr	r3, [r7, #32]
 800236e:	0018      	movs	r0, r3
 8002370:	f000 f91c 	bl	80025ac <prvIsQueueEmpty>
 8002374:	1e03      	subs	r3, r0, #0
 8002376:	d011      	beq.n	800239c <xQueueReceive+0x138>
			{
				traceBLOCKING_ON_QUEUE_RECEIVE( pxQueue );
				vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait );
 8002378:	6a3b      	ldr	r3, [r7, #32]
 800237a:	3324      	adds	r3, #36	; 0x24
 800237c:	687a      	ldr	r2, [r7, #4]
 800237e:	0011      	movs	r1, r2
 8002380:	0018      	movs	r0, r3
 8002382:	f000 fd3b 	bl	8002dfc <vTaskPlaceOnEventList>
				prvUnlockQueue( pxQueue );
 8002386:	6a3b      	ldr	r3, [r7, #32]
 8002388:	0018      	movs	r0, r3
 800238a:	f000 f8b1 	bl	80024f0 <prvUnlockQueue>
				if( xTaskResumeAll() == pdFALSE )
 800238e:	f000 fb95 	bl	8002abc <xTaskResumeAll>
 8002392:	1e03      	subs	r3, r0, #0
 8002394:	d191      	bne.n	80022ba <xQueueReceive+0x56>
				{
					portYIELD_WITHIN_API();
 8002396:	f001 fb3b 	bl	8003a10 <vPortYield>
 800239a:	e78e      	b.n	80022ba <xQueueReceive+0x56>
			}
			else
			{
				/* The queue contains data again.  Loop back to try and read the
				data. */
				prvUnlockQueue( pxQueue );
 800239c:	6a3b      	ldr	r3, [r7, #32]
 800239e:	0018      	movs	r0, r3
 80023a0:	f000 f8a6 	bl	80024f0 <prvUnlockQueue>
				( void ) xTaskResumeAll();
 80023a4:	f000 fb8a 	bl	8002abc <xTaskResumeAll>
 80023a8:	e787      	b.n	80022ba <xQueueReceive+0x56>
		}
		else
		{
			/* Timed out.  If there is no data in the queue exit, otherwise loop
			back and attempt to read the data. */
			prvUnlockQueue( pxQueue );
 80023aa:	6a3b      	ldr	r3, [r7, #32]
 80023ac:	0018      	movs	r0, r3
 80023ae:	f000 f89f 	bl	80024f0 <prvUnlockQueue>
			( void ) xTaskResumeAll();
 80023b2:	f000 fb83 	bl	8002abc <xTaskResumeAll>

			if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
 80023b6:	6a3b      	ldr	r3, [r7, #32]
 80023b8:	0018      	movs	r0, r3
 80023ba:	f000 f8f7 	bl	80025ac <prvIsQueueEmpty>
 80023be:	1e03      	subs	r3, r0, #0
 80023c0:	d100      	bne.n	80023c4 <xQueueReceive+0x160>
 80023c2:	e77a      	b.n	80022ba <xQueueReceive+0x56>
			{
				traceQUEUE_RECEIVE_FAILED( pxQueue );
				return errQUEUE_EMPTY;
 80023c4:	2300      	movs	r3, #0
			{
				mtCOVERAGE_TEST_MARKER();
			}
		}
	}
}
 80023c6:	0018      	movs	r0, r3
 80023c8:	46bd      	mov	sp, r7
 80023ca:	b00a      	add	sp, #40	; 0x28
 80023cc:	bd80      	pop	{r7, pc}

080023ce <prvCopyDataToQueue>:

#endif /* configUSE_MUTEXES */
/*-----------------------------------------------------------*/

static BaseType_t prvCopyDataToQueue( Queue_t * const pxQueue, const void *pvItemToQueue, const BaseType_t xPosition )
{
 80023ce:	b580      	push	{r7, lr}
 80023d0:	b086      	sub	sp, #24
 80023d2:	af00      	add	r7, sp, #0
 80023d4:	60f8      	str	r0, [r7, #12]
 80023d6:	60b9      	str	r1, [r7, #8]
 80023d8:	607a      	str	r2, [r7, #4]
BaseType_t xReturn = pdFALSE;
 80023da:	2300      	movs	r3, #0
 80023dc:	617b      	str	r3, [r7, #20]
UBaseType_t uxMessagesWaiting;

	/* This function is called from a critical section. */

	uxMessagesWaiting = pxQueue->uxMessagesWaiting;
 80023de:	68fb      	ldr	r3, [r7, #12]
 80023e0:	6b9b      	ldr	r3, [r3, #56]	; 0x38
 80023e2:	613b      	str	r3, [r7, #16]

	if( pxQueue->uxItemSize == ( UBaseType_t ) 0 )
 80023e4:	68fb      	ldr	r3, [r7, #12]
 80023e6:	6c1b      	ldr	r3, [r3, #64]	; 0x40
 80023e8:	2b00      	cmp	r3, #0
 80023ea:	d10e      	bne.n	800240a <prvCopyDataToQueue+0x3c>
	{
		#if ( configUSE_MUTEXES == 1 )
		{
			if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX )
 80023ec:	68fb      	ldr	r3, [r7, #12]
 80023ee:	681b      	ldr	r3, [r3, #0]
 80023f0:	2b00      	cmp	r3, #0
 80023f2:	d14e      	bne.n	8002492 <prvCopyDataToQueue+0xc4>
			{
				/* The mutex is no longer being held. */
				xReturn = xTaskPriorityDisinherit( ( void * ) pxQueue->pxMutexHolder );
 80023f4:	68fb      	ldr	r3, [r7, #12]
 80023f6:	685b      	ldr	r3, [r3, #4]
 80023f8:	0018      	movs	r0, r3
 80023fa:	f000 fef7 	bl	80031ec <xTaskPriorityDisinherit>
 80023fe:	0003      	movs	r3, r0
 8002400:	617b      	str	r3, [r7, #20]
				pxQueue->pxMutexHolder = NULL;
 8002402:	68fb      	ldr	r3, [r7, #12]
 8002404:	2200      	movs	r2, #0
 8002406:	605a      	str	r2, [r3, #4]
 8002408:	e043      	b.n	8002492 <prvCopyDataToQueue+0xc4>
				mtCOVERAGE_TEST_MARKER();
			}
		}
		#endif /* configUSE_MUTEXES */
	}
	else if( xPosition == queueSEND_TO_BACK )
 800240a:	687b      	ldr	r3, [r7, #4]
 800240c:	2b00      	cmp	r3, #0
 800240e:	d119      	bne.n	8002444 <prvCopyDataToQueue+0x76>
	{
		( void ) memcpy( ( void * ) pxQueue->pcWriteTo, pvItemToQueue, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e418 MISRA exception as the casts are only redundant for some ports, plus previous logic ensures a null pointer can only be passed to memcpy() if the copy size is 0. */
 8002410:	68fb      	ldr	r3, [r7, #12]
 8002412:	6898      	ldr	r0, [r3, #8]
 8002414:	68fb      	ldr	r3, [r7, #12]
 8002416:	6c1a      	ldr	r2, [r3, #64]	; 0x40
 8002418:	68bb      	ldr	r3, [r7, #8]
 800241a:	0019      	movs	r1, r3
 800241c:	f001 fd6a 	bl	8003ef4 <memcpy>
		pxQueue->pcWriteTo += pxQueue->uxItemSize;
 8002420:	68fb      	ldr	r3, [r7, #12]
 8002422:	689a      	ldr	r2, [r3, #8]
 8002424:	68fb      	ldr	r3, [r7, #12]
 8002426:	6c1b      	ldr	r3, [r3, #64]	; 0x40
 8002428:	18d2      	adds	r2, r2, r3
 800242a:	68fb      	ldr	r3, [r7, #12]
 800242c:	609a      	str	r2, [r3, #8]
		if( pxQueue->pcWriteTo >= pxQueue->pcTail ) /*lint !e946 MISRA exception justified as comparison of pointers is the cleanest solution. */
 800242e:	68fb      	ldr	r3, [r7, #12]
 8002430:	689a      	ldr	r2, [r3, #8]
 8002432:	68fb      	ldr	r3, [r7, #12]
 8002434:	685b      	ldr	r3, [r3, #4]
 8002436:	429a      	cmp	r2, r3
 8002438:	d32b      	bcc.n	8002492 <prvCopyDataToQueue+0xc4>
		{
			pxQueue->pcWriteTo = pxQueue->pcHead;
 800243a:	68fb      	ldr	r3, [r7, #12]
 800243c:	681a      	ldr	r2, [r3, #0]
 800243e:	68fb      	ldr	r3, [r7, #12]
 8002440:	609a      	str	r2, [r3, #8]
 8002442:	e026      	b.n	8002492 <prvCopyDataToQueue+0xc4>
			mtCOVERAGE_TEST_MARKER();
		}
	}
	else
	{
		( void ) memcpy( ( void * ) pxQueue->u.pcReadFrom, pvItemToQueue, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 8002444:	68fb      	ldr	r3, [r7, #12]
 8002446:	68d8      	ldr	r0, [r3, #12]
 8002448:	68fb      	ldr	r3, [r7, #12]
 800244a:	6c1a      	ldr	r2, [r3, #64]	; 0x40
 800244c:	68bb      	ldr	r3, [r7, #8]
 800244e:	0019      	movs	r1, r3
 8002450:	f001 fd50 	bl	8003ef4 <memcpy>
		pxQueue->u.pcReadFrom -= pxQueue->uxItemSize;
 8002454:	68fb      	ldr	r3, [r7, #12]
 8002456:	68da      	ldr	r2, [r3, #12]
 8002458:	68fb      	ldr	r3, [r7, #12]
 800245a:	6c1b      	ldr	r3, [r3, #64]	; 0x40
 800245c:	425b      	negs	r3, r3
 800245e:	18d2      	adds	r2, r2, r3
 8002460:	68fb      	ldr	r3, [r7, #12]
 8002462:	60da      	str	r2, [r3, #12]
		if( pxQueue->u.pcReadFrom < pxQueue->pcHead ) /*lint !e946 MISRA exception justified as comparison of pointers is the cleanest solution. */
 8002464:	68fb      	ldr	r3, [r7, #12]
 8002466:	68da      	ldr	r2, [r3, #12]
 8002468:	68fb      	ldr	r3, [r7, #12]
 800246a:	681b      	ldr	r3, [r3, #0]
 800246c:	429a      	cmp	r2, r3
 800246e:	d207      	bcs.n	8002480 <prvCopyDataToQueue+0xb2>
		{
			pxQueue->u.pcReadFrom = ( pxQueue->pcTail - pxQueue->uxItemSize );
 8002470:	68fb      	ldr	r3, [r7, #12]
 8002472:	685a      	ldr	r2, [r3, #4]
 8002474:	68fb      	ldr	r3, [r7, #12]
 8002476:	6c1b      	ldr	r3, [r3, #64]	; 0x40
 8002478:	425b      	negs	r3, r3
 800247a:	18d2      	adds	r2, r2, r3
 800247c:	68fb      	ldr	r3, [r7, #12]
 800247e:	60da      	str	r2, [r3, #12]
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}

		if( xPosition == queueOVERWRITE )
 8002480:	687b      	ldr	r3, [r7, #4]
 8002482:	2b02      	cmp	r3, #2
 8002484:	d105      	bne.n	8002492 <prvCopyDataToQueue+0xc4>
		{
			if( uxMessagesWaiting > ( UBaseType_t ) 0 )
 8002486:	693b      	ldr	r3, [r7, #16]
 8002488:	2b00      	cmp	r3, #0
 800248a:	d002      	beq.n	8002492 <prvCopyDataToQueue+0xc4>
			{
				/* An item is not being added but overwritten, so subtract
				one from the recorded number of items in the queue so when
				one is added again below the number of recorded items remains
				correct. */
				--uxMessagesWaiting;
 800248c:	693b      	ldr	r3, [r7, #16]
 800248e:	3b01      	subs	r3, #1
 8002490:	613b      	str	r3, [r7, #16]
		{
			mtCOVERAGE_TEST_MARKER();
		}
	}

	pxQueue->uxMessagesWaiting = uxMessagesWaiting + ( UBaseType_t ) 1;
 8002492:	693b      	ldr	r3, [r7, #16]
 8002494:	1c5a      	adds	r2, r3, #1
 8002496:	68fb      	ldr	r3, [r7, #12]
 8002498:	639a      	str	r2, [r3, #56]	; 0x38

	return xReturn;
 800249a:	697b      	ldr	r3, [r7, #20]
}
 800249c:	0018      	movs	r0, r3
 800249e:	46bd      	mov	sp, r7
 80024a0:	b006      	add	sp, #24
 80024a2:	bd80      	pop	{r7, pc}

080024a4 <prvCopyDataFromQueue>:
/*-----------------------------------------------------------*/

static void prvCopyDataFromQueue( Queue_t * const pxQueue, void * const pvBuffer )
{
 80024a4:	b580      	push	{r7, lr}
 80024a6:	b082      	sub	sp, #8
 80024a8:	af00      	add	r7, sp, #0
 80024aa:	6078      	str	r0, [r7, #4]
 80024ac:	6039      	str	r1, [r7, #0]
	if( pxQueue->uxItemSize != ( UBaseType_t ) 0 )
 80024ae:	687b      	ldr	r3, [r7, #4]
 80024b0:	6c1b      	ldr	r3, [r3, #64]	; 0x40
 80024b2:	2b00      	cmp	r3, #0
 80024b4:	d018      	beq.n	80024e8 <prvCopyDataFromQueue+0x44>
	{
		pxQueue->u.pcReadFrom += pxQueue->uxItemSize;
 80024b6:	687b      	ldr	r3, [r7, #4]
 80024b8:	68da      	ldr	r2, [r3, #12]
 80024ba:	687b      	ldr	r3, [r7, #4]
 80024bc:	6c1b      	ldr	r3, [r3, #64]	; 0x40
 80024be:	18d2      	adds	r2, r2, r3
 80024c0:	687b      	ldr	r3, [r7, #4]
 80024c2:	60da      	str	r2, [r3, #12]
		if( pxQueue->u.pcReadFrom >= pxQueue->pcTail ) /*lint !e946 MISRA exception justified as use of the relational operator is the cleanest solutions. */
 80024c4:	687b      	ldr	r3, [r7, #4]
 80024c6:	68da      	ldr	r2, [r3, #12]
 80024c8:	687b      	ldr	r3, [r7, #4]
 80024ca:	685b      	ldr	r3, [r3, #4]
 80024cc:	429a      	cmp	r2, r3
 80024ce:	d303      	bcc.n	80024d8 <prvCopyDataFromQueue+0x34>
		{
			pxQueue->u.pcReadFrom = pxQueue->pcHead;
 80024d0:	687b      	ldr	r3, [r7, #4]
 80024d2:	681a      	ldr	r2, [r3, #0]
 80024d4:	687b      	ldr	r3, [r7, #4]
 80024d6:	60da      	str	r2, [r3, #12]
		}
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}
		( void ) memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->u.pcReadFrom, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e418 MISRA exception as the casts are only redundant for some ports.  Also previous logic ensures a null pointer can only be passed to memcpy() when the count is 0. */
 80024d8:	687b      	ldr	r3, [r7, #4]
 80024da:	68d9      	ldr	r1, [r3, #12]
 80024dc:	687b      	ldr	r3, [r7, #4]
 80024de:	6c1a      	ldr	r2, [r3, #64]	; 0x40
 80024e0:	683b      	ldr	r3, [r7, #0]
 80024e2:	0018      	movs	r0, r3
 80024e4:	f001 fd06 	bl	8003ef4 <memcpy>
	}
}
 80024e8:	46c0      	nop			; (mov r8, r8)
 80024ea:	46bd      	mov	sp, r7
 80024ec:	b002      	add	sp, #8
 80024ee:	bd80      	pop	{r7, pc}

080024f0 <prvUnlockQueue>:
/*-----------------------------------------------------------*/

static void prvUnlockQueue( Queue_t * const pxQueue )
{
 80024f0:	b580      	push	{r7, lr}
 80024f2:	b084      	sub	sp, #16
 80024f4:	af00      	add	r7, sp, #0
 80024f6:	6078      	str	r0, [r7, #4]

	/* The lock counts contains the number of extra data items placed or
	removed from the queue while the queue was locked.  When a queue is
	locked items can be added or removed, but the event lists cannot be
	updated. */
	taskENTER_CRITICAL();
 80024f8:	f001 fa9a 	bl	8003a30 <vPortEnterCritical>
	{
		int8_t cTxLock = pxQueue->cTxLock;
 80024fc:	230f      	movs	r3, #15
 80024fe:	18fb      	adds	r3, r7, r3
 8002500:	687a      	ldr	r2, [r7, #4]
 8002502:	2145      	movs	r1, #69	; 0x45
 8002504:	5c52      	ldrb	r2, [r2, r1]
 8002506:	701a      	strb	r2, [r3, #0]

		/* See if data was added to the queue while it was locked. */
		while( cTxLock > queueLOCKED_UNMODIFIED )
 8002508:	e013      	b.n	8002532 <prvUnlockQueue+0x42>
			}
			#else /* configUSE_QUEUE_SETS */
			{
				/* Tasks that are removed from the event list will get added to
				the pending ready list as the scheduler is still suspended. */
				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
 800250a:	687b      	ldr	r3, [r7, #4]
 800250c:	6a5b      	ldr	r3, [r3, #36]	; 0x24
 800250e:	2b00      	cmp	r3, #0
 8002510:	d016      	beq.n	8002540 <prvUnlockQueue+0x50>
				{
					if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
 8002512:	687b      	ldr	r3, [r7, #4]
 8002514:	3324      	adds	r3, #36	; 0x24
 8002516:	0018      	movs	r0, r3
 8002518:	f000 fcb4 	bl	8002e84 <xTaskRemoveFromEventList>
 800251c:	1e03      	subs	r3, r0, #0
 800251e:	d001      	beq.n	8002524 <prvUnlockQueue+0x34>
					{
						/* The task waiting has a higher priority so record that
						a context switch is required. */
						vTaskMissedYield();
 8002520:	f000 fd70 	bl	8003004 <vTaskMissedYield>
					break;
				}
			}
			#endif /* configUSE_QUEUE_SETS */

			--cTxLock;
 8002524:	210f      	movs	r1, #15
 8002526:	187b      	adds	r3, r7, r1
 8002528:	781b      	ldrb	r3, [r3, #0]
 800252a:	3b01      	subs	r3, #1
 800252c:	b2da      	uxtb	r2, r3
 800252e:	187b      	adds	r3, r7, r1
 8002530:	701a      	strb	r2, [r3, #0]
		while( cTxLock > queueLOCKED_UNMODIFIED )
 8002532:	230f      	movs	r3, #15
 8002534:	18fb      	adds	r3, r7, r3
 8002536:	781b      	ldrb	r3, [r3, #0]
 8002538:	b25b      	sxtb	r3, r3
 800253a:	2b00      	cmp	r3, #0
 800253c:	dce5      	bgt.n	800250a <prvUnlockQueue+0x1a>
 800253e:	e000      	b.n	8002542 <prvUnlockQueue+0x52>
					break;
 8002540:	46c0      	nop			; (mov r8, r8)
		}

		pxQueue->cTxLock = queueUNLOCKED;
 8002542:	687b      	ldr	r3, [r7, #4]
 8002544:	2245      	movs	r2, #69	; 0x45
 8002546:	21ff      	movs	r1, #255	; 0xff
 8002548:	5499      	strb	r1, [r3, r2]
	}
	taskEXIT_CRITICAL();
 800254a:	f001 fa83 	bl	8003a54 <vPortExitCritical>

	/* Do the same for the Rx lock. */
	taskENTER_CRITICAL();
 800254e:	f001 fa6f 	bl	8003a30 <vPortEnterCritical>
	{
		int8_t cRxLock = pxQueue->cRxLock;
 8002552:	230e      	movs	r3, #14
 8002554:	18fb      	adds	r3, r7, r3
 8002556:	687a      	ldr	r2, [r7, #4]
 8002558:	2144      	movs	r1, #68	; 0x44
 800255a:	5c52      	ldrb	r2, [r2, r1]
 800255c:	701a      	strb	r2, [r3, #0]

		while( cRxLock > queueLOCKED_UNMODIFIED )
 800255e:	e013      	b.n	8002588 <prvUnlockQueue+0x98>
		{
			if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
 8002560:	687b      	ldr	r3, [r7, #4]
 8002562:	691b      	ldr	r3, [r3, #16]
 8002564:	2b00      	cmp	r3, #0
 8002566:	d016      	beq.n	8002596 <prvUnlockQueue+0xa6>
			{
				if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
 8002568:	687b      	ldr	r3, [r7, #4]
 800256a:	3310      	adds	r3, #16
 800256c:	0018      	movs	r0, r3
 800256e:	f000 fc89 	bl	8002e84 <xTaskRemoveFromEventList>
 8002572:	1e03      	subs	r3, r0, #0
 8002574:	d001      	beq.n	800257a <prvUnlockQueue+0x8a>
				{
					vTaskMissedYield();
 8002576:	f000 fd45 	bl	8003004 <vTaskMissedYield>
				else
				{
					mtCOVERAGE_TEST_MARKER();
				}

				--cRxLock;
 800257a:	210e      	movs	r1, #14
 800257c:	187b      	adds	r3, r7, r1
 800257e:	781b      	ldrb	r3, [r3, #0]
 8002580:	3b01      	subs	r3, #1
 8002582:	b2da      	uxtb	r2, r3
 8002584:	187b      	adds	r3, r7, r1
 8002586:	701a      	strb	r2, [r3, #0]
		while( cRxLock > queueLOCKED_UNMODIFIED )
 8002588:	230e      	movs	r3, #14
 800258a:	18fb      	adds	r3, r7, r3
 800258c:	781b      	ldrb	r3, [r3, #0]
 800258e:	b25b      	sxtb	r3, r3
 8002590:	2b00      	cmp	r3, #0
 8002592:	dce5      	bgt.n	8002560 <prvUnlockQueue+0x70>
 8002594:	e000      	b.n	8002598 <prvUnlockQueue+0xa8>
			}
			else
			{
				break;
 8002596:	46c0      	nop			; (mov r8, r8)
			}
		}

		pxQueue->cRxLock = queueUNLOCKED;
 8002598:	687b      	ldr	r3, [r7, #4]
 800259a:	2244      	movs	r2, #68	; 0x44
 800259c:	21ff      	movs	r1, #255	; 0xff
 800259e:	5499      	strb	r1, [r3, r2]
	}
	taskEXIT_CRITICAL();
 80025a0:	f001 fa58 	bl	8003a54 <vPortExitCritical>
}
 80025a4:	46c0      	nop			; (mov r8, r8)
 80025a6:	46bd      	mov	sp, r7
 80025a8:	b004      	add	sp, #16
 80025aa:	bd80      	pop	{r7, pc}

080025ac <prvIsQueueEmpty>:
/*-----------------------------------------------------------*/

static BaseType_t prvIsQueueEmpty( const Queue_t *pxQueue )
{
 80025ac:	b580      	push	{r7, lr}
 80025ae:	b084      	sub	sp, #16
 80025b0:	af00      	add	r7, sp, #0
 80025b2:	6078      	str	r0, [r7, #4]
BaseType_t xReturn;

	taskENTER_CRITICAL();
 80025b4:	f001 fa3c 	bl	8003a30 <vPortEnterCritical>
	{
		if( pxQueue->uxMessagesWaiting == ( UBaseType_t )  0 )
 80025b8:	687b      	ldr	r3, [r7, #4]
 80025ba:	6b9b      	ldr	r3, [r3, #56]	; 0x38
 80025bc:	2b00      	cmp	r3, #0
 80025be:	d102      	bne.n	80025c6 <prvIsQueueEmpty+0x1a>
		{
			xReturn = pdTRUE;
 80025c0:	2301      	movs	r3, #1
 80025c2:	60fb      	str	r3, [r7, #12]
 80025c4:	e001      	b.n	80025ca <prvIsQueueEmpty+0x1e>
		}
		else
		{
			xReturn = pdFALSE;
 80025c6:	2300      	movs	r3, #0
 80025c8:	60fb      	str	r3, [r7, #12]
		}
	}
	taskEXIT_CRITICAL();
 80025ca:	f001 fa43 	bl	8003a54 <vPortExitCritical>

	return xReturn;
 80025ce:	68fb      	ldr	r3, [r7, #12]
}
 80025d0:	0018      	movs	r0, r3
 80025d2:	46bd      	mov	sp, r7
 80025d4:	b004      	add	sp, #16
 80025d6:	bd80      	pop	{r7, pc}

080025d8 <prvIsQueueFull>:
	return xReturn;
} /*lint !e818 xQueue could not be pointer to const because it is a typedef. */
/*-----------------------------------------------------------*/

static BaseType_t prvIsQueueFull( const Queue_t *pxQueue )
{
 80025d8:	b580      	push	{r7, lr}
 80025da:	b084      	sub	sp, #16
 80025dc:	af00      	add	r7, sp, #0
 80025de:	6078      	str	r0, [r7, #4]
BaseType_t xReturn;

	taskENTER_CRITICAL();
 80025e0:	f001 fa26 	bl	8003a30 <vPortEnterCritical>
	{
		if( pxQueue->uxMessagesWaiting == pxQueue->uxLength )
 80025e4:	687b      	ldr	r3, [r7, #4]
 80025e6:	6b9a      	ldr	r2, [r3, #56]	; 0x38
 80025e8:	687b      	ldr	r3, [r7, #4]
 80025ea:	6bdb      	ldr	r3, [r3, #60]	; 0x3c
 80025ec:	429a      	cmp	r2, r3
 80025ee:	d102      	bne.n	80025f6 <prvIsQueueFull+0x1e>
		{
			xReturn = pdTRUE;
 80025f0:	2301      	movs	r3, #1
 80025f2:	60fb      	str	r3, [r7, #12]
 80025f4:	e001      	b.n	80025fa <prvIsQueueFull+0x22>
		}
		else
		{
			xReturn = pdFALSE;
 80025f6:	2300      	movs	r3, #0
 80025f8:	60fb      	str	r3, [r7, #12]
		}
	}
	taskEXIT_CRITICAL();
 80025fa:	f001 fa2b 	bl	8003a54 <vPortExitCritical>

	return xReturn;
 80025fe:	68fb      	ldr	r3, [r7, #12]
}
 8002600:	0018      	movs	r0, r3
 8002602:	46bd      	mov	sp, r7
 8002604:	b004      	add	sp, #16
 8002606:	bd80      	pop	{r7, pc}

08002608 <vQueueAddToRegistry>:
/*-----------------------------------------------------------*/

#if ( configQUEUE_REGISTRY_SIZE > 0 )

	void vQueueAddToRegistry( QueueHandle_t xQueue, const char *pcQueueName ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
	{
 8002608:	b580      	push	{r7, lr}
 800260a:	b084      	sub	sp, #16
 800260c:	af00      	add	r7, sp, #0
 800260e:	6078      	str	r0, [r7, #4]
 8002610:	6039      	str	r1, [r7, #0]
	UBaseType_t ux;

		/* See if there is an empty space in the registry.  A NULL name denotes
		a free slot. */
		for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ )
 8002612:	2300      	movs	r3, #0
 8002614:	60fb      	str	r3, [r7, #12]
 8002616:	e015      	b.n	8002644 <vQueueAddToRegistry+0x3c>
		{
			if( xQueueRegistry[ ux ].pcQueueName == NULL )
 8002618:	4b0e      	ldr	r3, [pc, #56]	; (8002654 <vQueueAddToRegistry+0x4c>)
 800261a:	68fa      	ldr	r2, [r7, #12]
 800261c:	00d2      	lsls	r2, r2, #3
 800261e:	58d3      	ldr	r3, [r2, r3]
 8002620:	2b00      	cmp	r3, #0
 8002622:	d10c      	bne.n	800263e <vQueueAddToRegistry+0x36>
			{
				/* Store the information on this queue. */
				xQueueRegistry[ ux ].pcQueueName = pcQueueName;
 8002624:	4b0b      	ldr	r3, [pc, #44]	; (8002654 <vQueueAddToRegistry+0x4c>)
 8002626:	68fa      	ldr	r2, [r7, #12]
 8002628:	00d2      	lsls	r2, r2, #3
 800262a:	6839      	ldr	r1, [r7, #0]
 800262c:	50d1      	str	r1, [r2, r3]
				xQueueRegistry[ ux ].xHandle = xQueue;
 800262e:	4a09      	ldr	r2, [pc, #36]	; (8002654 <vQueueAddToRegistry+0x4c>)
 8002630:	68fb      	ldr	r3, [r7, #12]
 8002632:	00db      	lsls	r3, r3, #3
 8002634:	18d3      	adds	r3, r2, r3
 8002636:	3304      	adds	r3, #4
 8002638:	687a      	ldr	r2, [r7, #4]
 800263a:	601a      	str	r2, [r3, #0]

				traceQUEUE_REGISTRY_ADD( xQueue, pcQueueName );
				break;
 800263c:	e005      	b.n	800264a <vQueueAddToRegistry+0x42>
		for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ )
 800263e:	68fb      	ldr	r3, [r7, #12]
 8002640:	3301      	adds	r3, #1
 8002642:	60fb      	str	r3, [r7, #12]
 8002644:	68fb      	ldr	r3, [r7, #12]
 8002646:	2b07      	cmp	r3, #7
 8002648:	d9e6      	bls.n	8002618 <vQueueAddToRegistry+0x10>
			else
			{
				mtCOVERAGE_TEST_MARKER();
			}
		}
	}
 800264a:	46c0      	nop			; (mov r8, r8)
 800264c:	46bd      	mov	sp, r7
 800264e:	b004      	add	sp, #16
 8002650:	bd80      	pop	{r7, pc}
 8002652:	46c0      	nop			; (mov r8, r8)
 8002654:	2000197c 	.word	0x2000197c

08002658 <vQueueWaitForMessageRestricted>:
/*-----------------------------------------------------------*/

#if ( configUSE_TIMERS == 1 )

	void vQueueWaitForMessageRestricted( QueueHandle_t xQueue, TickType_t xTicksToWait, const BaseType_t xWaitIndefinitely )
	{
 8002658:	b580      	push	{r7, lr}
 800265a:	b086      	sub	sp, #24
 800265c:	af00      	add	r7, sp, #0
 800265e:	60f8      	str	r0, [r7, #12]
 8002660:	60b9      	str	r1, [r7, #8]
 8002662:	607a      	str	r2, [r7, #4]
	Queue_t * const pxQueue = ( Queue_t * ) xQueue;
 8002664:	68fb      	ldr	r3, [r7, #12]
 8002666:	617b      	str	r3, [r7, #20]
		will not actually cause the task to block, just place it on a blocked
		list.  It will not block until the scheduler is unlocked - at which
		time a yield will be performed.  If an item is added to the queue while
		the queue is locked, and the calling task blocks on the queue, then the
		calling task will be immediately unblocked when the queue is unlocked. */
		prvLockQueue( pxQueue );
 8002668:	f001 f9e2 	bl	8003a30 <vPortEnterCritical>
 800266c:	697b      	ldr	r3, [r7, #20]
 800266e:	2244      	movs	r2, #68	; 0x44
 8002670:	5c9b      	ldrb	r3, [r3, r2]
 8002672:	b25b      	sxtb	r3, r3
 8002674:	3301      	adds	r3, #1
 8002676:	d103      	bne.n	8002680 <vQueueWaitForMessageRestricted+0x28>
 8002678:	697b      	ldr	r3, [r7, #20]
 800267a:	2244      	movs	r2, #68	; 0x44
 800267c:	2100      	movs	r1, #0
 800267e:	5499      	strb	r1, [r3, r2]
 8002680:	697b      	ldr	r3, [r7, #20]
 8002682:	2245      	movs	r2, #69	; 0x45
 8002684:	5c9b      	ldrb	r3, [r3, r2]
 8002686:	b25b      	sxtb	r3, r3
 8002688:	3301      	adds	r3, #1
 800268a:	d103      	bne.n	8002694 <vQueueWaitForMessageRestricted+0x3c>
 800268c:	697b      	ldr	r3, [r7, #20]
 800268e:	2245      	movs	r2, #69	; 0x45
 8002690:	2100      	movs	r1, #0
 8002692:	5499      	strb	r1, [r3, r2]
 8002694:	f001 f9de 	bl	8003a54 <vPortExitCritical>
		if( pxQueue->uxMessagesWaiting == ( UBaseType_t ) 0U )
 8002698:	697b      	ldr	r3, [r7, #20]
 800269a:	6b9b      	ldr	r3, [r3, #56]	; 0x38
 800269c:	2b00      	cmp	r3, #0
 800269e:	d106      	bne.n	80026ae <vQueueWaitForMessageRestricted+0x56>
		{
			/* There is nothing in the queue, block for the specified period. */
			vTaskPlaceOnEventListRestricted( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait, xWaitIndefinitely );
 80026a0:	697b      	ldr	r3, [r7, #20]
 80026a2:	3324      	adds	r3, #36	; 0x24
 80026a4:	687a      	ldr	r2, [r7, #4]
 80026a6:	68b9      	ldr	r1, [r7, #8]
 80026a8:	0018      	movs	r0, r3
 80026aa:	f000 fbc5 	bl	8002e38 <vTaskPlaceOnEventListRestricted>
		}
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}
		prvUnlockQueue( pxQueue );
 80026ae:	697b      	ldr	r3, [r7, #20]
 80026b0:	0018      	movs	r0, r3
 80026b2:	f7ff ff1d 	bl	80024f0 <prvUnlockQueue>
	}
 80026b6:	46c0      	nop			; (mov r8, r8)
 80026b8:	46bd      	mov	sp, r7
 80026ba:	b006      	add	sp, #24
 80026bc:	bd80      	pop	{r7, pc}

080026be <xTaskCreateStatic>:
									const uint32_t ulStackDepth,
									void * const pvParameters,
									UBaseType_t uxPriority,
									StackType_t * const puxStackBuffer,
									StaticTask_t * const pxTaskBuffer )
	{
 80026be:	b590      	push	{r4, r7, lr}
 80026c0:	b08d      	sub	sp, #52	; 0x34
 80026c2:	af04      	add	r7, sp, #16
 80026c4:	60f8      	str	r0, [r7, #12]
 80026c6:	60b9      	str	r1, [r7, #8]
 80026c8:	607a      	str	r2, [r7, #4]
 80026ca:	603b      	str	r3, [r7, #0]
	TCB_t *pxNewTCB;
	TaskHandle_t xReturn;

		configASSERT( puxStackBuffer != NULL );
 80026cc:	6b7b      	ldr	r3, [r7, #52]	; 0x34
 80026ce:	2b00      	cmp	r3, #0
 80026d0:	d101      	bne.n	80026d6 <xTaskCreateStatic+0x18>
 80026d2:	b672      	cpsid	i
 80026d4:	e7fe      	b.n	80026d4 <xTaskCreateStatic+0x16>
		configASSERT( pxTaskBuffer != NULL );
 80026d6:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 80026d8:	2b00      	cmp	r3, #0
 80026da:	d101      	bne.n	80026e0 <xTaskCreateStatic+0x22>
 80026dc:	b672      	cpsid	i
 80026de:	e7fe      	b.n	80026de <xTaskCreateStatic+0x20>
		#if( configASSERT_DEFINED == 1 )
		{
			/* Sanity check that the size of the structure used to declare a
			variable of type StaticTask_t equals the size of the real task
			structure. */
			volatile size_t xSize = sizeof( StaticTask_t );
 80026e0:	235c      	movs	r3, #92	; 0x5c
 80026e2:	617b      	str	r3, [r7, #20]
			configASSERT( xSize == sizeof( TCB_t ) );
 80026e4:	697b      	ldr	r3, [r7, #20]
 80026e6:	2b5c      	cmp	r3, #92	; 0x5c
 80026e8:	d001      	beq.n	80026ee <xTaskCreateStatic+0x30>
 80026ea:	b672      	cpsid	i
 80026ec:	e7fe      	b.n	80026ec <xTaskCreateStatic+0x2e>
		}
		#endif /* configASSERT_DEFINED */


		if( ( pxTaskBuffer != NULL ) && ( puxStackBuffer != NULL ) )
 80026ee:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 80026f0:	2b00      	cmp	r3, #0
 80026f2:	d020      	beq.n	8002736 <xTaskCreateStatic+0x78>
 80026f4:	6b7b      	ldr	r3, [r7, #52]	; 0x34
 80026f6:	2b00      	cmp	r3, #0
 80026f8:	d01d      	beq.n	8002736 <xTaskCreateStatic+0x78>
		{
			/* The memory used for the task's TCB and stack are passed into this
			function - use them. */
			pxNewTCB = ( TCB_t * ) pxTaskBuffer; /*lint !e740 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */
 80026fa:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 80026fc:	61fb      	str	r3, [r7, #28]
			pxNewTCB->pxStack = ( StackType_t * ) puxStackBuffer;
 80026fe:	69fb      	ldr	r3, [r7, #28]
 8002700:	6b7a      	ldr	r2, [r7, #52]	; 0x34
 8002702:	631a      	str	r2, [r3, #48]	; 0x30

			#if( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e731 Macro has been consolidated for readability reasons. */
			{
				/* Tasks can be created statically or dynamically, so note this
				task was created statically in case the task is later deleted. */
				pxNewTCB->ucStaticallyAllocated = tskSTATICALLY_ALLOCATED_STACK_AND_TCB;
 8002704:	69fb      	ldr	r3, [r7, #28]
 8002706:	2259      	movs	r2, #89	; 0x59
 8002708:	2102      	movs	r1, #2
 800270a:	5499      	strb	r1, [r3, r2]
			}
			#endif /* configSUPPORT_DYNAMIC_ALLOCATION */

			prvInitialiseNewTask( pxTaskCode, pcName, ulStackDepth, pvParameters, uxPriority, &xReturn, pxNewTCB, NULL );
 800270c:	683c      	ldr	r4, [r7, #0]
 800270e:	687a      	ldr	r2, [r7, #4]
 8002710:	68b9      	ldr	r1, [r7, #8]
 8002712:	68f8      	ldr	r0, [r7, #12]
 8002714:	2300      	movs	r3, #0
 8002716:	9303      	str	r3, [sp, #12]
 8002718:	69fb      	ldr	r3, [r7, #28]
 800271a:	9302      	str	r3, [sp, #8]
 800271c:	2318      	movs	r3, #24
 800271e:	18fb      	adds	r3, r7, r3
 8002720:	9301      	str	r3, [sp, #4]
 8002722:	6b3b      	ldr	r3, [r7, #48]	; 0x30
 8002724:	9300      	str	r3, [sp, #0]
 8002726:	0023      	movs	r3, r4
 8002728:	f000 f858 	bl	80027dc <prvInitialiseNewTask>
			prvAddNewTaskToReadyList( pxNewTCB );
 800272c:	69fb      	ldr	r3, [r7, #28]
 800272e:	0018      	movs	r0, r3
 8002730:	f000 f8d6 	bl	80028e0 <prvAddNewTaskToReadyList>
 8002734:	e001      	b.n	800273a <xTaskCreateStatic+0x7c>
		}
		else
		{
			xReturn = NULL;
 8002736:	2300      	movs	r3, #0
 8002738:	61bb      	str	r3, [r7, #24]
		}

		return xReturn;
 800273a:	69bb      	ldr	r3, [r7, #24]
	}
 800273c:	0018      	movs	r0, r3
 800273e:	46bd      	mov	sp, r7
 8002740:	b009      	add	sp, #36	; 0x24
 8002742:	bd90      	pop	{r4, r7, pc}

08002744 <xTaskCreate>:
							const char * const pcName,		/*lint !e971 Unqualified char types are allowed for strings and single characters only. */
							const configSTACK_DEPTH_TYPE usStackDepth,
							void * const pvParameters,
							UBaseType_t uxPriority,
							TaskHandle_t * const pxCreatedTask )
	{
 8002744:	b590      	push	{r4, r7, lr}
 8002746:	b08d      	sub	sp, #52	; 0x34
 8002748:	af04      	add	r7, sp, #16
 800274a:	60f8      	str	r0, [r7, #12]
 800274c:	60b9      	str	r1, [r7, #8]
 800274e:	603b      	str	r3, [r7, #0]
 8002750:	1dbb      	adds	r3, r7, #6
 8002752:	801a      	strh	r2, [r3, #0]
		#else /* portSTACK_GROWTH */
		{
		StackType_t *pxStack;

			/* Allocate space for the stack used by the task being created. */
			pxStack = ( StackType_t * ) pvPortMalloc( ( ( ( size_t ) usStackDepth ) * sizeof( StackType_t ) ) ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 8002754:	1dbb      	adds	r3, r7, #6
 8002756:	881b      	ldrh	r3, [r3, #0]
 8002758:	009b      	lsls	r3, r3, #2
 800275a:	0018      	movs	r0, r3
 800275c:	f001 fa00 	bl	8003b60 <pvPortMalloc>
 8002760:	0003      	movs	r3, r0
 8002762:	617b      	str	r3, [r7, #20]

			if( pxStack != NULL )
 8002764:	697b      	ldr	r3, [r7, #20]
 8002766:	2b00      	cmp	r3, #0
 8002768:	d010      	beq.n	800278c <xTaskCreate+0x48>
			{
				/* Allocate space for the TCB. */
				pxNewTCB = ( TCB_t * ) pvPortMalloc( sizeof( TCB_t ) ); /*lint !e961 MISRA exception as the casts are only redundant for some paths. */
 800276a:	205c      	movs	r0, #92	; 0x5c
 800276c:	f001 f9f8 	bl	8003b60 <pvPortMalloc>
 8002770:	0003      	movs	r3, r0
 8002772:	61fb      	str	r3, [r7, #28]

				if( pxNewTCB != NULL )
 8002774:	69fb      	ldr	r3, [r7, #28]
 8002776:	2b00      	cmp	r3, #0
 8002778:	d003      	beq.n	8002782 <xTaskCreate+0x3e>
				{
					/* Store the stack location in the TCB. */
					pxNewTCB->pxStack = pxStack;
 800277a:	69fb      	ldr	r3, [r7, #28]
 800277c:	697a      	ldr	r2, [r7, #20]
 800277e:	631a      	str	r2, [r3, #48]	; 0x30
 8002780:	e006      	b.n	8002790 <xTaskCreate+0x4c>
				}
				else
				{
					/* The stack cannot be used as the TCB was not created.  Free
					it again. */
					vPortFree( pxStack );
 8002782:	697b      	ldr	r3, [r7, #20]
 8002784:	0018      	movs	r0, r3
 8002786:	f001 fa91 	bl	8003cac <vPortFree>
 800278a:	e001      	b.n	8002790 <xTaskCreate+0x4c>
				}
			}
			else
			{
				pxNewTCB = NULL;
 800278c:	2300      	movs	r3, #0
 800278e:	61fb      	str	r3, [r7, #28]
			}
		}
		#endif /* portSTACK_GROWTH */

		if( pxNewTCB != NULL )
 8002790:	69fb      	ldr	r3, [r7, #28]
 8002792:	2b00      	cmp	r3, #0
 8002794:	d01a      	beq.n	80027cc <xTaskCreate+0x88>
		{
			#if( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e731 Macro has been consolidated for readability reasons. */
			{
				/* Tasks can be created statically or dynamically, so note this
				task was created dynamically in case it is later deleted. */
				pxNewTCB->ucStaticallyAllocated = tskDYNAMICALLY_ALLOCATED_STACK_AND_TCB;
 8002796:	69fb      	ldr	r3, [r7, #28]
 8002798:	2259      	movs	r2, #89	; 0x59
 800279a:	2100      	movs	r1, #0
 800279c:	5499      	strb	r1, [r3, r2]
			}
			#endif /* configSUPPORT_STATIC_ALLOCATION */

			prvInitialiseNewTask( pxTaskCode, pcName, ( uint32_t ) usStackDepth, pvParameters, uxPriority, pxCreatedTask, pxNewTCB, NULL );
 800279e:	1dbb      	adds	r3, r7, #6
 80027a0:	881a      	ldrh	r2, [r3, #0]
 80027a2:	683c      	ldr	r4, [r7, #0]
 80027a4:	68b9      	ldr	r1, [r7, #8]
 80027a6:	68f8      	ldr	r0, [r7, #12]
 80027a8:	2300      	movs	r3, #0
 80027aa:	9303      	str	r3, [sp, #12]
 80027ac:	69fb      	ldr	r3, [r7, #28]
 80027ae:	9302      	str	r3, [sp, #8]
 80027b0:	6b7b      	ldr	r3, [r7, #52]	; 0x34
 80027b2:	9301      	str	r3, [sp, #4]
 80027b4:	6b3b      	ldr	r3, [r7, #48]	; 0x30
 80027b6:	9300      	str	r3, [sp, #0]
 80027b8:	0023      	movs	r3, r4
 80027ba:	f000 f80f 	bl	80027dc <prvInitialiseNewTask>
			prvAddNewTaskToReadyList( pxNewTCB );
 80027be:	69fb      	ldr	r3, [r7, #28]
 80027c0:	0018      	movs	r0, r3
 80027c2:	f000 f88d 	bl	80028e0 <prvAddNewTaskToReadyList>
			xReturn = pdPASS;
 80027c6:	2301      	movs	r3, #1
 80027c8:	61bb      	str	r3, [r7, #24]
 80027ca:	e002      	b.n	80027d2 <xTaskCreate+0x8e>
		}
		else
		{
			xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY;
 80027cc:	2301      	movs	r3, #1
 80027ce:	425b      	negs	r3, r3
 80027d0:	61bb      	str	r3, [r7, #24]
		}

		return xReturn;
 80027d2:	69bb      	ldr	r3, [r7, #24]
	}
 80027d4:	0018      	movs	r0, r3
 80027d6:	46bd      	mov	sp, r7
 80027d8:	b009      	add	sp, #36	; 0x24
 80027da:	bd90      	pop	{r4, r7, pc}

080027dc <prvInitialiseNewTask>:
									void * const pvParameters,
									UBaseType_t uxPriority,
									TaskHandle_t * const pxCreatedTask,
									TCB_t *pxNewTCB,
									const MemoryRegion_t * const xRegions )
{
 80027dc:	b580      	push	{r7, lr}
 80027de:	b086      	sub	sp, #24
 80027e0:	af00      	add	r7, sp, #0
 80027e2:	60f8      	str	r0, [r7, #12]
 80027e4:	60b9      	str	r1, [r7, #8]
 80027e6:	607a      	str	r2, [r7, #4]
 80027e8:	603b      	str	r3, [r7, #0]

	/* Avoid dependency on memset() if it is not required. */
	#if( tskSET_NEW_STACKS_TO_KNOWN_VALUE == 1 )
	{
		/* Fill the stack with a known value to assist debugging. */
		( void ) memset( pxNewTCB->pxStack, ( int ) tskSTACK_FILL_BYTE, ( size_t ) ulStackDepth * sizeof( StackType_t ) );
 80027ea:	6abb      	ldr	r3, [r7, #40]	; 0x28
 80027ec:	6b18      	ldr	r0, [r3, #48]	; 0x30
 80027ee:	687b      	ldr	r3, [r7, #4]
 80027f0:	009b      	lsls	r3, r3, #2
 80027f2:	001a      	movs	r2, r3
 80027f4:	21a5      	movs	r1, #165	; 0xa5
 80027f6:	f001 fb86 	bl	8003f06 <memset>
	grows from high memory to low (as per the 80x86) or vice versa.
	portSTACK_GROWTH is used to make the result positive or negative as required
	by the port. */
	#if( portSTACK_GROWTH < 0 )
	{
		pxTopOfStack = pxNewTCB->pxStack + ( ulStackDepth - ( uint32_t ) 1 );
 80027fa:	6abb      	ldr	r3, [r7, #40]	; 0x28
 80027fc:	6b1a      	ldr	r2, [r3, #48]	; 0x30
 80027fe:	687b      	ldr	r3, [r7, #4]
 8002800:	4936      	ldr	r1, [pc, #216]	; (80028dc <prvInitialiseNewTask+0x100>)
 8002802:	468c      	mov	ip, r1
 8002804:	4463      	add	r3, ip
 8002806:	009b      	lsls	r3, r3, #2
 8002808:	18d3      	adds	r3, r2, r3
 800280a:	613b      	str	r3, [r7, #16]
		pxTopOfStack = ( StackType_t * ) ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack ) & ( ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) ) ); /*lint !e923 MISRA exception.  Avoiding casts between pointers and integers is not practical.  Size differences accounted for using portPOINTER_SIZE_TYPE type. */
 800280c:	693b      	ldr	r3, [r7, #16]
 800280e:	2207      	movs	r2, #7
 8002810:	4393      	bics	r3, r2
 8002812:	613b      	str	r3, [r7, #16]

		/* Check the alignment of the calculated top of stack is correct. */
		configASSERT( ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack & ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) == 0UL ) );
 8002814:	693b      	ldr	r3, [r7, #16]
 8002816:	2207      	movs	r2, #7
 8002818:	4013      	ands	r3, r2
 800281a:	d001      	beq.n	8002820 <prvInitialiseNewTask+0x44>
 800281c:	b672      	cpsid	i
 800281e:	e7fe      	b.n	800281e <prvInitialiseNewTask+0x42>
		pxNewTCB->pxEndOfStack = pxNewTCB->pxStack + ( ulStackDepth - ( uint32_t ) 1 );
	}
	#endif /* portSTACK_GROWTH */

	/* Store the task name in the TCB. */
	for( x = ( UBaseType_t ) 0; x < ( UBaseType_t ) configMAX_TASK_NAME_LEN; x++ )
 8002820:	2300      	movs	r3, #0
 8002822:	617b      	str	r3, [r7, #20]
 8002824:	e013      	b.n	800284e <prvInitialiseNewTask+0x72>
	{
		pxNewTCB->pcTaskName[ x ] = pcName[ x ];
 8002826:	68ba      	ldr	r2, [r7, #8]
 8002828:	697b      	ldr	r3, [r7, #20]
 800282a:	18d3      	adds	r3, r2, r3
 800282c:	7818      	ldrb	r0, [r3, #0]
 800282e:	6aba      	ldr	r2, [r7, #40]	; 0x28
 8002830:	2134      	movs	r1, #52	; 0x34
 8002832:	697b      	ldr	r3, [r7, #20]
 8002834:	18d3      	adds	r3, r2, r3
 8002836:	185b      	adds	r3, r3, r1
 8002838:	1c02      	adds	r2, r0, #0
 800283a:	701a      	strb	r2, [r3, #0]

		/* Don't copy all configMAX_TASK_NAME_LEN if the string is shorter than
		configMAX_TASK_NAME_LEN characters just in case the memory after the
		string is not accessible (extremely unlikely). */
		if( pcName[ x ] == 0x00 )
 800283c:	68ba      	ldr	r2, [r7, #8]
 800283e:	697b      	ldr	r3, [r7, #20]
 8002840:	18d3      	adds	r3, r2, r3
 8002842:	781b      	ldrb	r3, [r3, #0]
 8002844:	2b00      	cmp	r3, #0
 8002846:	d006      	beq.n	8002856 <prvInitialiseNewTask+0x7a>
	for( x = ( UBaseType_t ) 0; x < ( UBaseType_t ) configMAX_TASK_NAME_LEN; x++ )
 8002848:	697b      	ldr	r3, [r7, #20]
 800284a:	3301      	adds	r3, #1
 800284c:	617b      	str	r3, [r7, #20]
 800284e:	697b      	ldr	r3, [r7, #20]
 8002850:	2b0f      	cmp	r3, #15
 8002852:	d9e8      	bls.n	8002826 <prvInitialiseNewTask+0x4a>
 8002854:	e000      	b.n	8002858 <prvInitialiseNewTask+0x7c>
		{
			break;
 8002856:	46c0      	nop			; (mov r8, r8)
		}
	}

	/* Ensure the name string is terminated in the case that the string length
	was greater or equal to configMAX_TASK_NAME_LEN. */
	pxNewTCB->pcTaskName[ configMAX_TASK_NAME_LEN - 1 ] = '\0';
 8002858:	6abb      	ldr	r3, [r7, #40]	; 0x28
 800285a:	2243      	movs	r2, #67	; 0x43
 800285c:	2100      	movs	r1, #0
 800285e:	5499      	strb	r1, [r3, r2]

	/* This is used as an array index so must ensure it's not too large.  First
	remove the privilege bit if one is present. */
	if( uxPriority >= ( UBaseType_t ) configMAX_PRIORITIES )
 8002860:	6a3b      	ldr	r3, [r7, #32]
 8002862:	2b37      	cmp	r3, #55	; 0x37
 8002864:	d901      	bls.n	800286a <prvInitialiseNewTask+0x8e>
	{
		uxPriority = ( UBaseType_t ) configMAX_PRIORITIES - ( UBaseType_t ) 1U;
 8002866:	2337      	movs	r3, #55	; 0x37
 8002868:	623b      	str	r3, [r7, #32]
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	pxNewTCB->uxPriority = uxPriority;
 800286a:	6abb      	ldr	r3, [r7, #40]	; 0x28
 800286c:	6a3a      	ldr	r2, [r7, #32]
 800286e:	62da      	str	r2, [r3, #44]	; 0x2c
	#if ( configUSE_MUTEXES == 1 )
	{
		pxNewTCB->uxBasePriority = uxPriority;
 8002870:	6abb      	ldr	r3, [r7, #40]	; 0x28
 8002872:	6a3a      	ldr	r2, [r7, #32]
 8002874:	64da      	str	r2, [r3, #76]	; 0x4c
		pxNewTCB->uxMutexesHeld = 0;
 8002876:	6abb      	ldr	r3, [r7, #40]	; 0x28
 8002878:	2200      	movs	r2, #0
 800287a:	651a      	str	r2, [r3, #80]	; 0x50
	}
	#endif /* configUSE_MUTEXES */

	vListInitialiseItem( &( pxNewTCB->xStateListItem ) );
 800287c:	6abb      	ldr	r3, [r7, #40]	; 0x28
 800287e:	3304      	adds	r3, #4
 8002880:	0018      	movs	r0, r3
 8002882:	f7ff fa69 	bl	8001d58 <vListInitialiseItem>
	vListInitialiseItem( &( pxNewTCB->xEventListItem ) );
 8002886:	6abb      	ldr	r3, [r7, #40]	; 0x28
 8002888:	3318      	adds	r3, #24
 800288a:	0018      	movs	r0, r3
 800288c:	f7ff fa64 	bl	8001d58 <vListInitialiseItem>

	/* Set the pxNewTCB as a link back from the ListItem_t.  This is so we can get
	back to	the containing TCB from a generic item in a list. */
	listSET_LIST_ITEM_OWNER( &( pxNewTCB->xStateListItem ), pxNewTCB );
 8002890:	6abb      	ldr	r3, [r7, #40]	; 0x28
 8002892:	6aba      	ldr	r2, [r7, #40]	; 0x28
 8002894:	611a      	str	r2, [r3, #16]

	/* Event lists are always in priority order. */
	listSET_LIST_ITEM_VALUE( &( pxNewTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 8002896:	6a3b      	ldr	r3, [r7, #32]
 8002898:	2238      	movs	r2, #56	; 0x38
 800289a:	1ad2      	subs	r2, r2, r3
 800289c:	6abb      	ldr	r3, [r7, #40]	; 0x28
 800289e:	619a      	str	r2, [r3, #24]
	listSET_LIST_ITEM_OWNER( &( pxNewTCB->xEventListItem ), pxNewTCB );
 80028a0:	6abb      	ldr	r3, [r7, #40]	; 0x28
 80028a2:	6aba      	ldr	r2, [r7, #40]	; 0x28
 80028a4:	625a      	str	r2, [r3, #36]	; 0x24
	}
	#endif

	#if ( configUSE_TASK_NOTIFICATIONS == 1 )
	{
		pxNewTCB->ulNotifiedValue = 0;
 80028a6:	6abb      	ldr	r3, [r7, #40]	; 0x28
 80028a8:	2200      	movs	r2, #0
 80028aa:	655a      	str	r2, [r3, #84]	; 0x54
		pxNewTCB->ucNotifyState = taskNOT_WAITING_NOTIFICATION;
 80028ac:	6abb      	ldr	r3, [r7, #40]	; 0x28
 80028ae:	2258      	movs	r2, #88	; 0x58
 80028b0:	2100      	movs	r1, #0
 80028b2:	5499      	strb	r1, [r3, r2]
	{
		pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxTaskCode, pvParameters, xRunPrivileged );
	}
	#else /* portUSING_MPU_WRAPPERS */
	{
		pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxTaskCode, pvParameters );
 80028b4:	683a      	ldr	r2, [r7, #0]
 80028b6:	68f9      	ldr	r1, [r7, #12]
 80028b8:	693b      	ldr	r3, [r7, #16]
 80028ba:	0018      	movs	r0, r3
 80028bc:	f001 f81c 	bl	80038f8 <pxPortInitialiseStack>
 80028c0:	0002      	movs	r2, r0
 80028c2:	6abb      	ldr	r3, [r7, #40]	; 0x28
 80028c4:	601a      	str	r2, [r3, #0]
	}
	#endif /* portUSING_MPU_WRAPPERS */

	if( ( void * ) pxCreatedTask != NULL )
 80028c6:	6a7b      	ldr	r3, [r7, #36]	; 0x24
 80028c8:	2b00      	cmp	r3, #0
 80028ca:	d002      	beq.n	80028d2 <prvInitialiseNewTask+0xf6>
	{
		/* Pass the handle out in an anonymous way.  The handle can be used to
		change the created task's priority, delete the created task, etc.*/
		*pxCreatedTask = ( TaskHandle_t ) pxNewTCB;
 80028cc:	6a7b      	ldr	r3, [r7, #36]	; 0x24
 80028ce:	6aba      	ldr	r2, [r7, #40]	; 0x28
 80028d0:	601a      	str	r2, [r3, #0]
	}
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}
}
 80028d2:	46c0      	nop			; (mov r8, r8)
 80028d4:	46bd      	mov	sp, r7
 80028d6:	b006      	add	sp, #24
 80028d8:	bd80      	pop	{r7, pc}
 80028da:	46c0      	nop			; (mov r8, r8)
 80028dc:	3fffffff 	.word	0x3fffffff

080028e0 <prvAddNewTaskToReadyList>:
/*-----------------------------------------------------------*/

static void prvAddNewTaskToReadyList( TCB_t *pxNewTCB )
{
 80028e0:	b580      	push	{r7, lr}
 80028e2:	b082      	sub	sp, #8
 80028e4:	af00      	add	r7, sp, #0
 80028e6:	6078      	str	r0, [r7, #4]
	/* Ensure interrupts don't access the task lists while the lists are being
	updated. */
	taskENTER_CRITICAL();
 80028e8:	f001 f8a2 	bl	8003a30 <vPortEnterCritical>
	{
		uxCurrentNumberOfTasks++;
 80028ec:	4b2a      	ldr	r3, [pc, #168]	; (8002998 <prvAddNewTaskToReadyList+0xb8>)
 80028ee:	681b      	ldr	r3, [r3, #0]
 80028f0:	1c5a      	adds	r2, r3, #1
 80028f2:	4b29      	ldr	r3, [pc, #164]	; (8002998 <prvAddNewTaskToReadyList+0xb8>)
 80028f4:	601a      	str	r2, [r3, #0]
		if( pxCurrentTCB == NULL )
 80028f6:	4b29      	ldr	r3, [pc, #164]	; (800299c <prvAddNewTaskToReadyList+0xbc>)
 80028f8:	681b      	ldr	r3, [r3, #0]
 80028fa:	2b00      	cmp	r3, #0
 80028fc:	d109      	bne.n	8002912 <prvAddNewTaskToReadyList+0x32>
		{
			/* There are no other tasks, or all the other tasks are in
			the suspended state - make this the current task. */
			pxCurrentTCB = pxNewTCB;
 80028fe:	4b27      	ldr	r3, [pc, #156]	; (800299c <prvAddNewTaskToReadyList+0xbc>)
 8002900:	687a      	ldr	r2, [r7, #4]
 8002902:	601a      	str	r2, [r3, #0]

			if( uxCurrentNumberOfTasks == ( UBaseType_t ) 1 )
 8002904:	4b24      	ldr	r3, [pc, #144]	; (8002998 <prvAddNewTaskToReadyList+0xb8>)
 8002906:	681b      	ldr	r3, [r3, #0]
 8002908:	2b01      	cmp	r3, #1
 800290a:	d110      	bne.n	800292e <prvAddNewTaskToReadyList+0x4e>
			{
				/* This is the first task to be created so do the preliminary
				initialisation required.  We will not recover if this call
				fails, but we will report the failure. */
				prvInitialiseTaskLists();
 800290c:	f000 fb94 	bl	8003038 <prvInitialiseTaskLists>
 8002910:	e00d      	b.n	800292e <prvAddNewTaskToReadyList+0x4e>
		else
		{
			/* If the scheduler is not already running, make this task the
			current task if it is the highest priority task to be created
			so far. */
			if( xSchedulerRunning == pdFALSE )
 8002912:	4b23      	ldr	r3, [pc, #140]	; (80029a0 <prvAddNewTaskToReadyList+0xc0>)
 8002914:	681b      	ldr	r3, [r3, #0]
 8002916:	2b00      	cmp	r3, #0
 8002918:	d109      	bne.n	800292e <prvAddNewTaskToReadyList+0x4e>
			{
				if( pxCurrentTCB->uxPriority <= pxNewTCB->uxPriority )
 800291a:	4b20      	ldr	r3, [pc, #128]	; (800299c <prvAddNewTaskToReadyList+0xbc>)
 800291c:	681b      	ldr	r3, [r3, #0]
 800291e:	6ada      	ldr	r2, [r3, #44]	; 0x2c
 8002920:	687b      	ldr	r3, [r7, #4]
 8002922:	6adb      	ldr	r3, [r3, #44]	; 0x2c
 8002924:	429a      	cmp	r2, r3
 8002926:	d802      	bhi.n	800292e <prvAddNewTaskToReadyList+0x4e>
				{
					pxCurrentTCB = pxNewTCB;
 8002928:	4b1c      	ldr	r3, [pc, #112]	; (800299c <prvAddNewTaskToReadyList+0xbc>)
 800292a:	687a      	ldr	r2, [r7, #4]
 800292c:	601a      	str	r2, [r3, #0]
			{
				mtCOVERAGE_TEST_MARKER();
			}
		}

		uxTaskNumber++;
 800292e:	4b1d      	ldr	r3, [pc, #116]	; (80029a4 <prvAddNewTaskToReadyList+0xc4>)
 8002930:	681b      	ldr	r3, [r3, #0]
 8002932:	1c5a      	adds	r2, r3, #1
 8002934:	4b1b      	ldr	r3, [pc, #108]	; (80029a4 <prvAddNewTaskToReadyList+0xc4>)
 8002936:	601a      	str	r2, [r3, #0]

		#if ( configUSE_TRACE_FACILITY == 1 )
		{
			/* Add a counter into the TCB for tracing only. */
			pxNewTCB->uxTCBNumber = uxTaskNumber;
 8002938:	4b1a      	ldr	r3, [pc, #104]	; (80029a4 <prvAddNewTaskToReadyList+0xc4>)
 800293a:	681a      	ldr	r2, [r3, #0]
 800293c:	687b      	ldr	r3, [r7, #4]
 800293e:	645a      	str	r2, [r3, #68]	; 0x44
		}
		#endif /* configUSE_TRACE_FACILITY */
		traceTASK_CREATE( pxNewTCB );

		prvAddTaskToReadyList( pxNewTCB );
 8002940:	687b      	ldr	r3, [r7, #4]
 8002942:	6ada      	ldr	r2, [r3, #44]	; 0x2c
 8002944:	4b18      	ldr	r3, [pc, #96]	; (80029a8 <prvAddNewTaskToReadyList+0xc8>)
 8002946:	681b      	ldr	r3, [r3, #0]
 8002948:	429a      	cmp	r2, r3
 800294a:	d903      	bls.n	8002954 <prvAddNewTaskToReadyList+0x74>
 800294c:	687b      	ldr	r3, [r7, #4]
 800294e:	6ada      	ldr	r2, [r3, #44]	; 0x2c
 8002950:	4b15      	ldr	r3, [pc, #84]	; (80029a8 <prvAddNewTaskToReadyList+0xc8>)
 8002952:	601a      	str	r2, [r3, #0]
 8002954:	687b      	ldr	r3, [r7, #4]
 8002956:	6ada      	ldr	r2, [r3, #44]	; 0x2c
 8002958:	0013      	movs	r3, r2
 800295a:	009b      	lsls	r3, r3, #2
 800295c:	189b      	adds	r3, r3, r2
 800295e:	009b      	lsls	r3, r3, #2
 8002960:	4a12      	ldr	r2, [pc, #72]	; (80029ac <prvAddNewTaskToReadyList+0xcc>)
 8002962:	189a      	adds	r2, r3, r2
 8002964:	687b      	ldr	r3, [r7, #4]
 8002966:	3304      	adds	r3, #4
 8002968:	0019      	movs	r1, r3
 800296a:	0010      	movs	r0, r2
 800296c:	f7ff f9ff 	bl	8001d6e <vListInsertEnd>

		portSETUP_TCB( pxNewTCB );
	}
	taskEXIT_CRITICAL();
 8002970:	f001 f870 	bl	8003a54 <vPortExitCritical>

	if( xSchedulerRunning != pdFALSE )
 8002974:	4b0a      	ldr	r3, [pc, #40]	; (80029a0 <prvAddNewTaskToReadyList+0xc0>)
 8002976:	681b      	ldr	r3, [r3, #0]
 8002978:	2b00      	cmp	r3, #0
 800297a:	d008      	beq.n	800298e <prvAddNewTaskToReadyList+0xae>
	{
		/* If the created task is of a higher priority than the current task
		then it should run now. */
		if( pxCurrentTCB->uxPriority < pxNewTCB->uxPriority )
 800297c:	4b07      	ldr	r3, [pc, #28]	; (800299c <prvAddNewTaskToReadyList+0xbc>)
 800297e:	681b      	ldr	r3, [r3, #0]
 8002980:	6ada      	ldr	r2, [r3, #44]	; 0x2c
 8002982:	687b      	ldr	r3, [r7, #4]
 8002984:	6adb      	ldr	r3, [r3, #44]	; 0x2c
 8002986:	429a      	cmp	r2, r3
 8002988:	d201      	bcs.n	800298e <prvAddNewTaskToReadyList+0xae>
		{
			taskYIELD_IF_USING_PREEMPTION();
 800298a:	f001 f841 	bl	8003a10 <vPortYield>
	}
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}
}
 800298e:	46c0      	nop			; (mov r8, r8)
 8002990:	46bd      	mov	sp, r7
 8002992:	b002      	add	sp, #8
 8002994:	bd80      	pop	{r7, pc}
 8002996:	46c0      	nop			; (mov r8, r8)
 8002998:	20000bc0 	.word	0x20000bc0
 800299c:	200006ec 	.word	0x200006ec
 80029a0:	20000bcc 	.word	0x20000bcc
 80029a4:	20000bdc 	.word	0x20000bdc
 80029a8:	20000bc8 	.word	0x20000bc8
 80029ac:	200006f0 	.word	0x200006f0

080029b0 <vTaskDelay>:
/*-----------------------------------------------------------*/

#if ( INCLUDE_vTaskDelay == 1 )

	void vTaskDelay( const TickType_t xTicksToDelay )
	{
 80029b0:	b580      	push	{r7, lr}
 80029b2:	b084      	sub	sp, #16
 80029b4:	af00      	add	r7, sp, #0
 80029b6:	6078      	str	r0, [r7, #4]
	BaseType_t xAlreadyYielded = pdFALSE;
 80029b8:	2300      	movs	r3, #0
 80029ba:	60fb      	str	r3, [r7, #12]

		/* A delay time of zero just forces a reschedule. */
		if( xTicksToDelay > ( TickType_t ) 0U )
 80029bc:	687b      	ldr	r3, [r7, #4]
 80029be:	2b00      	cmp	r3, #0
 80029c0:	d010      	beq.n	80029e4 <vTaskDelay+0x34>
		{
			configASSERT( uxSchedulerSuspended == 0 );
 80029c2:	4b0d      	ldr	r3, [pc, #52]	; (80029f8 <vTaskDelay+0x48>)
 80029c4:	681b      	ldr	r3, [r3, #0]
 80029c6:	2b00      	cmp	r3, #0
 80029c8:	d001      	beq.n	80029ce <vTaskDelay+0x1e>
 80029ca:	b672      	cpsid	i
 80029cc:	e7fe      	b.n	80029cc <vTaskDelay+0x1c>
			vTaskSuspendAll();
 80029ce:	f000 f869 	bl	8002aa4 <vTaskSuspendAll>
				list or removed from the blocked list until the scheduler
				is resumed.

				This task cannot be in an event list as it is the currently
				executing task. */
				prvAddCurrentTaskToDelayedList( xTicksToDelay, pdFALSE );
 80029d2:	687b      	ldr	r3, [r7, #4]
 80029d4:	2100      	movs	r1, #0
 80029d6:	0018      	movs	r0, r3
 80029d8:	f000 fc64 	bl	80032a4 <prvAddCurrentTaskToDelayedList>
			}
			xAlreadyYielded = xTaskResumeAll();
 80029dc:	f000 f86e 	bl	8002abc <xTaskResumeAll>
 80029e0:	0003      	movs	r3, r0
 80029e2:	60fb      	str	r3, [r7, #12]
			mtCOVERAGE_TEST_MARKER();
		}

		/* Force a reschedule if xTaskResumeAll has not already done so, we may
		have put ourselves to sleep. */
		if( xAlreadyYielded == pdFALSE )
 80029e4:	68fb      	ldr	r3, [r7, #12]
 80029e6:	2b00      	cmp	r3, #0
 80029e8:	d101      	bne.n	80029ee <vTaskDelay+0x3e>
		{
			portYIELD_WITHIN_API();
 80029ea:	f001 f811 	bl	8003a10 <vPortYield>
		}
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}
	}
 80029ee:	46c0      	nop			; (mov r8, r8)
 80029f0:	46bd      	mov	sp, r7
 80029f2:	b004      	add	sp, #16
 80029f4:	bd80      	pop	{r7, pc}
 80029f6:	46c0      	nop			; (mov r8, r8)
 80029f8:	20000be8 	.word	0x20000be8

080029fc <vTaskStartScheduler>:

#endif /* ( ( INCLUDE_xTaskResumeFromISR == 1 ) && ( INCLUDE_vTaskSuspend == 1 ) ) */
/*-----------------------------------------------------------*/

void vTaskStartScheduler( void )
{
 80029fc:	b590      	push	{r4, r7, lr}
 80029fe:	b089      	sub	sp, #36	; 0x24
 8002a00:	af04      	add	r7, sp, #16
BaseType_t xReturn;

	/* Add the idle task at the lowest priority. */
	#if( configSUPPORT_STATIC_ALLOCATION == 1 )
	{
		StaticTask_t *pxIdleTaskTCBBuffer = NULL;
 8002a02:	2300      	movs	r3, #0
 8002a04:	60bb      	str	r3, [r7, #8]
		StackType_t *pxIdleTaskStackBuffer = NULL;
 8002a06:	2300      	movs	r3, #0
 8002a08:	607b      	str	r3, [r7, #4]
		uint32_t ulIdleTaskStackSize;

		/* The Idle task is created using user provided RAM - obtain the
		address of the RAM then create the idle task. */
		vApplicationGetIdleTaskMemory( &pxIdleTaskTCBBuffer, &pxIdleTaskStackBuffer, &ulIdleTaskStackSize );
 8002a0a:	003a      	movs	r2, r7
 8002a0c:	1d39      	adds	r1, r7, #4
 8002a0e:	2308      	movs	r3, #8
 8002a10:	18fb      	adds	r3, r7, r3
 8002a12:	0018      	movs	r0, r3
 8002a14:	f7ff f952 	bl	8001cbc <vApplicationGetIdleTaskMemory>
		xIdleTaskHandle = xTaskCreateStatic(	prvIdleTask,
 8002a18:	683c      	ldr	r4, [r7, #0]
 8002a1a:	687b      	ldr	r3, [r7, #4]
 8002a1c:	68ba      	ldr	r2, [r7, #8]
 8002a1e:	491b      	ldr	r1, [pc, #108]	; (8002a8c <vTaskStartScheduler+0x90>)
 8002a20:	481b      	ldr	r0, [pc, #108]	; (8002a90 <vTaskStartScheduler+0x94>)
 8002a22:	9202      	str	r2, [sp, #8]
 8002a24:	9301      	str	r3, [sp, #4]
 8002a26:	2300      	movs	r3, #0
 8002a28:	9300      	str	r3, [sp, #0]
 8002a2a:	2300      	movs	r3, #0
 8002a2c:	0022      	movs	r2, r4
 8002a2e:	f7ff fe46 	bl	80026be <xTaskCreateStatic>
 8002a32:	0002      	movs	r2, r0
 8002a34:	4b17      	ldr	r3, [pc, #92]	; (8002a94 <vTaskStartScheduler+0x98>)
 8002a36:	601a      	str	r2, [r3, #0]
												( void * ) NULL, /*lint !e961.  The cast is not redundant for all compilers. */
												( tskIDLE_PRIORITY | portPRIVILEGE_BIT ),
												pxIdleTaskStackBuffer,
												pxIdleTaskTCBBuffer ); /*lint !e961 MISRA exception, justified as it is not a redundant explicit cast to all supported compilers. */

		if( xIdleTaskHandle != NULL )
 8002a38:	4b16      	ldr	r3, [pc, #88]	; (8002a94 <vTaskStartScheduler+0x98>)
 8002a3a:	681b      	ldr	r3, [r3, #0]
 8002a3c:	2b00      	cmp	r3, #0
 8002a3e:	d002      	beq.n	8002a46 <vTaskStartScheduler+0x4a>
		{
			xReturn = pdPASS;
 8002a40:	2301      	movs	r3, #1
 8002a42:	60fb      	str	r3, [r7, #12]
 8002a44:	e001      	b.n	8002a4a <vTaskStartScheduler+0x4e>
		}
		else
		{
			xReturn = pdFAIL;
 8002a46:	2300      	movs	r3, #0
 8002a48:	60fb      	str	r3, [r7, #12]
	}
	#endif /* configSUPPORT_STATIC_ALLOCATION */

	#if ( configUSE_TIMERS == 1 )
	{
		if( xReturn == pdPASS )
 8002a4a:	68fb      	ldr	r3, [r7, #12]
 8002a4c:	2b01      	cmp	r3, #1
 8002a4e:	d103      	bne.n	8002a58 <vTaskStartScheduler+0x5c>
		{
			xReturn = xTimerCreateTimerTask();
 8002a50:	f000 fc7c 	bl	800334c <xTimerCreateTimerTask>
 8002a54:	0003      	movs	r3, r0
 8002a56:	60fb      	str	r3, [r7, #12]
			mtCOVERAGE_TEST_MARKER();
		}
	}
	#endif /* configUSE_TIMERS */

	if( xReturn == pdPASS )
 8002a58:	68fb      	ldr	r3, [r7, #12]
 8002a5a:	2b01      	cmp	r3, #1
 8002a5c:	d10d      	bne.n	8002a7a <vTaskStartScheduler+0x7e>
		/* Interrupts are turned off here, to ensure a tick does not occur
		before or during the call to xPortStartScheduler().  The stacks of
		the created tasks contain a status word with interrupts switched on
		so interrupts will automatically get re-enabled when the first task
		starts to run. */
		portDISABLE_INTERRUPTS();
 8002a5e:	b672      	cpsid	i
			structure specific to the task that will run first. */
			_impure_ptr = &( pxCurrentTCB->xNewLib_reent );
		}
		#endif /* configUSE_NEWLIB_REENTRANT */

		xNextTaskUnblockTime = portMAX_DELAY;
 8002a60:	4b0d      	ldr	r3, [pc, #52]	; (8002a98 <vTaskStartScheduler+0x9c>)
 8002a62:	2201      	movs	r2, #1
 8002a64:	4252      	negs	r2, r2
 8002a66:	601a      	str	r2, [r3, #0]
		xSchedulerRunning = pdTRUE;
 8002a68:	4b0c      	ldr	r3, [pc, #48]	; (8002a9c <vTaskStartScheduler+0xa0>)
 8002a6a:	2201      	movs	r2, #1
 8002a6c:	601a      	str	r2, [r3, #0]
		xTickCount = ( TickType_t ) 0U;
 8002a6e:	4b0c      	ldr	r3, [pc, #48]	; (8002aa0 <vTaskStartScheduler+0xa4>)
 8002a70:	2200      	movs	r2, #0
 8002a72:	601a      	str	r2, [r3, #0]
		FreeRTOSConfig.h file. */
		portCONFIGURE_TIMER_FOR_RUN_TIME_STATS();

		/* Setting up the timer tick is hardware specific and thus in the
		portable interface. */
		if( xPortStartScheduler() != pdFALSE )
 8002a74:	f000 ffa8 	bl	80039c8 <xPortStartScheduler>
	}

	/* Prevent compiler warnings if INCLUDE_xTaskGetIdleTaskHandle is set to 0,
	meaning xIdleTaskHandle is not used anywhere else. */
	( void ) xIdleTaskHandle;
}
 8002a78:	e004      	b.n	8002a84 <vTaskStartScheduler+0x88>
		configASSERT( xReturn != errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY );
 8002a7a:	68fb      	ldr	r3, [r7, #12]
 8002a7c:	3301      	adds	r3, #1
 8002a7e:	d101      	bne.n	8002a84 <vTaskStartScheduler+0x88>
 8002a80:	b672      	cpsid	i
 8002a82:	e7fe      	b.n	8002a82 <vTaskStartScheduler+0x86>
}
 8002a84:	46c0      	nop			; (mov r8, r8)
 8002a86:	46bd      	mov	sp, r7
 8002a88:	b005      	add	sp, #20
 8002a8a:	bd90      	pop	{r4, r7, pc}
 8002a8c:	08003f64 	.word	0x08003f64
 8002a90:	08003019 	.word	0x08003019
 8002a94:	20000be4 	.word	0x20000be4
 8002a98:	20000be0 	.word	0x20000be0
 8002a9c:	20000bcc 	.word	0x20000bcc
 8002aa0:	20000bc4 	.word	0x20000bc4

08002aa4 <vTaskSuspendAll>:
	vPortEndScheduler();
}
/*----------------------------------------------------------*/

void vTaskSuspendAll( void )
{
 8002aa4:	b580      	push	{r7, lr}
 8002aa6:	af00      	add	r7, sp, #0
	/* A critical section is not required as the variable is of type
	BaseType_t.  Please read Richard Barry's reply in the following link to a
	post in the FreeRTOS support forum before reporting this as a bug! -
	http://goo.gl/wu4acr */
	++uxSchedulerSuspended;
 8002aa8:	4b03      	ldr	r3, [pc, #12]	; (8002ab8 <vTaskSuspendAll+0x14>)
 8002aaa:	681b      	ldr	r3, [r3, #0]
 8002aac:	1c5a      	adds	r2, r3, #1
 8002aae:	4b02      	ldr	r3, [pc, #8]	; (8002ab8 <vTaskSuspendAll+0x14>)
 8002ab0:	601a      	str	r2, [r3, #0]
}
 8002ab2:	46c0      	nop			; (mov r8, r8)
 8002ab4:	46bd      	mov	sp, r7
 8002ab6:	bd80      	pop	{r7, pc}
 8002ab8:	20000be8 	.word	0x20000be8

08002abc <xTaskResumeAll>:

#endif /* configUSE_TICKLESS_IDLE */
/*----------------------------------------------------------*/

BaseType_t xTaskResumeAll( void )
{
 8002abc:	b580      	push	{r7, lr}
 8002abe:	b084      	sub	sp, #16
 8002ac0:	af00      	add	r7, sp, #0
TCB_t *pxTCB = NULL;
 8002ac2:	2300      	movs	r3, #0
 8002ac4:	60fb      	str	r3, [r7, #12]
BaseType_t xAlreadyYielded = pdFALSE;
 8002ac6:	2300      	movs	r3, #0
 8002ac8:	60bb      	str	r3, [r7, #8]

	/* If uxSchedulerSuspended is zero then this function does not match a
	previous call to vTaskSuspendAll(). */
	configASSERT( uxSchedulerSuspended );
 8002aca:	4b3a      	ldr	r3, [pc, #232]	; (8002bb4 <xTaskResumeAll+0xf8>)
 8002acc:	681b      	ldr	r3, [r3, #0]
 8002ace:	2b00      	cmp	r3, #0
 8002ad0:	d101      	bne.n	8002ad6 <xTaskResumeAll+0x1a>
 8002ad2:	b672      	cpsid	i
 8002ad4:	e7fe      	b.n	8002ad4 <xTaskResumeAll+0x18>
	/* It is possible that an ISR caused a task to be removed from an event
	list while the scheduler was suspended.  If this was the case then the
	removed task will have been added to the xPendingReadyList.  Once the
	scheduler has been resumed it is safe to move all the pending ready
	tasks from this list into their appropriate ready list. */
	taskENTER_CRITICAL();
 8002ad6:	f000 ffab 	bl	8003a30 <vPortEnterCritical>
	{
		--uxSchedulerSuspended;
 8002ada:	4b36      	ldr	r3, [pc, #216]	; (8002bb4 <xTaskResumeAll+0xf8>)
 8002adc:	681b      	ldr	r3, [r3, #0]
 8002ade:	1e5a      	subs	r2, r3, #1
 8002ae0:	4b34      	ldr	r3, [pc, #208]	; (8002bb4 <xTaskResumeAll+0xf8>)
 8002ae2:	601a      	str	r2, [r3, #0]

		if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
 8002ae4:	4b33      	ldr	r3, [pc, #204]	; (8002bb4 <xTaskResumeAll+0xf8>)
 8002ae6:	681b      	ldr	r3, [r3, #0]
 8002ae8:	2b00      	cmp	r3, #0
 8002aea:	d15b      	bne.n	8002ba4 <xTaskResumeAll+0xe8>
		{
			if( uxCurrentNumberOfTasks > ( UBaseType_t ) 0U )
 8002aec:	4b32      	ldr	r3, [pc, #200]	; (8002bb8 <xTaskResumeAll+0xfc>)
 8002aee:	681b      	ldr	r3, [r3, #0]
 8002af0:	2b00      	cmp	r3, #0
 8002af2:	d057      	beq.n	8002ba4 <xTaskResumeAll+0xe8>
			{
				/* Move any readied tasks from the pending list into the
				appropriate ready list. */
				while( listLIST_IS_EMPTY( &xPendingReadyList ) == pdFALSE )
 8002af4:	e02f      	b.n	8002b56 <xTaskResumeAll+0x9a>
				{
					pxTCB = ( TCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( ( &xPendingReadyList ) );
 8002af6:	4b31      	ldr	r3, [pc, #196]	; (8002bbc <xTaskResumeAll+0x100>)
 8002af8:	68db      	ldr	r3, [r3, #12]
 8002afa:	68db      	ldr	r3, [r3, #12]
 8002afc:	60fb      	str	r3, [r7, #12]
					( void ) uxListRemove( &( pxTCB->xEventListItem ) );
 8002afe:	68fb      	ldr	r3, [r7, #12]
 8002b00:	3318      	adds	r3, #24
 8002b02:	0018      	movs	r0, r3
 8002b04:	f7ff f98b 	bl	8001e1e <uxListRemove>
					( void ) uxListRemove( &( pxTCB->xStateListItem ) );
 8002b08:	68fb      	ldr	r3, [r7, #12]
 8002b0a:	3304      	adds	r3, #4
 8002b0c:	0018      	movs	r0, r3
 8002b0e:	f7ff f986 	bl	8001e1e <uxListRemove>
					prvAddTaskToReadyList( pxTCB );
 8002b12:	68fb      	ldr	r3, [r7, #12]
 8002b14:	6ada      	ldr	r2, [r3, #44]	; 0x2c
 8002b16:	4b2a      	ldr	r3, [pc, #168]	; (8002bc0 <xTaskResumeAll+0x104>)
 8002b18:	681b      	ldr	r3, [r3, #0]
 8002b1a:	429a      	cmp	r2, r3
 8002b1c:	d903      	bls.n	8002b26 <xTaskResumeAll+0x6a>
 8002b1e:	68fb      	ldr	r3, [r7, #12]
 8002b20:	6ada      	ldr	r2, [r3, #44]	; 0x2c
 8002b22:	4b27      	ldr	r3, [pc, #156]	; (8002bc0 <xTaskResumeAll+0x104>)
 8002b24:	601a      	str	r2, [r3, #0]
 8002b26:	68fb      	ldr	r3, [r7, #12]
 8002b28:	6ada      	ldr	r2, [r3, #44]	; 0x2c
 8002b2a:	0013      	movs	r3, r2
 8002b2c:	009b      	lsls	r3, r3, #2
 8002b2e:	189b      	adds	r3, r3, r2
 8002b30:	009b      	lsls	r3, r3, #2
 8002b32:	4a24      	ldr	r2, [pc, #144]	; (8002bc4 <xTaskResumeAll+0x108>)
 8002b34:	189a      	adds	r2, r3, r2
 8002b36:	68fb      	ldr	r3, [r7, #12]
 8002b38:	3304      	adds	r3, #4
 8002b3a:	0019      	movs	r1, r3
 8002b3c:	0010      	movs	r0, r2
 8002b3e:	f7ff f916 	bl	8001d6e <vListInsertEnd>

					/* If the moved task has a priority higher than the current
					task then a yield must be performed. */
					if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
 8002b42:	68fb      	ldr	r3, [r7, #12]
 8002b44:	6ada      	ldr	r2, [r3, #44]	; 0x2c
 8002b46:	4b20      	ldr	r3, [pc, #128]	; (8002bc8 <xTaskResumeAll+0x10c>)
 8002b48:	681b      	ldr	r3, [r3, #0]
 8002b4a:	6adb      	ldr	r3, [r3, #44]	; 0x2c
 8002b4c:	429a      	cmp	r2, r3
 8002b4e:	d302      	bcc.n	8002b56 <xTaskResumeAll+0x9a>
					{
						xYieldPending = pdTRUE;
 8002b50:	4b1e      	ldr	r3, [pc, #120]	; (8002bcc <xTaskResumeAll+0x110>)
 8002b52:	2201      	movs	r2, #1
 8002b54:	601a      	str	r2, [r3, #0]
				while( listLIST_IS_EMPTY( &xPendingReadyList ) == pdFALSE )
 8002b56:	4b19      	ldr	r3, [pc, #100]	; (8002bbc <xTaskResumeAll+0x100>)
 8002b58:	681b      	ldr	r3, [r3, #0]
 8002b5a:	2b00      	cmp	r3, #0
 8002b5c:	d1cb      	bne.n	8002af6 <xTaskResumeAll+0x3a>
					{
						mtCOVERAGE_TEST_MARKER();
					}
				}

				if( pxTCB != NULL )
 8002b5e:	68fb      	ldr	r3, [r7, #12]
 8002b60:	2b00      	cmp	r3, #0
 8002b62:	d001      	beq.n	8002b68 <xTaskResumeAll+0xac>
					which may have prevented the next unblock time from being
					re-calculated, in which case re-calculate it now.  Mainly
					important for low power tickless implementations, where
					this can prevent an unnecessary exit from low power
					state. */
					prvResetNextTaskUnblockTime();
 8002b64:	f000 fb02 	bl	800316c <prvResetNextTaskUnblockTime>
				/* If any ticks occurred while the scheduler was suspended then
				they should be processed now.  This ensures the tick count does
				not	slip, and that any delayed tasks are resumed at the correct
				time. */
				{
					UBaseType_t uxPendedCounts = uxPendedTicks; /* Non-volatile copy. */
 8002b68:	4b19      	ldr	r3, [pc, #100]	; (8002bd0 <xTaskResumeAll+0x114>)
 8002b6a:	681b      	ldr	r3, [r3, #0]
 8002b6c:	607b      	str	r3, [r7, #4]

					if( uxPendedCounts > ( UBaseType_t ) 0U )
 8002b6e:	687b      	ldr	r3, [r7, #4]
 8002b70:	2b00      	cmp	r3, #0
 8002b72:	d00f      	beq.n	8002b94 <xTaskResumeAll+0xd8>
					{
						do
						{
							if( xTaskIncrementTick() != pdFALSE )
 8002b74:	f000 f83c 	bl	8002bf0 <xTaskIncrementTick>
 8002b78:	1e03      	subs	r3, r0, #0
 8002b7a:	d002      	beq.n	8002b82 <xTaskResumeAll+0xc6>
							{
								xYieldPending = pdTRUE;
 8002b7c:	4b13      	ldr	r3, [pc, #76]	; (8002bcc <xTaskResumeAll+0x110>)
 8002b7e:	2201      	movs	r2, #1
 8002b80:	601a      	str	r2, [r3, #0]
							}
							else
							{
								mtCOVERAGE_TEST_MARKER();
							}
							--uxPendedCounts;
 8002b82:	687b      	ldr	r3, [r7, #4]
 8002b84:	3b01      	subs	r3, #1
 8002b86:	607b      	str	r3, [r7, #4]
						} while( uxPendedCounts > ( UBaseType_t ) 0U );
 8002b88:	687b      	ldr	r3, [r7, #4]
 8002b8a:	2b00      	cmp	r3, #0
 8002b8c:	d1f2      	bne.n	8002b74 <xTaskResumeAll+0xb8>

						uxPendedTicks = 0;
 8002b8e:	4b10      	ldr	r3, [pc, #64]	; (8002bd0 <xTaskResumeAll+0x114>)
 8002b90:	2200      	movs	r2, #0
 8002b92:	601a      	str	r2, [r3, #0]
					{
						mtCOVERAGE_TEST_MARKER();
					}
				}

				if( xYieldPending != pdFALSE )
 8002b94:	4b0d      	ldr	r3, [pc, #52]	; (8002bcc <xTaskResumeAll+0x110>)
 8002b96:	681b      	ldr	r3, [r3, #0]
 8002b98:	2b00      	cmp	r3, #0
 8002b9a:	d003      	beq.n	8002ba4 <xTaskResumeAll+0xe8>
				{
					#if( configUSE_PREEMPTION != 0 )
					{
						xAlreadyYielded = pdTRUE;
 8002b9c:	2301      	movs	r3, #1
 8002b9e:	60bb      	str	r3, [r7, #8]
					}
					#endif
					taskYIELD_IF_USING_PREEMPTION();
 8002ba0:	f000 ff36 	bl	8003a10 <vPortYield>
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}
	}
	taskEXIT_CRITICAL();
 8002ba4:	f000 ff56 	bl	8003a54 <vPortExitCritical>

	return xAlreadyYielded;
 8002ba8:	68bb      	ldr	r3, [r7, #8]
}
 8002baa:	0018      	movs	r0, r3
 8002bac:	46bd      	mov	sp, r7
 8002bae:	b004      	add	sp, #16
 8002bb0:	bd80      	pop	{r7, pc}
 8002bb2:	46c0      	nop			; (mov r8, r8)
 8002bb4:	20000be8 	.word	0x20000be8
 8002bb8:	20000bc0 	.word	0x20000bc0
 8002bbc:	20000b80 	.word	0x20000b80
 8002bc0:	20000bc8 	.word	0x20000bc8
 8002bc4:	200006f0 	.word	0x200006f0
 8002bc8:	200006ec 	.word	0x200006ec
 8002bcc:	20000bd4 	.word	0x20000bd4
 8002bd0:	20000bd0 	.word	0x20000bd0

08002bd4 <xTaskGetTickCount>:
/*-----------------------------------------------------------*/

TickType_t xTaskGetTickCount( void )
{
 8002bd4:	b580      	push	{r7, lr}
 8002bd6:	b082      	sub	sp, #8
 8002bd8:	af00      	add	r7, sp, #0
TickType_t xTicks;

	/* Critical section required if running on a 16 bit processor. */
	portTICK_TYPE_ENTER_CRITICAL();
	{
		xTicks = xTickCount;
 8002bda:	4b04      	ldr	r3, [pc, #16]	; (8002bec <xTaskGetTickCount+0x18>)
 8002bdc:	681b      	ldr	r3, [r3, #0]
 8002bde:	607b      	str	r3, [r7, #4]
	}
	portTICK_TYPE_EXIT_CRITICAL();

	return xTicks;
 8002be0:	687b      	ldr	r3, [r7, #4]
}
 8002be2:	0018      	movs	r0, r3
 8002be4:	46bd      	mov	sp, r7
 8002be6:	b002      	add	sp, #8
 8002be8:	bd80      	pop	{r7, pc}
 8002bea:	46c0      	nop			; (mov r8, r8)
 8002bec:	20000bc4 	.word	0x20000bc4

08002bf0 <xTaskIncrementTick>:

#endif /* INCLUDE_xTaskAbortDelay */
/*----------------------------------------------------------*/

BaseType_t xTaskIncrementTick( void )
{
 8002bf0:	b580      	push	{r7, lr}
 8002bf2:	b086      	sub	sp, #24
 8002bf4:	af00      	add	r7, sp, #0
TCB_t * pxTCB;
TickType_t xItemValue;
BaseType_t xSwitchRequired = pdFALSE;
 8002bf6:	2300      	movs	r3, #0
 8002bf8:	617b      	str	r3, [r7, #20]

	/* Called by the portable layer each time a tick interrupt occurs.
	Increments the tick then checks to see if the new tick value will cause any
	tasks to be unblocked. */
	traceTASK_INCREMENT_TICK( xTickCount );
	if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
 8002bfa:	4b4c      	ldr	r3, [pc, #304]	; (8002d2c <xTaskIncrementTick+0x13c>)
 8002bfc:	681b      	ldr	r3, [r3, #0]
 8002bfe:	2b00      	cmp	r3, #0
 8002c00:	d000      	beq.n	8002c04 <xTaskIncrementTick+0x14>
 8002c02:	e083      	b.n	8002d0c <xTaskIncrementTick+0x11c>
	{
		/* Minor optimisation.  The tick count cannot change in this
		block. */
		const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
 8002c04:	4b4a      	ldr	r3, [pc, #296]	; (8002d30 <xTaskIncrementTick+0x140>)
 8002c06:	681b      	ldr	r3, [r3, #0]
 8002c08:	3301      	adds	r3, #1
 8002c0a:	613b      	str	r3, [r7, #16]

		/* Increment the RTOS tick, switching the delayed and overflowed
		delayed lists if it wraps to 0. */
		xTickCount = xConstTickCount;
 8002c0c:	4b48      	ldr	r3, [pc, #288]	; (8002d30 <xTaskIncrementTick+0x140>)
 8002c0e:	693a      	ldr	r2, [r7, #16]
 8002c10:	601a      	str	r2, [r3, #0]

		if( xConstTickCount == ( TickType_t ) 0U ) /*lint !e774 'if' does not always evaluate to false as it is looking for an overflow. */
 8002c12:	693b      	ldr	r3, [r7, #16]
 8002c14:	2b00      	cmp	r3, #0
 8002c16:	d117      	bne.n	8002c48 <xTaskIncrementTick+0x58>
		{
			taskSWITCH_DELAYED_LISTS();
 8002c18:	4b46      	ldr	r3, [pc, #280]	; (8002d34 <xTaskIncrementTick+0x144>)
 8002c1a:	681b      	ldr	r3, [r3, #0]
 8002c1c:	681b      	ldr	r3, [r3, #0]
 8002c1e:	2b00      	cmp	r3, #0
 8002c20:	d001      	beq.n	8002c26 <xTaskIncrementTick+0x36>
 8002c22:	b672      	cpsid	i
 8002c24:	e7fe      	b.n	8002c24 <xTaskIncrementTick+0x34>
 8002c26:	4b43      	ldr	r3, [pc, #268]	; (8002d34 <xTaskIncrementTick+0x144>)
 8002c28:	681b      	ldr	r3, [r3, #0]
 8002c2a:	60fb      	str	r3, [r7, #12]
 8002c2c:	4b42      	ldr	r3, [pc, #264]	; (8002d38 <xTaskIncrementTick+0x148>)
 8002c2e:	681a      	ldr	r2, [r3, #0]
 8002c30:	4b40      	ldr	r3, [pc, #256]	; (8002d34 <xTaskIncrementTick+0x144>)
 8002c32:	601a      	str	r2, [r3, #0]
 8002c34:	4b40      	ldr	r3, [pc, #256]	; (8002d38 <xTaskIncrementTick+0x148>)
 8002c36:	68fa      	ldr	r2, [r7, #12]
 8002c38:	601a      	str	r2, [r3, #0]
 8002c3a:	4b40      	ldr	r3, [pc, #256]	; (8002d3c <xTaskIncrementTick+0x14c>)
 8002c3c:	681b      	ldr	r3, [r3, #0]
 8002c3e:	1c5a      	adds	r2, r3, #1
 8002c40:	4b3e      	ldr	r3, [pc, #248]	; (8002d3c <xTaskIncrementTick+0x14c>)
 8002c42:	601a      	str	r2, [r3, #0]
 8002c44:	f000 fa92 	bl	800316c <prvResetNextTaskUnblockTime>

		/* See if this tick has made a timeout expire.  Tasks are stored in
		the	queue in the order of their wake time - meaning once one task
		has been found whose block time has not expired there is no need to
		look any further down the list. */
		if( xConstTickCount >= xNextTaskUnblockTime )
 8002c48:	4b3d      	ldr	r3, [pc, #244]	; (8002d40 <xTaskIncrementTick+0x150>)
 8002c4a:	681b      	ldr	r3, [r3, #0]
 8002c4c:	693a      	ldr	r2, [r7, #16]
 8002c4e:	429a      	cmp	r2, r3
 8002c50:	d34e      	bcc.n	8002cf0 <xTaskIncrementTick+0x100>
		{
			for( ;; )
			{
				if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
 8002c52:	4b38      	ldr	r3, [pc, #224]	; (8002d34 <xTaskIncrementTick+0x144>)
 8002c54:	681b      	ldr	r3, [r3, #0]
 8002c56:	681b      	ldr	r3, [r3, #0]
 8002c58:	2b00      	cmp	r3, #0
 8002c5a:	d101      	bne.n	8002c60 <xTaskIncrementTick+0x70>
 8002c5c:	2301      	movs	r3, #1
 8002c5e:	e000      	b.n	8002c62 <xTaskIncrementTick+0x72>
 8002c60:	2300      	movs	r3, #0
 8002c62:	2b00      	cmp	r3, #0
 8002c64:	d004      	beq.n	8002c70 <xTaskIncrementTick+0x80>
					/* The delayed list is empty.  Set xNextTaskUnblockTime
					to the maximum possible value so it is extremely
					unlikely that the
					if( xTickCount >= xNextTaskUnblockTime ) test will pass
					next time through. */
					xNextTaskUnblockTime = portMAX_DELAY; /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 8002c66:	4b36      	ldr	r3, [pc, #216]	; (8002d40 <xTaskIncrementTick+0x150>)
 8002c68:	2201      	movs	r2, #1
 8002c6a:	4252      	negs	r2, r2
 8002c6c:	601a      	str	r2, [r3, #0]
					break;
 8002c6e:	e03f      	b.n	8002cf0 <xTaskIncrementTick+0x100>
				{
					/* The delayed list is not empty, get the value of the
					item at the head of the delayed list.  This is the time
					at which the task at the head of the delayed list must
					be removed from the Blocked state. */
					pxTCB = ( TCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList );
 8002c70:	4b30      	ldr	r3, [pc, #192]	; (8002d34 <xTaskIncrementTick+0x144>)
 8002c72:	681b      	ldr	r3, [r3, #0]
 8002c74:	68db      	ldr	r3, [r3, #12]
 8002c76:	68db      	ldr	r3, [r3, #12]
 8002c78:	60bb      	str	r3, [r7, #8]
					xItemValue = listGET_LIST_ITEM_VALUE( &( pxTCB->xStateListItem ) );
 8002c7a:	68bb      	ldr	r3, [r7, #8]
 8002c7c:	685b      	ldr	r3, [r3, #4]
 8002c7e:	607b      	str	r3, [r7, #4]

					if( xConstTickCount < xItemValue )
 8002c80:	693a      	ldr	r2, [r7, #16]
 8002c82:	687b      	ldr	r3, [r7, #4]
 8002c84:	429a      	cmp	r2, r3
 8002c86:	d203      	bcs.n	8002c90 <xTaskIncrementTick+0xa0>
						/* It is not time to unblock this item yet, but the
						item value is the time at which the task at the head
						of the blocked list must be removed from the Blocked
						state -	so record the item value in
						xNextTaskUnblockTime. */
						xNextTaskUnblockTime = xItemValue;
 8002c88:	4b2d      	ldr	r3, [pc, #180]	; (8002d40 <xTaskIncrementTick+0x150>)
 8002c8a:	687a      	ldr	r2, [r7, #4]
 8002c8c:	601a      	str	r2, [r3, #0]
						break;
 8002c8e:	e02f      	b.n	8002cf0 <xTaskIncrementTick+0x100>
					{
						mtCOVERAGE_TEST_MARKER();
					}

					/* It is time to remove the item from the Blocked state. */
					( void ) uxListRemove( &( pxTCB->xStateListItem ) );
 8002c90:	68bb      	ldr	r3, [r7, #8]
 8002c92:	3304      	adds	r3, #4
 8002c94:	0018      	movs	r0, r3
 8002c96:	f7ff f8c2 	bl	8001e1e <uxListRemove>

					/* Is the task waiting on an event also?  If so remove
					it from the event list. */
					if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL )
 8002c9a:	68bb      	ldr	r3, [r7, #8]
 8002c9c:	6a9b      	ldr	r3, [r3, #40]	; 0x28
 8002c9e:	2b00      	cmp	r3, #0
 8002ca0:	d004      	beq.n	8002cac <xTaskIncrementTick+0xbc>
					{
						( void ) uxListRemove( &( pxTCB->xEventListItem ) );
 8002ca2:	68bb      	ldr	r3, [r7, #8]
 8002ca4:	3318      	adds	r3, #24
 8002ca6:	0018      	movs	r0, r3
 8002ca8:	f7ff f8b9 	bl	8001e1e <uxListRemove>
						mtCOVERAGE_TEST_MARKER();
					}

					/* Place the unblocked task into the appropriate ready
					list. */
					prvAddTaskToReadyList( pxTCB );
 8002cac:	68bb      	ldr	r3, [r7, #8]
 8002cae:	6ada      	ldr	r2, [r3, #44]	; 0x2c
 8002cb0:	4b24      	ldr	r3, [pc, #144]	; (8002d44 <xTaskIncrementTick+0x154>)
 8002cb2:	681b      	ldr	r3, [r3, #0]
 8002cb4:	429a      	cmp	r2, r3
 8002cb6:	d903      	bls.n	8002cc0 <xTaskIncrementTick+0xd0>
 8002cb8:	68bb      	ldr	r3, [r7, #8]
 8002cba:	6ada      	ldr	r2, [r3, #44]	; 0x2c
 8002cbc:	4b21      	ldr	r3, [pc, #132]	; (8002d44 <xTaskIncrementTick+0x154>)
 8002cbe:	601a      	str	r2, [r3, #0]
 8002cc0:	68bb      	ldr	r3, [r7, #8]
 8002cc2:	6ada      	ldr	r2, [r3, #44]	; 0x2c
 8002cc4:	0013      	movs	r3, r2
 8002cc6:	009b      	lsls	r3, r3, #2
 8002cc8:	189b      	adds	r3, r3, r2
 8002cca:	009b      	lsls	r3, r3, #2
 8002ccc:	4a1e      	ldr	r2, [pc, #120]	; (8002d48 <xTaskIncrementTick+0x158>)
 8002cce:	189a      	adds	r2, r3, r2
 8002cd0:	68bb      	ldr	r3, [r7, #8]
 8002cd2:	3304      	adds	r3, #4
 8002cd4:	0019      	movs	r1, r3
 8002cd6:	0010      	movs	r0, r2
 8002cd8:	f7ff f849 	bl	8001d6e <vListInsertEnd>
					{
						/* Preemption is on, but a context switch should
						only be performed if the unblocked task has a
						priority that is equal to or higher than the
						currently executing task. */
						if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
 8002cdc:	68bb      	ldr	r3, [r7, #8]
 8002cde:	6ada      	ldr	r2, [r3, #44]	; 0x2c
 8002ce0:	4b1a      	ldr	r3, [pc, #104]	; (8002d4c <xTaskIncrementTick+0x15c>)
 8002ce2:	681b      	ldr	r3, [r3, #0]
 8002ce4:	6adb      	ldr	r3, [r3, #44]	; 0x2c
 8002ce6:	429a      	cmp	r2, r3
 8002ce8:	d3b3      	bcc.n	8002c52 <xTaskIncrementTick+0x62>
						{
							xSwitchRequired = pdTRUE;
 8002cea:	2301      	movs	r3, #1
 8002cec:	617b      	str	r3, [r7, #20]
				if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
 8002cee:	e7b0      	b.n	8002c52 <xTaskIncrementTick+0x62>
		/* Tasks of equal priority to the currently running task will share
		processing time (time slice) if preemption is on, and the application
		writer has not explicitly turned time slicing off. */
		#if ( ( configUSE_PREEMPTION == 1 ) && ( configUSE_TIME_SLICING == 1 ) )
		{
			if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ pxCurrentTCB->uxPriority ] ) ) > ( UBaseType_t ) 1 )
 8002cf0:	4b16      	ldr	r3, [pc, #88]	; (8002d4c <xTaskIncrementTick+0x15c>)
 8002cf2:	681b      	ldr	r3, [r3, #0]
 8002cf4:	6ada      	ldr	r2, [r3, #44]	; 0x2c
 8002cf6:	4914      	ldr	r1, [pc, #80]	; (8002d48 <xTaskIncrementTick+0x158>)
 8002cf8:	0013      	movs	r3, r2
 8002cfa:	009b      	lsls	r3, r3, #2
 8002cfc:	189b      	adds	r3, r3, r2
 8002cfe:	009b      	lsls	r3, r3, #2
 8002d00:	585b      	ldr	r3, [r3, r1]
 8002d02:	2b01      	cmp	r3, #1
 8002d04:	d907      	bls.n	8002d16 <xTaskIncrementTick+0x126>
			{
				xSwitchRequired = pdTRUE;
 8002d06:	2301      	movs	r3, #1
 8002d08:	617b      	str	r3, [r7, #20]
 8002d0a:	e004      	b.n	8002d16 <xTaskIncrementTick+0x126>
		}
		#endif /* configUSE_TICK_HOOK */
	}
	else
	{
		++uxPendedTicks;
 8002d0c:	4b10      	ldr	r3, [pc, #64]	; (8002d50 <xTaskIncrementTick+0x160>)
 8002d0e:	681b      	ldr	r3, [r3, #0]
 8002d10:	1c5a      	adds	r2, r3, #1
 8002d12:	4b0f      	ldr	r3, [pc, #60]	; (8002d50 <xTaskIncrementTick+0x160>)
 8002d14:	601a      	str	r2, [r3, #0]
		#endif
	}

	#if ( configUSE_PREEMPTION == 1 )
	{
		if( xYieldPending != pdFALSE )
 8002d16:	4b0f      	ldr	r3, [pc, #60]	; (8002d54 <xTaskIncrementTick+0x164>)
 8002d18:	681b      	ldr	r3, [r3, #0]
 8002d1a:	2b00      	cmp	r3, #0
 8002d1c:	d001      	beq.n	8002d22 <xTaskIncrementTick+0x132>
		{
			xSwitchRequired = pdTRUE;
 8002d1e:	2301      	movs	r3, #1
 8002d20:	617b      	str	r3, [r7, #20]
			mtCOVERAGE_TEST_MARKER();
		}
	}
	#endif /* configUSE_PREEMPTION */

	return xSwitchRequired;
 8002d22:	697b      	ldr	r3, [r7, #20]
}
 8002d24:	0018      	movs	r0, r3
 8002d26:	46bd      	mov	sp, r7
 8002d28:	b006      	add	sp, #24
 8002d2a:	bd80      	pop	{r7, pc}
 8002d2c:	20000be8 	.word	0x20000be8
 8002d30:	20000bc4 	.word	0x20000bc4
 8002d34:	20000b78 	.word	0x20000b78
 8002d38:	20000b7c 	.word	0x20000b7c
 8002d3c:	20000bd8 	.word	0x20000bd8
 8002d40:	20000be0 	.word	0x20000be0
 8002d44:	20000bc8 	.word	0x20000bc8
 8002d48:	200006f0 	.word	0x200006f0
 8002d4c:	200006ec 	.word	0x200006ec
 8002d50:	20000bd0 	.word	0x20000bd0
 8002d54:	20000bd4 	.word	0x20000bd4

08002d58 <vTaskSwitchContext>:

#endif /* configUSE_APPLICATION_TASK_TAG */
/*-----------------------------------------------------------*/

void vTaskSwitchContext( void )
{
 8002d58:	b580      	push	{r7, lr}
 8002d5a:	b082      	sub	sp, #8
 8002d5c:	af00      	add	r7, sp, #0
	if( uxSchedulerSuspended != ( UBaseType_t ) pdFALSE )
 8002d5e:	4b22      	ldr	r3, [pc, #136]	; (8002de8 <vTaskSwitchContext+0x90>)
 8002d60:	681b      	ldr	r3, [r3, #0]
 8002d62:	2b00      	cmp	r3, #0
 8002d64:	d003      	beq.n	8002d6e <vTaskSwitchContext+0x16>
	{
		/* The scheduler is currently suspended - do not allow a context
		switch. */
		xYieldPending = pdTRUE;
 8002d66:	4b21      	ldr	r3, [pc, #132]	; (8002dec <vTaskSwitchContext+0x94>)
 8002d68:	2201      	movs	r2, #1
 8002d6a:	601a      	str	r2, [r3, #0]
			structure specific to this task. */
			_impure_ptr = &( pxCurrentTCB->xNewLib_reent );
		}
		#endif /* configUSE_NEWLIB_REENTRANT */
	}
}
 8002d6c:	e037      	b.n	8002dde <vTaskSwitchContext+0x86>
		xYieldPending = pdFALSE;
 8002d6e:	4b1f      	ldr	r3, [pc, #124]	; (8002dec <vTaskSwitchContext+0x94>)
 8002d70:	2200      	movs	r2, #0
 8002d72:	601a      	str	r2, [r3, #0]
		taskSELECT_HIGHEST_PRIORITY_TASK();
 8002d74:	4b1e      	ldr	r3, [pc, #120]	; (8002df0 <vTaskSwitchContext+0x98>)
 8002d76:	681b      	ldr	r3, [r3, #0]
 8002d78:	607b      	str	r3, [r7, #4]
 8002d7a:	e007      	b.n	8002d8c <vTaskSwitchContext+0x34>
 8002d7c:	687b      	ldr	r3, [r7, #4]
 8002d7e:	2b00      	cmp	r3, #0
 8002d80:	d101      	bne.n	8002d86 <vTaskSwitchContext+0x2e>
 8002d82:	b672      	cpsid	i
 8002d84:	e7fe      	b.n	8002d84 <vTaskSwitchContext+0x2c>
 8002d86:	687b      	ldr	r3, [r7, #4]
 8002d88:	3b01      	subs	r3, #1
 8002d8a:	607b      	str	r3, [r7, #4]
 8002d8c:	4919      	ldr	r1, [pc, #100]	; (8002df4 <vTaskSwitchContext+0x9c>)
 8002d8e:	687a      	ldr	r2, [r7, #4]
 8002d90:	0013      	movs	r3, r2
 8002d92:	009b      	lsls	r3, r3, #2
 8002d94:	189b      	adds	r3, r3, r2
 8002d96:	009b      	lsls	r3, r3, #2
 8002d98:	585b      	ldr	r3, [r3, r1]
 8002d9a:	2b00      	cmp	r3, #0
 8002d9c:	d0ee      	beq.n	8002d7c <vTaskSwitchContext+0x24>
 8002d9e:	687a      	ldr	r2, [r7, #4]
 8002da0:	0013      	movs	r3, r2
 8002da2:	009b      	lsls	r3, r3, #2
 8002da4:	189b      	adds	r3, r3, r2
 8002da6:	009b      	lsls	r3, r3, #2
 8002da8:	4a12      	ldr	r2, [pc, #72]	; (8002df4 <vTaskSwitchContext+0x9c>)
 8002daa:	189b      	adds	r3, r3, r2
 8002dac:	603b      	str	r3, [r7, #0]
 8002dae:	683b      	ldr	r3, [r7, #0]
 8002db0:	685b      	ldr	r3, [r3, #4]
 8002db2:	685a      	ldr	r2, [r3, #4]
 8002db4:	683b      	ldr	r3, [r7, #0]
 8002db6:	605a      	str	r2, [r3, #4]
 8002db8:	683b      	ldr	r3, [r7, #0]
 8002dba:	685a      	ldr	r2, [r3, #4]
 8002dbc:	683b      	ldr	r3, [r7, #0]
 8002dbe:	3308      	adds	r3, #8
 8002dc0:	429a      	cmp	r2, r3
 8002dc2:	d104      	bne.n	8002dce <vTaskSwitchContext+0x76>
 8002dc4:	683b      	ldr	r3, [r7, #0]
 8002dc6:	685b      	ldr	r3, [r3, #4]
 8002dc8:	685a      	ldr	r2, [r3, #4]
 8002dca:	683b      	ldr	r3, [r7, #0]
 8002dcc:	605a      	str	r2, [r3, #4]
 8002dce:	683b      	ldr	r3, [r7, #0]
 8002dd0:	685b      	ldr	r3, [r3, #4]
 8002dd2:	68da      	ldr	r2, [r3, #12]
 8002dd4:	4b08      	ldr	r3, [pc, #32]	; (8002df8 <vTaskSwitchContext+0xa0>)
 8002dd6:	601a      	str	r2, [r3, #0]
 8002dd8:	4b05      	ldr	r3, [pc, #20]	; (8002df0 <vTaskSwitchContext+0x98>)
 8002dda:	687a      	ldr	r2, [r7, #4]
 8002ddc:	601a      	str	r2, [r3, #0]
}
 8002dde:	46c0      	nop			; (mov r8, r8)
 8002de0:	46bd      	mov	sp, r7
 8002de2:	b002      	add	sp, #8
 8002de4:	bd80      	pop	{r7, pc}
 8002de6:	46c0      	nop			; (mov r8, r8)
 8002de8:	20000be8 	.word	0x20000be8
 8002dec:	20000bd4 	.word	0x20000bd4
 8002df0:	20000bc8 	.word	0x20000bc8
 8002df4:	200006f0 	.word	0x200006f0
 8002df8:	200006ec 	.word	0x200006ec

08002dfc <vTaskPlaceOnEventList>:
/*-----------------------------------------------------------*/

void vTaskPlaceOnEventList( List_t * const pxEventList, const TickType_t xTicksToWait )
{
 8002dfc:	b580      	push	{r7, lr}
 8002dfe:	b082      	sub	sp, #8
 8002e00:	af00      	add	r7, sp, #0
 8002e02:	6078      	str	r0, [r7, #4]
 8002e04:	6039      	str	r1, [r7, #0]
	configASSERT( pxEventList );
 8002e06:	687b      	ldr	r3, [r7, #4]
 8002e08:	2b00      	cmp	r3, #0
 8002e0a:	d101      	bne.n	8002e10 <vTaskPlaceOnEventList+0x14>
 8002e0c:	b672      	cpsid	i
 8002e0e:	e7fe      	b.n	8002e0e <vTaskPlaceOnEventList+0x12>

	/* Place the event list item of the TCB in the appropriate event list.
	This is placed in the list in priority order so the highest priority task
	is the first to be woken by the event.  The queue that contains the event
	list is locked, preventing simultaneous access from interrupts. */
	vListInsert( pxEventList, &( pxCurrentTCB->xEventListItem ) );
 8002e10:	4b08      	ldr	r3, [pc, #32]	; (8002e34 <vTaskPlaceOnEventList+0x38>)
 8002e12:	681b      	ldr	r3, [r3, #0]
 8002e14:	3318      	adds	r3, #24
 8002e16:	001a      	movs	r2, r3
 8002e18:	687b      	ldr	r3, [r7, #4]
 8002e1a:	0011      	movs	r1, r2
 8002e1c:	0018      	movs	r0, r3
 8002e1e:	f7fe ffc8 	bl	8001db2 <vListInsert>

	prvAddCurrentTaskToDelayedList( xTicksToWait, pdTRUE );
 8002e22:	683b      	ldr	r3, [r7, #0]
 8002e24:	2101      	movs	r1, #1
 8002e26:	0018      	movs	r0, r3
 8002e28:	f000 fa3c 	bl	80032a4 <prvAddCurrentTaskToDelayedList>
}
 8002e2c:	46c0      	nop			; (mov r8, r8)
 8002e2e:	46bd      	mov	sp, r7
 8002e30:	b002      	add	sp, #8
 8002e32:	bd80      	pop	{r7, pc}
 8002e34:	200006ec 	.word	0x200006ec

08002e38 <vTaskPlaceOnEventListRestricted>:
/*-----------------------------------------------------------*/

#if( configUSE_TIMERS == 1 )

	void vTaskPlaceOnEventListRestricted( List_t * const pxEventList, TickType_t xTicksToWait, const BaseType_t xWaitIndefinitely )
	{
 8002e38:	b580      	push	{r7, lr}
 8002e3a:	b084      	sub	sp, #16
 8002e3c:	af00      	add	r7, sp, #0
 8002e3e:	60f8      	str	r0, [r7, #12]
 8002e40:	60b9      	str	r1, [r7, #8]
 8002e42:	607a      	str	r2, [r7, #4]
		configASSERT( pxEventList );
 8002e44:	68fb      	ldr	r3, [r7, #12]
 8002e46:	2b00      	cmp	r3, #0
 8002e48:	d101      	bne.n	8002e4e <vTaskPlaceOnEventListRestricted+0x16>
 8002e4a:	b672      	cpsid	i
 8002e4c:	e7fe      	b.n	8002e4c <vTaskPlaceOnEventListRestricted+0x14>

		/* Place the event list item of the TCB in the appropriate event list.
		In this case it is assume that this is the only task that is going to
		be waiting on this event list, so the faster vListInsertEnd() function
		can be used in place of vListInsert. */
		vListInsertEnd( pxEventList, &( pxCurrentTCB->xEventListItem ) );
 8002e4e:	4b0c      	ldr	r3, [pc, #48]	; (8002e80 <vTaskPlaceOnEventListRestricted+0x48>)
 8002e50:	681b      	ldr	r3, [r3, #0]
 8002e52:	3318      	adds	r3, #24
 8002e54:	001a      	movs	r2, r3
 8002e56:	68fb      	ldr	r3, [r7, #12]
 8002e58:	0011      	movs	r1, r2
 8002e5a:	0018      	movs	r0, r3
 8002e5c:	f7fe ff87 	bl	8001d6e <vListInsertEnd>

		/* If the task should block indefinitely then set the block time to a
		value that will be recognised as an indefinite delay inside the
		prvAddCurrentTaskToDelayedList() function. */
		if( xWaitIndefinitely != pdFALSE )
 8002e60:	687b      	ldr	r3, [r7, #4]
 8002e62:	2b00      	cmp	r3, #0
 8002e64:	d002      	beq.n	8002e6c <vTaskPlaceOnEventListRestricted+0x34>
		{
			xTicksToWait = portMAX_DELAY;
 8002e66:	2301      	movs	r3, #1
 8002e68:	425b      	negs	r3, r3
 8002e6a:	60bb      	str	r3, [r7, #8]
		}

		traceTASK_DELAY_UNTIL( ( xTickCount + xTicksToWait ) );
		prvAddCurrentTaskToDelayedList( xTicksToWait, xWaitIndefinitely );
 8002e6c:	687a      	ldr	r2, [r7, #4]
 8002e6e:	68bb      	ldr	r3, [r7, #8]
 8002e70:	0011      	movs	r1, r2
 8002e72:	0018      	movs	r0, r3
 8002e74:	f000 fa16 	bl	80032a4 <prvAddCurrentTaskToDelayedList>
	}
 8002e78:	46c0      	nop			; (mov r8, r8)
 8002e7a:	46bd      	mov	sp, r7
 8002e7c:	b004      	add	sp, #16
 8002e7e:	bd80      	pop	{r7, pc}
 8002e80:	200006ec 	.word	0x200006ec

08002e84 <xTaskRemoveFromEventList>:

#endif /* configUSE_TIMERS */
/*-----------------------------------------------------------*/

BaseType_t xTaskRemoveFromEventList( const List_t * const pxEventList )
{
 8002e84:	b580      	push	{r7, lr}
 8002e86:	b084      	sub	sp, #16
 8002e88:	af00      	add	r7, sp, #0
 8002e8a:	6078      	str	r0, [r7, #4]
	get called - the lock count on the queue will get modified instead.  This
	means exclusive access to the event list is guaranteed here.

	This function assumes that a check has already been made to ensure that
	pxEventList is not empty. */
	pxUnblockedTCB = ( TCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxEventList );
 8002e8c:	687b      	ldr	r3, [r7, #4]
 8002e8e:	68db      	ldr	r3, [r3, #12]
 8002e90:	68db      	ldr	r3, [r3, #12]
 8002e92:	60bb      	str	r3, [r7, #8]
	configASSERT( pxUnblockedTCB );
 8002e94:	68bb      	ldr	r3, [r7, #8]
 8002e96:	2b00      	cmp	r3, #0
 8002e98:	d101      	bne.n	8002e9e <xTaskRemoveFromEventList+0x1a>
 8002e9a:	b672      	cpsid	i
 8002e9c:	e7fe      	b.n	8002e9c <xTaskRemoveFromEventList+0x18>
	( void ) uxListRemove( &( pxUnblockedTCB->xEventListItem ) );
 8002e9e:	68bb      	ldr	r3, [r7, #8]
 8002ea0:	3318      	adds	r3, #24
 8002ea2:	0018      	movs	r0, r3
 8002ea4:	f7fe ffbb 	bl	8001e1e <uxListRemove>

	if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
 8002ea8:	4b1e      	ldr	r3, [pc, #120]	; (8002f24 <xTaskRemoveFromEventList+0xa0>)
 8002eaa:	681b      	ldr	r3, [r3, #0]
 8002eac:	2b00      	cmp	r3, #0
 8002eae:	d11d      	bne.n	8002eec <xTaskRemoveFromEventList+0x68>
	{
		( void ) uxListRemove( &( pxUnblockedTCB->xStateListItem ) );
 8002eb0:	68bb      	ldr	r3, [r7, #8]
 8002eb2:	3304      	adds	r3, #4
 8002eb4:	0018      	movs	r0, r3
 8002eb6:	f7fe ffb2 	bl	8001e1e <uxListRemove>
		prvAddTaskToReadyList( pxUnblockedTCB );
 8002eba:	68bb      	ldr	r3, [r7, #8]
 8002ebc:	6ada      	ldr	r2, [r3, #44]	; 0x2c
 8002ebe:	4b1a      	ldr	r3, [pc, #104]	; (8002f28 <xTaskRemoveFromEventList+0xa4>)
 8002ec0:	681b      	ldr	r3, [r3, #0]
 8002ec2:	429a      	cmp	r2, r3
 8002ec4:	d903      	bls.n	8002ece <xTaskRemoveFromEventList+0x4a>
 8002ec6:	68bb      	ldr	r3, [r7, #8]
 8002ec8:	6ada      	ldr	r2, [r3, #44]	; 0x2c
 8002eca:	4b17      	ldr	r3, [pc, #92]	; (8002f28 <xTaskRemoveFromEventList+0xa4>)
 8002ecc:	601a      	str	r2, [r3, #0]
 8002ece:	68bb      	ldr	r3, [r7, #8]
 8002ed0:	6ada      	ldr	r2, [r3, #44]	; 0x2c
 8002ed2:	0013      	movs	r3, r2
 8002ed4:	009b      	lsls	r3, r3, #2
 8002ed6:	189b      	adds	r3, r3, r2
 8002ed8:	009b      	lsls	r3, r3, #2
 8002eda:	4a14      	ldr	r2, [pc, #80]	; (8002f2c <xTaskRemoveFromEventList+0xa8>)
 8002edc:	189a      	adds	r2, r3, r2
 8002ede:	68bb      	ldr	r3, [r7, #8]
 8002ee0:	3304      	adds	r3, #4
 8002ee2:	0019      	movs	r1, r3
 8002ee4:	0010      	movs	r0, r2
 8002ee6:	f7fe ff42 	bl	8001d6e <vListInsertEnd>
 8002eea:	e007      	b.n	8002efc <xTaskRemoveFromEventList+0x78>
	}
	else
	{
		/* The delayed and ready lists cannot be accessed, so hold this task
		pending until the scheduler is resumed. */
		vListInsertEnd( &( xPendingReadyList ), &( pxUnblockedTCB->xEventListItem ) );
 8002eec:	68bb      	ldr	r3, [r7, #8]
 8002eee:	3318      	adds	r3, #24
 8002ef0:	001a      	movs	r2, r3
 8002ef2:	4b0f      	ldr	r3, [pc, #60]	; (8002f30 <xTaskRemoveFromEventList+0xac>)
 8002ef4:	0011      	movs	r1, r2
 8002ef6:	0018      	movs	r0, r3
 8002ef8:	f7fe ff39 	bl	8001d6e <vListInsertEnd>
	}

	if( pxUnblockedTCB->uxPriority > pxCurrentTCB->uxPriority )
 8002efc:	68bb      	ldr	r3, [r7, #8]
 8002efe:	6ada      	ldr	r2, [r3, #44]	; 0x2c
 8002f00:	4b0c      	ldr	r3, [pc, #48]	; (8002f34 <xTaskRemoveFromEventList+0xb0>)
 8002f02:	681b      	ldr	r3, [r3, #0]
 8002f04:	6adb      	ldr	r3, [r3, #44]	; 0x2c
 8002f06:	429a      	cmp	r2, r3
 8002f08:	d905      	bls.n	8002f16 <xTaskRemoveFromEventList+0x92>
	{
		/* Return true if the task removed from the event list has a higher
		priority than the calling task.  This allows the calling task to know if
		it should force a context switch now. */
		xReturn = pdTRUE;
 8002f0a:	2301      	movs	r3, #1
 8002f0c:	60fb      	str	r3, [r7, #12]

		/* Mark that a yield is pending in case the user is not using the
		"xHigherPriorityTaskWoken" parameter to an ISR safe FreeRTOS function. */
		xYieldPending = pdTRUE;
 8002f0e:	4b0a      	ldr	r3, [pc, #40]	; (8002f38 <xTaskRemoveFromEventList+0xb4>)
 8002f10:	2201      	movs	r2, #1
 8002f12:	601a      	str	r2, [r3, #0]
 8002f14:	e001      	b.n	8002f1a <xTaskRemoveFromEventList+0x96>
	}
	else
	{
		xReturn = pdFALSE;
 8002f16:	2300      	movs	r3, #0
 8002f18:	60fb      	str	r3, [r7, #12]
		ensure it is updated at the earliest possible time. */
		prvResetNextTaskUnblockTime();
	}
	#endif

	return xReturn;
 8002f1a:	68fb      	ldr	r3, [r7, #12]
}
 8002f1c:	0018      	movs	r0, r3
 8002f1e:	46bd      	mov	sp, r7
 8002f20:	b004      	add	sp, #16
 8002f22:	bd80      	pop	{r7, pc}
 8002f24:	20000be8 	.word	0x20000be8
 8002f28:	20000bc8 	.word	0x20000bc8
 8002f2c:	200006f0 	.word	0x200006f0
 8002f30:	20000b80 	.word	0x20000b80
 8002f34:	200006ec 	.word	0x200006ec
 8002f38:	20000bd4 	.word	0x20000bd4

08002f3c <vTaskInternalSetTimeOutState>:
	taskEXIT_CRITICAL();
}
/*-----------------------------------------------------------*/

void vTaskInternalSetTimeOutState( TimeOut_t * const pxTimeOut )
{
 8002f3c:	b580      	push	{r7, lr}
 8002f3e:	b082      	sub	sp, #8
 8002f40:	af00      	add	r7, sp, #0
 8002f42:	6078      	str	r0, [r7, #4]
	/* For internal use only as it does not use a critical section. */
	pxTimeOut->xOverflowCount = xNumOfOverflows;
 8002f44:	4b05      	ldr	r3, [pc, #20]	; (8002f5c <vTaskInternalSetTimeOutState+0x20>)
 8002f46:	681a      	ldr	r2, [r3, #0]
 8002f48:	687b      	ldr	r3, [r7, #4]
 8002f4a:	601a      	str	r2, [r3, #0]
	pxTimeOut->xTimeOnEntering = xTickCount;
 8002f4c:	4b04      	ldr	r3, [pc, #16]	; (8002f60 <vTaskInternalSetTimeOutState+0x24>)
 8002f4e:	681a      	ldr	r2, [r3, #0]
 8002f50:	687b      	ldr	r3, [r7, #4]
 8002f52:	605a      	str	r2, [r3, #4]
}
 8002f54:	46c0      	nop			; (mov r8, r8)
 8002f56:	46bd      	mov	sp, r7
 8002f58:	b002      	add	sp, #8
 8002f5a:	bd80      	pop	{r7, pc}
 8002f5c:	20000bd8 	.word	0x20000bd8
 8002f60:	20000bc4 	.word	0x20000bc4

08002f64 <xTaskCheckForTimeOut>:
/*-----------------------------------------------------------*/

BaseType_t xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, TickType_t * const pxTicksToWait )
{
 8002f64:	b580      	push	{r7, lr}
 8002f66:	b086      	sub	sp, #24
 8002f68:	af00      	add	r7, sp, #0
 8002f6a:	6078      	str	r0, [r7, #4]
 8002f6c:	6039      	str	r1, [r7, #0]
BaseType_t xReturn;

	configASSERT( pxTimeOut );
 8002f6e:	687b      	ldr	r3, [r7, #4]
 8002f70:	2b00      	cmp	r3, #0
 8002f72:	d101      	bne.n	8002f78 <xTaskCheckForTimeOut+0x14>
 8002f74:	b672      	cpsid	i
 8002f76:	e7fe      	b.n	8002f76 <xTaskCheckForTimeOut+0x12>
	configASSERT( pxTicksToWait );
 8002f78:	683b      	ldr	r3, [r7, #0]
 8002f7a:	2b00      	cmp	r3, #0
 8002f7c:	d101      	bne.n	8002f82 <xTaskCheckForTimeOut+0x1e>
 8002f7e:	b672      	cpsid	i
 8002f80:	e7fe      	b.n	8002f80 <xTaskCheckForTimeOut+0x1c>

	taskENTER_CRITICAL();
 8002f82:	f000 fd55 	bl	8003a30 <vPortEnterCritical>
	{
		/* Minor optimisation.  The tick count cannot change in this block. */
		const TickType_t xConstTickCount = xTickCount;
 8002f86:	4b1d      	ldr	r3, [pc, #116]	; (8002ffc <xTaskCheckForTimeOut+0x98>)
 8002f88:	681b      	ldr	r3, [r3, #0]
 8002f8a:	613b      	str	r3, [r7, #16]
		const TickType_t xElapsedTime = xConstTickCount - pxTimeOut->xTimeOnEntering;
 8002f8c:	687b      	ldr	r3, [r7, #4]
 8002f8e:	685b      	ldr	r3, [r3, #4]
 8002f90:	693a      	ldr	r2, [r7, #16]
 8002f92:	1ad3      	subs	r3, r2, r3
 8002f94:	60fb      	str	r3, [r7, #12]
			}
			else
		#endif

		#if ( INCLUDE_vTaskSuspend == 1 )
			if( *pxTicksToWait == portMAX_DELAY )
 8002f96:	683b      	ldr	r3, [r7, #0]
 8002f98:	681b      	ldr	r3, [r3, #0]
 8002f9a:	3301      	adds	r3, #1
 8002f9c:	d102      	bne.n	8002fa4 <xTaskCheckForTimeOut+0x40>
			{
				/* If INCLUDE_vTaskSuspend is set to 1 and the block time
				specified is the maximum block time then the task should block
				indefinitely, and therefore never time out. */
				xReturn = pdFALSE;
 8002f9e:	2300      	movs	r3, #0
 8002fa0:	617b      	str	r3, [r7, #20]
 8002fa2:	e024      	b.n	8002fee <xTaskCheckForTimeOut+0x8a>
			}
			else
		#endif

		if( ( xNumOfOverflows != pxTimeOut->xOverflowCount ) && ( xConstTickCount >= pxTimeOut->xTimeOnEntering ) ) /*lint !e525 Indentation preferred as is to make code within pre-processor directives clearer. */
 8002fa4:	687b      	ldr	r3, [r7, #4]
 8002fa6:	681a      	ldr	r2, [r3, #0]
 8002fa8:	4b15      	ldr	r3, [pc, #84]	; (8003000 <xTaskCheckForTimeOut+0x9c>)
 8002faa:	681b      	ldr	r3, [r3, #0]
 8002fac:	429a      	cmp	r2, r3
 8002fae:	d007      	beq.n	8002fc0 <xTaskCheckForTimeOut+0x5c>
 8002fb0:	687b      	ldr	r3, [r7, #4]
 8002fb2:	685b      	ldr	r3, [r3, #4]
 8002fb4:	693a      	ldr	r2, [r7, #16]
 8002fb6:	429a      	cmp	r2, r3
 8002fb8:	d302      	bcc.n	8002fc0 <xTaskCheckForTimeOut+0x5c>
			/* The tick count is greater than the time at which
			vTaskSetTimeout() was called, but has also overflowed since
			vTaskSetTimeOut() was called.  It must have wrapped all the way
			around and gone past again. This passed since vTaskSetTimeout()
			was called. */
			xReturn = pdTRUE;
 8002fba:	2301      	movs	r3, #1
 8002fbc:	617b      	str	r3, [r7, #20]
 8002fbe:	e016      	b.n	8002fee <xTaskCheckForTimeOut+0x8a>
		}
		else if( xElapsedTime < *pxTicksToWait ) /*lint !e961 Explicit casting is only redundant with some compilers, whereas others require it to prevent integer conversion errors. */
 8002fc0:	683b      	ldr	r3, [r7, #0]
 8002fc2:	681b      	ldr	r3, [r3, #0]
 8002fc4:	68fa      	ldr	r2, [r7, #12]
 8002fc6:	429a      	cmp	r2, r3
 8002fc8:	d20c      	bcs.n	8002fe4 <xTaskCheckForTimeOut+0x80>
		{
			/* Not a genuine timeout. Adjust parameters for time remaining. */
			*pxTicksToWait -= xElapsedTime;
 8002fca:	683b      	ldr	r3, [r7, #0]
 8002fcc:	681a      	ldr	r2, [r3, #0]
 8002fce:	68fb      	ldr	r3, [r7, #12]
 8002fd0:	1ad2      	subs	r2, r2, r3
 8002fd2:	683b      	ldr	r3, [r7, #0]
 8002fd4:	601a      	str	r2, [r3, #0]
			vTaskInternalSetTimeOutState( pxTimeOut );
 8002fd6:	687b      	ldr	r3, [r7, #4]
 8002fd8:	0018      	movs	r0, r3
 8002fda:	f7ff ffaf 	bl	8002f3c <vTaskInternalSetTimeOutState>
			xReturn = pdFALSE;
 8002fde:	2300      	movs	r3, #0
 8002fe0:	617b      	str	r3, [r7, #20]
 8002fe2:	e004      	b.n	8002fee <xTaskCheckForTimeOut+0x8a>
		}
		else
		{
			*pxTicksToWait = 0;
 8002fe4:	683b      	ldr	r3, [r7, #0]
 8002fe6:	2200      	movs	r2, #0
 8002fe8:	601a      	str	r2, [r3, #0]
			xReturn = pdTRUE;
 8002fea:	2301      	movs	r3, #1
 8002fec:	617b      	str	r3, [r7, #20]
		}
	}
	taskEXIT_CRITICAL();
 8002fee:	f000 fd31 	bl	8003a54 <vPortExitCritical>

	return xReturn;
 8002ff2:	697b      	ldr	r3, [r7, #20]
}
 8002ff4:	0018      	movs	r0, r3
 8002ff6:	46bd      	mov	sp, r7
 8002ff8:	b006      	add	sp, #24
 8002ffa:	bd80      	pop	{r7, pc}
 8002ffc:	20000bc4 	.word	0x20000bc4
 8003000:	20000bd8 	.word	0x20000bd8

08003004 <vTaskMissedYield>:
/*-----------------------------------------------------------*/

void vTaskMissedYield( void )
{
 8003004:	b580      	push	{r7, lr}
 8003006:	af00      	add	r7, sp, #0
	xYieldPending = pdTRUE;
 8003008:	4b02      	ldr	r3, [pc, #8]	; (8003014 <vTaskMissedYield+0x10>)
 800300a:	2201      	movs	r2, #1
 800300c:	601a      	str	r2, [r3, #0]
}
 800300e:	46c0      	nop			; (mov r8, r8)
 8003010:	46bd      	mov	sp, r7
 8003012:	bd80      	pop	{r7, pc}
 8003014:	20000bd4 	.word	0x20000bd4

08003018 <prvIdleTask>:
 *
 * void prvIdleTask( void *pvParameters );
 *
 */
static portTASK_FUNCTION( prvIdleTask, pvParameters )
{
 8003018:	b580      	push	{r7, lr}
 800301a:	b082      	sub	sp, #8
 800301c:	af00      	add	r7, sp, #0
 800301e:	6078      	str	r0, [r7, #4]

	for( ;; )
	{
		/* See if any tasks have deleted themselves - if so then the idle task
		is responsible for freeing the deleted task's TCB and stack. */
		prvCheckTasksWaitingTermination();
 8003020:	f000 f84e 	bl	80030c0 <prvCheckTasksWaitingTermination>

			A critical region is not required here as we are just reading from
			the list, and an occasional incorrect value will not matter.  If
			the ready list at the idle priority contains more than one task
			then a task other than the idle task is ready to execute. */
			if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ tskIDLE_PRIORITY ] ) ) > ( UBaseType_t ) 1 )
 8003024:	4b03      	ldr	r3, [pc, #12]	; (8003034 <prvIdleTask+0x1c>)
 8003026:	681b      	ldr	r3, [r3, #0]
 8003028:	2b01      	cmp	r3, #1
 800302a:	d9f9      	bls.n	8003020 <prvIdleTask+0x8>
			{
				taskYIELD();
 800302c:	f000 fcf0 	bl	8003a10 <vPortYield>
		prvCheckTasksWaitingTermination();
 8003030:	e7f6      	b.n	8003020 <prvIdleTask+0x8>
 8003032:	46c0      	nop			; (mov r8, r8)
 8003034:	200006f0 	.word	0x200006f0

08003038 <prvInitialiseTaskLists>:

#endif /* portUSING_MPU_WRAPPERS */
/*-----------------------------------------------------------*/

static void prvInitialiseTaskLists( void )
{
 8003038:	b580      	push	{r7, lr}
 800303a:	b082      	sub	sp, #8
 800303c:	af00      	add	r7, sp, #0
UBaseType_t uxPriority;

	for( uxPriority = ( UBaseType_t ) 0U; uxPriority < ( UBaseType_t ) configMAX_PRIORITIES; uxPriority++ )
 800303e:	2300      	movs	r3, #0
 8003040:	607b      	str	r3, [r7, #4]
 8003042:	e00c      	b.n	800305e <prvInitialiseTaskLists+0x26>
	{
		vListInitialise( &( pxReadyTasksLists[ uxPriority ] ) );
 8003044:	687a      	ldr	r2, [r7, #4]
 8003046:	0013      	movs	r3, r2
 8003048:	009b      	lsls	r3, r3, #2
 800304a:	189b      	adds	r3, r3, r2
 800304c:	009b      	lsls	r3, r3, #2
 800304e:	4a14      	ldr	r2, [pc, #80]	; (80030a0 <prvInitialiseTaskLists+0x68>)
 8003050:	189b      	adds	r3, r3, r2
 8003052:	0018      	movs	r0, r3
 8003054:	f7fe fe62 	bl	8001d1c <vListInitialise>
	for( uxPriority = ( UBaseType_t ) 0U; uxPriority < ( UBaseType_t ) configMAX_PRIORITIES; uxPriority++ )
 8003058:	687b      	ldr	r3, [r7, #4]
 800305a:	3301      	adds	r3, #1
 800305c:	607b      	str	r3, [r7, #4]
 800305e:	687b      	ldr	r3, [r7, #4]
 8003060:	2b37      	cmp	r3, #55	; 0x37
 8003062:	d9ef      	bls.n	8003044 <prvInitialiseTaskLists+0xc>
	}

	vListInitialise( &xDelayedTaskList1 );
 8003064:	4b0f      	ldr	r3, [pc, #60]	; (80030a4 <prvInitialiseTaskLists+0x6c>)
 8003066:	0018      	movs	r0, r3
 8003068:	f7fe fe58 	bl	8001d1c <vListInitialise>
	vListInitialise( &xDelayedTaskList2 );
 800306c:	4b0e      	ldr	r3, [pc, #56]	; (80030a8 <prvInitialiseTaskLists+0x70>)
 800306e:	0018      	movs	r0, r3
 8003070:	f7fe fe54 	bl	8001d1c <vListInitialise>
	vListInitialise( &xPendingReadyList );
 8003074:	4b0d      	ldr	r3, [pc, #52]	; (80030ac <prvInitialiseTaskLists+0x74>)
 8003076:	0018      	movs	r0, r3
 8003078:	f7fe fe50 	bl	8001d1c <vListInitialise>

	#if ( INCLUDE_vTaskDelete == 1 )
	{
		vListInitialise( &xTasksWaitingTermination );
 800307c:	4b0c      	ldr	r3, [pc, #48]	; (80030b0 <prvInitialiseTaskLists+0x78>)
 800307e:	0018      	movs	r0, r3
 8003080:	f7fe fe4c 	bl	8001d1c <vListInitialise>
	}
	#endif /* INCLUDE_vTaskDelete */

	#if ( INCLUDE_vTaskSuspend == 1 )
	{
		vListInitialise( &xSuspendedTaskList );
 8003084:	4b0b      	ldr	r3, [pc, #44]	; (80030b4 <prvInitialiseTaskLists+0x7c>)
 8003086:	0018      	movs	r0, r3
 8003088:	f7fe fe48 	bl	8001d1c <vListInitialise>
	}
	#endif /* INCLUDE_vTaskSuspend */

	/* Start with pxDelayedTaskList using list1 and the pxOverflowDelayedTaskList
	using list2. */
	pxDelayedTaskList = &xDelayedTaskList1;
 800308c:	4b0a      	ldr	r3, [pc, #40]	; (80030b8 <prvInitialiseTaskLists+0x80>)
 800308e:	4a05      	ldr	r2, [pc, #20]	; (80030a4 <prvInitialiseTaskLists+0x6c>)
 8003090:	601a      	str	r2, [r3, #0]
	pxOverflowDelayedTaskList = &xDelayedTaskList2;
 8003092:	4b0a      	ldr	r3, [pc, #40]	; (80030bc <prvInitialiseTaskLists+0x84>)
 8003094:	4a04      	ldr	r2, [pc, #16]	; (80030a8 <prvInitialiseTaskLists+0x70>)
 8003096:	601a      	str	r2, [r3, #0]
}
 8003098:	46c0      	nop			; (mov r8, r8)
 800309a:	46bd      	mov	sp, r7
 800309c:	b002      	add	sp, #8
 800309e:	bd80      	pop	{r7, pc}
 80030a0:	200006f0 	.word	0x200006f0
 80030a4:	20000b50 	.word	0x20000b50
 80030a8:	20000b64 	.word	0x20000b64
 80030ac:	20000b80 	.word	0x20000b80
 80030b0:	20000b94 	.word	0x20000b94
 80030b4:	20000bac 	.word	0x20000bac
 80030b8:	20000b78 	.word	0x20000b78
 80030bc:	20000b7c 	.word	0x20000b7c

080030c0 <prvCheckTasksWaitingTermination>:
/*-----------------------------------------------------------*/

static void prvCheckTasksWaitingTermination( void )
{
 80030c0:	b580      	push	{r7, lr}
 80030c2:	b082      	sub	sp, #8
 80030c4:	af00      	add	r7, sp, #0
	{
		TCB_t *pxTCB;

		/* uxDeletedTasksWaitingCleanUp is used to prevent vTaskSuspendAll()
		being called too often in the idle task. */
		while( uxDeletedTasksWaitingCleanUp > ( UBaseType_t ) 0U )
 80030c6:	e01a      	b.n	80030fe <prvCheckTasksWaitingTermination+0x3e>
		{
			taskENTER_CRITICAL();
 80030c8:	f000 fcb2 	bl	8003a30 <vPortEnterCritical>
			{
				pxTCB = ( TCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( ( &xTasksWaitingTermination ) );
 80030cc:	4b10      	ldr	r3, [pc, #64]	; (8003110 <prvCheckTasksWaitingTermination+0x50>)
 80030ce:	68db      	ldr	r3, [r3, #12]
 80030d0:	68db      	ldr	r3, [r3, #12]
 80030d2:	607b      	str	r3, [r7, #4]
				( void ) uxListRemove( &( pxTCB->xStateListItem ) );
 80030d4:	687b      	ldr	r3, [r7, #4]
 80030d6:	3304      	adds	r3, #4
 80030d8:	0018      	movs	r0, r3
 80030da:	f7fe fea0 	bl	8001e1e <uxListRemove>
				--uxCurrentNumberOfTasks;
 80030de:	4b0d      	ldr	r3, [pc, #52]	; (8003114 <prvCheckTasksWaitingTermination+0x54>)
 80030e0:	681b      	ldr	r3, [r3, #0]
 80030e2:	1e5a      	subs	r2, r3, #1
 80030e4:	4b0b      	ldr	r3, [pc, #44]	; (8003114 <prvCheckTasksWaitingTermination+0x54>)
 80030e6:	601a      	str	r2, [r3, #0]
				--uxDeletedTasksWaitingCleanUp;
 80030e8:	4b0b      	ldr	r3, [pc, #44]	; (8003118 <prvCheckTasksWaitingTermination+0x58>)
 80030ea:	681b      	ldr	r3, [r3, #0]
 80030ec:	1e5a      	subs	r2, r3, #1
 80030ee:	4b0a      	ldr	r3, [pc, #40]	; (8003118 <prvCheckTasksWaitingTermination+0x58>)
 80030f0:	601a      	str	r2, [r3, #0]
			}
			taskEXIT_CRITICAL();
 80030f2:	f000 fcaf 	bl	8003a54 <vPortExitCritical>

			prvDeleteTCB( pxTCB );
 80030f6:	687b      	ldr	r3, [r7, #4]
 80030f8:	0018      	movs	r0, r3
 80030fa:	f000 f80f 	bl	800311c <prvDeleteTCB>
		while( uxDeletedTasksWaitingCleanUp > ( UBaseType_t ) 0U )
 80030fe:	4b06      	ldr	r3, [pc, #24]	; (8003118 <prvCheckTasksWaitingTermination+0x58>)
 8003100:	681b      	ldr	r3, [r3, #0]
 8003102:	2b00      	cmp	r3, #0
 8003104:	d1e0      	bne.n	80030c8 <prvCheckTasksWaitingTermination+0x8>
		}
	}
	#endif /* INCLUDE_vTaskDelete */
}
 8003106:	46c0      	nop			; (mov r8, r8)
 8003108:	46bd      	mov	sp, r7
 800310a:	b002      	add	sp, #8
 800310c:	bd80      	pop	{r7, pc}
 800310e:	46c0      	nop			; (mov r8, r8)
 8003110:	20000b94 	.word	0x20000b94
 8003114:	20000bc0 	.word	0x20000bc0
 8003118:	20000ba8 	.word	0x20000ba8

0800311c <prvDeleteTCB>:
/*-----------------------------------------------------------*/

#if ( INCLUDE_vTaskDelete == 1 )

	static void prvDeleteTCB( TCB_t *pxTCB )
	{
 800311c:	b580      	push	{r7, lr}
 800311e:	b082      	sub	sp, #8
 8003120:	af00      	add	r7, sp, #0
 8003122:	6078      	str	r0, [r7, #4]
		#elif( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e731 Macro has been consolidated for readability reasons. */
		{
			/* The task could have been allocated statically or dynamically, so
			check what was statically allocated before trying to free the
			memory. */
			if( pxTCB->ucStaticallyAllocated == tskDYNAMICALLY_ALLOCATED_STACK_AND_TCB )
 8003124:	687b      	ldr	r3, [r7, #4]
 8003126:	2259      	movs	r2, #89	; 0x59
 8003128:	5c9b      	ldrb	r3, [r3, r2]
 800312a:	2b00      	cmp	r3, #0
 800312c:	d109      	bne.n	8003142 <prvDeleteTCB+0x26>
			{
				/* Both the stack and TCB were allocated dynamically, so both
				must be freed. */
				vPortFree( pxTCB->pxStack );
 800312e:	687b      	ldr	r3, [r7, #4]
 8003130:	6b1b      	ldr	r3, [r3, #48]	; 0x30
 8003132:	0018      	movs	r0, r3
 8003134:	f000 fdba 	bl	8003cac <vPortFree>
				vPortFree( pxTCB );
 8003138:	687b      	ldr	r3, [r7, #4]
 800313a:	0018      	movs	r0, r3
 800313c:	f000 fdb6 	bl	8003cac <vPortFree>
				configASSERT( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_AND_TCB	);
				mtCOVERAGE_TEST_MARKER();
			}
		}
		#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
	}
 8003140:	e010      	b.n	8003164 <prvDeleteTCB+0x48>
			else if( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_ONLY )
 8003142:	687b      	ldr	r3, [r7, #4]
 8003144:	2259      	movs	r2, #89	; 0x59
 8003146:	5c9b      	ldrb	r3, [r3, r2]
 8003148:	2b01      	cmp	r3, #1
 800314a:	d104      	bne.n	8003156 <prvDeleteTCB+0x3a>
				vPortFree( pxTCB );
 800314c:	687b      	ldr	r3, [r7, #4]
 800314e:	0018      	movs	r0, r3
 8003150:	f000 fdac 	bl	8003cac <vPortFree>
	}
 8003154:	e006      	b.n	8003164 <prvDeleteTCB+0x48>
				configASSERT( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_AND_TCB	);
 8003156:	687b      	ldr	r3, [r7, #4]
 8003158:	2259      	movs	r2, #89	; 0x59
 800315a:	5c9b      	ldrb	r3, [r3, r2]
 800315c:	2b02      	cmp	r3, #2
 800315e:	d001      	beq.n	8003164 <prvDeleteTCB+0x48>
 8003160:	b672      	cpsid	i
 8003162:	e7fe      	b.n	8003162 <prvDeleteTCB+0x46>
	}
 8003164:	46c0      	nop			; (mov r8, r8)
 8003166:	46bd      	mov	sp, r7
 8003168:	b002      	add	sp, #8
 800316a:	bd80      	pop	{r7, pc}

0800316c <prvResetNextTaskUnblockTime>:

#endif /* INCLUDE_vTaskDelete */
/*-----------------------------------------------------------*/

static void prvResetNextTaskUnblockTime( void )
{
 800316c:	b580      	push	{r7, lr}
 800316e:	b082      	sub	sp, #8
 8003170:	af00      	add	r7, sp, #0
TCB_t *pxTCB;

	if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
 8003172:	4b0e      	ldr	r3, [pc, #56]	; (80031ac <prvResetNextTaskUnblockTime+0x40>)
 8003174:	681b      	ldr	r3, [r3, #0]
 8003176:	681b      	ldr	r3, [r3, #0]
 8003178:	2b00      	cmp	r3, #0
 800317a:	d101      	bne.n	8003180 <prvResetNextTaskUnblockTime+0x14>
 800317c:	2301      	movs	r3, #1
 800317e:	e000      	b.n	8003182 <prvResetNextTaskUnblockTime+0x16>
 8003180:	2300      	movs	r3, #0
 8003182:	2b00      	cmp	r3, #0
 8003184:	d004      	beq.n	8003190 <prvResetNextTaskUnblockTime+0x24>
	{
		/* The new current delayed list is empty.  Set xNextTaskUnblockTime to
		the maximum possible value so it is	extremely unlikely that the
		if( xTickCount >= xNextTaskUnblockTime ) test will pass until
		there is an item in the delayed list. */
		xNextTaskUnblockTime = portMAX_DELAY;
 8003186:	4b0a      	ldr	r3, [pc, #40]	; (80031b0 <prvResetNextTaskUnblockTime+0x44>)
 8003188:	2201      	movs	r2, #1
 800318a:	4252      	negs	r2, r2
 800318c:	601a      	str	r2, [r3, #0]
		which the task at the head of the delayed list should be removed
		from the Blocked state. */
		( pxTCB ) = ( TCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList );
		xNextTaskUnblockTime = listGET_LIST_ITEM_VALUE( &( ( pxTCB )->xStateListItem ) );
	}
}
 800318e:	e008      	b.n	80031a2 <prvResetNextTaskUnblockTime+0x36>
		( pxTCB ) = ( TCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList );
 8003190:	4b06      	ldr	r3, [pc, #24]	; (80031ac <prvResetNextTaskUnblockTime+0x40>)
 8003192:	681b      	ldr	r3, [r3, #0]
 8003194:	68db      	ldr	r3, [r3, #12]
 8003196:	68db      	ldr	r3, [r3, #12]
 8003198:	607b      	str	r3, [r7, #4]
		xNextTaskUnblockTime = listGET_LIST_ITEM_VALUE( &( ( pxTCB )->xStateListItem ) );
 800319a:	687b      	ldr	r3, [r7, #4]
 800319c:	685a      	ldr	r2, [r3, #4]
 800319e:	4b04      	ldr	r3, [pc, #16]	; (80031b0 <prvResetNextTaskUnblockTime+0x44>)
 80031a0:	601a      	str	r2, [r3, #0]
}
 80031a2:	46c0      	nop			; (mov r8, r8)
 80031a4:	46bd      	mov	sp, r7
 80031a6:	b002      	add	sp, #8
 80031a8:	bd80      	pop	{r7, pc}
 80031aa:	46c0      	nop			; (mov r8, r8)
 80031ac:	20000b78 	.word	0x20000b78
 80031b0:	20000be0 	.word	0x20000be0

080031b4 <xTaskGetSchedulerState>:
/*-----------------------------------------------------------*/

#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )

	BaseType_t xTaskGetSchedulerState( void )
	{
 80031b4:	b580      	push	{r7, lr}
 80031b6:	b082      	sub	sp, #8
 80031b8:	af00      	add	r7, sp, #0
	BaseType_t xReturn;

		if( xSchedulerRunning == pdFALSE )
 80031ba:	4b0a      	ldr	r3, [pc, #40]	; (80031e4 <xTaskGetSchedulerState+0x30>)
 80031bc:	681b      	ldr	r3, [r3, #0]
 80031be:	2b00      	cmp	r3, #0
 80031c0:	d102      	bne.n	80031c8 <xTaskGetSchedulerState+0x14>
		{
			xReturn = taskSCHEDULER_NOT_STARTED;
 80031c2:	2301      	movs	r3, #1
 80031c4:	607b      	str	r3, [r7, #4]
 80031c6:	e008      	b.n	80031da <xTaskGetSchedulerState+0x26>
		}
		else
		{
			if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
 80031c8:	4b07      	ldr	r3, [pc, #28]	; (80031e8 <xTaskGetSchedulerState+0x34>)
 80031ca:	681b      	ldr	r3, [r3, #0]
 80031cc:	2b00      	cmp	r3, #0
 80031ce:	d102      	bne.n	80031d6 <xTaskGetSchedulerState+0x22>
			{
				xReturn = taskSCHEDULER_RUNNING;
 80031d0:	2302      	movs	r3, #2
 80031d2:	607b      	str	r3, [r7, #4]
 80031d4:	e001      	b.n	80031da <xTaskGetSchedulerState+0x26>
			}
			else
			{
				xReturn = taskSCHEDULER_SUSPENDED;
 80031d6:	2300      	movs	r3, #0
 80031d8:	607b      	str	r3, [r7, #4]
			}
		}

		return xReturn;
 80031da:	687b      	ldr	r3, [r7, #4]
	}
 80031dc:	0018      	movs	r0, r3
 80031de:	46bd      	mov	sp, r7
 80031e0:	b002      	add	sp, #8
 80031e2:	bd80      	pop	{r7, pc}
 80031e4:	20000bcc 	.word	0x20000bcc
 80031e8:	20000be8 	.word	0x20000be8

080031ec <xTaskPriorityDisinherit>:
/*-----------------------------------------------------------*/

#if ( configUSE_MUTEXES == 1 )

	BaseType_t xTaskPriorityDisinherit( TaskHandle_t const pxMutexHolder )
	{
 80031ec:	b580      	push	{r7, lr}
 80031ee:	b084      	sub	sp, #16
 80031f0:	af00      	add	r7, sp, #0
 80031f2:	6078      	str	r0, [r7, #4]
	TCB_t * const pxTCB = ( TCB_t * ) pxMutexHolder;
 80031f4:	687b      	ldr	r3, [r7, #4]
 80031f6:	60bb      	str	r3, [r7, #8]
	BaseType_t xReturn = pdFALSE;
 80031f8:	2300      	movs	r3, #0
 80031fa:	60fb      	str	r3, [r7, #12]

		if( pxMutexHolder != NULL )
 80031fc:	687b      	ldr	r3, [r7, #4]
 80031fe:	2b00      	cmp	r3, #0
 8003200:	d044      	beq.n	800328c <xTaskPriorityDisinherit+0xa0>
		{
			/* A task can only have an inherited priority if it holds the mutex.
			If the mutex is held by a task then it cannot be given from an
			interrupt, and if a mutex is given by the holding task then it must
			be the running state task. */
			configASSERT( pxTCB == pxCurrentTCB );
 8003202:	4b25      	ldr	r3, [pc, #148]	; (8003298 <xTaskPriorityDisinherit+0xac>)
 8003204:	681b      	ldr	r3, [r3, #0]
 8003206:	68ba      	ldr	r2, [r7, #8]
 8003208:	429a      	cmp	r2, r3
 800320a:	d001      	beq.n	8003210 <xTaskPriorityDisinherit+0x24>
 800320c:	b672      	cpsid	i
 800320e:	e7fe      	b.n	800320e <xTaskPriorityDisinherit+0x22>
			configASSERT( pxTCB->uxMutexesHeld );
 8003210:	68bb      	ldr	r3, [r7, #8]
 8003212:	6d1b      	ldr	r3, [r3, #80]	; 0x50
 8003214:	2b00      	cmp	r3, #0
 8003216:	d101      	bne.n	800321c <xTaskPriorityDisinherit+0x30>
 8003218:	b672      	cpsid	i
 800321a:	e7fe      	b.n	800321a <xTaskPriorityDisinherit+0x2e>
			( pxTCB->uxMutexesHeld )--;
 800321c:	68bb      	ldr	r3, [r7, #8]
 800321e:	6d1b      	ldr	r3, [r3, #80]	; 0x50
 8003220:	1e5a      	subs	r2, r3, #1
 8003222:	68bb      	ldr	r3, [r7, #8]
 8003224:	651a      	str	r2, [r3, #80]	; 0x50

			/* Has the holder of the mutex inherited the priority of another
			task? */
			if( pxTCB->uxPriority != pxTCB->uxBasePriority )
 8003226:	68bb      	ldr	r3, [r7, #8]
 8003228:	6ada      	ldr	r2, [r3, #44]	; 0x2c
 800322a:	68bb      	ldr	r3, [r7, #8]
 800322c:	6cdb      	ldr	r3, [r3, #76]	; 0x4c
 800322e:	429a      	cmp	r2, r3
 8003230:	d02c      	beq.n	800328c <xTaskPriorityDisinherit+0xa0>
			{
				/* Only disinherit if no other mutexes are held. */
				if( pxTCB->uxMutexesHeld == ( UBaseType_t ) 0 )
 8003232:	68bb      	ldr	r3, [r7, #8]
 8003234:	6d1b      	ldr	r3, [r3, #80]	; 0x50
 8003236:	2b00      	cmp	r3, #0
 8003238:	d128      	bne.n	800328c <xTaskPriorityDisinherit+0xa0>
					/* A task can only have an inherited priority if it holds
					the mutex.  If the mutex is held by a task then it cannot be
					given from an interrupt, and if a mutex is given by the
					holding task then it must be the running state task.  Remove
					the holding task from the ready list. */
					if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
 800323a:	68bb      	ldr	r3, [r7, #8]
 800323c:	3304      	adds	r3, #4
 800323e:	0018      	movs	r0, r3
 8003240:	f7fe fded 	bl	8001e1e <uxListRemove>
					}

					/* Disinherit the priority before adding the task into the
					new	ready list. */
					traceTASK_PRIORITY_DISINHERIT( pxTCB, pxTCB->uxBasePriority );
					pxTCB->uxPriority = pxTCB->uxBasePriority;
 8003244:	68bb      	ldr	r3, [r7, #8]
 8003246:	6cda      	ldr	r2, [r3, #76]	; 0x4c
 8003248:	68bb      	ldr	r3, [r7, #8]
 800324a:	62da      	str	r2, [r3, #44]	; 0x2c

					/* Reset the event list item value.  It cannot be in use for
					any other purpose if this task is running, and it must be
					running to give back the mutex. */
					listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) pxTCB->uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 800324c:	68bb      	ldr	r3, [r7, #8]
 800324e:	6adb      	ldr	r3, [r3, #44]	; 0x2c
 8003250:	2238      	movs	r2, #56	; 0x38
 8003252:	1ad2      	subs	r2, r2, r3
 8003254:	68bb      	ldr	r3, [r7, #8]
 8003256:	619a      	str	r2, [r3, #24]
					prvAddTaskToReadyList( pxTCB );
 8003258:	68bb      	ldr	r3, [r7, #8]
 800325a:	6ada      	ldr	r2, [r3, #44]	; 0x2c
 800325c:	4b0f      	ldr	r3, [pc, #60]	; (800329c <xTaskPriorityDisinherit+0xb0>)
 800325e:	681b      	ldr	r3, [r3, #0]
 8003260:	429a      	cmp	r2, r3
 8003262:	d903      	bls.n	800326c <xTaskPriorityDisinherit+0x80>
 8003264:	68bb      	ldr	r3, [r7, #8]
 8003266:	6ada      	ldr	r2, [r3, #44]	; 0x2c
 8003268:	4b0c      	ldr	r3, [pc, #48]	; (800329c <xTaskPriorityDisinherit+0xb0>)
 800326a:	601a      	str	r2, [r3, #0]
 800326c:	68bb      	ldr	r3, [r7, #8]
 800326e:	6ada      	ldr	r2, [r3, #44]	; 0x2c
 8003270:	0013      	movs	r3, r2
 8003272:	009b      	lsls	r3, r3, #2
 8003274:	189b      	adds	r3, r3, r2
 8003276:	009b      	lsls	r3, r3, #2
 8003278:	4a09      	ldr	r2, [pc, #36]	; (80032a0 <xTaskPriorityDisinherit+0xb4>)
 800327a:	189a      	adds	r2, r3, r2
 800327c:	68bb      	ldr	r3, [r7, #8]
 800327e:	3304      	adds	r3, #4
 8003280:	0019      	movs	r1, r3
 8003282:	0010      	movs	r0, r2
 8003284:	f7fe fd73 	bl	8001d6e <vListInsertEnd>
					in an order different to that in which they were taken.
					If a context switch did not occur when the first mutex was
					returned, even if a task was waiting on it, then a context
					switch should occur when the last mutex is returned whether
					a task is waiting on it or not. */
					xReturn = pdTRUE;
 8003288:	2301      	movs	r3, #1
 800328a:	60fb      	str	r3, [r7, #12]
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}

		return xReturn;
 800328c:	68fb      	ldr	r3, [r7, #12]
	}
 800328e:	0018      	movs	r0, r3
 8003290:	46bd      	mov	sp, r7
 8003292:	b004      	add	sp, #16
 8003294:	bd80      	pop	{r7, pc}
 8003296:	46c0      	nop			; (mov r8, r8)
 8003298:	200006ec 	.word	0x200006ec
 800329c:	20000bc8 	.word	0x20000bc8
 80032a0:	200006f0 	.word	0x200006f0

080032a4 <prvAddCurrentTaskToDelayedList>:
#endif /* configUSE_TASK_NOTIFICATIONS */
/*-----------------------------------------------------------*/


static void prvAddCurrentTaskToDelayedList( TickType_t xTicksToWait, const BaseType_t xCanBlockIndefinitely )
{
 80032a4:	b580      	push	{r7, lr}
 80032a6:	b084      	sub	sp, #16
 80032a8:	af00      	add	r7, sp, #0
 80032aa:	6078      	str	r0, [r7, #4]
 80032ac:	6039      	str	r1, [r7, #0]
TickType_t xTimeToWake;
const TickType_t xConstTickCount = xTickCount;
 80032ae:	4b21      	ldr	r3, [pc, #132]	; (8003334 <prvAddCurrentTaskToDelayedList+0x90>)
 80032b0:	681b      	ldr	r3, [r3, #0]
 80032b2:	60fb      	str	r3, [r7, #12]
	}
	#endif

	/* Remove the task from the ready list before adding it to the blocked list
	as the same list item is used for both lists. */
	if( uxListRemove( &( pxCurrentTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
 80032b4:	4b20      	ldr	r3, [pc, #128]	; (8003338 <prvAddCurrentTaskToDelayedList+0x94>)
 80032b6:	681b      	ldr	r3, [r3, #0]
 80032b8:	3304      	adds	r3, #4
 80032ba:	0018      	movs	r0, r3
 80032bc:	f7fe fdaf 	bl	8001e1e <uxListRemove>
		mtCOVERAGE_TEST_MARKER();
	}

	#if ( INCLUDE_vTaskSuspend == 1 )
	{
		if( ( xTicksToWait == portMAX_DELAY ) && ( xCanBlockIndefinitely != pdFALSE ) )
 80032c0:	687b      	ldr	r3, [r7, #4]
 80032c2:	3301      	adds	r3, #1
 80032c4:	d10b      	bne.n	80032de <prvAddCurrentTaskToDelayedList+0x3a>
 80032c6:	683b      	ldr	r3, [r7, #0]
 80032c8:	2b00      	cmp	r3, #0
 80032ca:	d008      	beq.n	80032de <prvAddCurrentTaskToDelayedList+0x3a>
		{
			/* Add the task to the suspended task list instead of a delayed task
			list to ensure it is not woken by a timing event.  It will block
			indefinitely. */
			vListInsertEnd( &xSuspendedTaskList, &( pxCurrentTCB->xStateListItem ) );
 80032cc:	4b1a      	ldr	r3, [pc, #104]	; (8003338 <prvAddCurrentTaskToDelayedList+0x94>)
 80032ce:	681b      	ldr	r3, [r3, #0]
 80032d0:	1d1a      	adds	r2, r3, #4
 80032d2:	4b1a      	ldr	r3, [pc, #104]	; (800333c <prvAddCurrentTaskToDelayedList+0x98>)
 80032d4:	0011      	movs	r1, r2
 80032d6:	0018      	movs	r0, r3
 80032d8:	f7fe fd49 	bl	8001d6e <vListInsertEnd>

		/* Avoid compiler warning when INCLUDE_vTaskSuspend is not 1. */
		( void ) xCanBlockIndefinitely;
	}
	#endif /* INCLUDE_vTaskSuspend */
}
 80032dc:	e026      	b.n	800332c <prvAddCurrentTaskToDelayedList+0x88>
			xTimeToWake = xConstTickCount + xTicksToWait;
 80032de:	68fa      	ldr	r2, [r7, #12]
 80032e0:	687b      	ldr	r3, [r7, #4]
 80032e2:	18d3      	adds	r3, r2, r3
 80032e4:	60bb      	str	r3, [r7, #8]
			listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xStateListItem ), xTimeToWake );
 80032e6:	4b14      	ldr	r3, [pc, #80]	; (8003338 <prvAddCurrentTaskToDelayedList+0x94>)
 80032e8:	681b      	ldr	r3, [r3, #0]
 80032ea:	68ba      	ldr	r2, [r7, #8]
 80032ec:	605a      	str	r2, [r3, #4]
			if( xTimeToWake < xConstTickCount )
 80032ee:	68ba      	ldr	r2, [r7, #8]
 80032f0:	68fb      	ldr	r3, [r7, #12]
 80032f2:	429a      	cmp	r2, r3
 80032f4:	d209      	bcs.n	800330a <prvAddCurrentTaskToDelayedList+0x66>
				vListInsert( pxOverflowDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
 80032f6:	4b12      	ldr	r3, [pc, #72]	; (8003340 <prvAddCurrentTaskToDelayedList+0x9c>)
 80032f8:	681a      	ldr	r2, [r3, #0]
 80032fa:	4b0f      	ldr	r3, [pc, #60]	; (8003338 <prvAddCurrentTaskToDelayedList+0x94>)
 80032fc:	681b      	ldr	r3, [r3, #0]
 80032fe:	3304      	adds	r3, #4
 8003300:	0019      	movs	r1, r3
 8003302:	0010      	movs	r0, r2
 8003304:	f7fe fd55 	bl	8001db2 <vListInsert>
}
 8003308:	e010      	b.n	800332c <prvAddCurrentTaskToDelayedList+0x88>
				vListInsert( pxDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
 800330a:	4b0e      	ldr	r3, [pc, #56]	; (8003344 <prvAddCurrentTaskToDelayedList+0xa0>)
 800330c:	681a      	ldr	r2, [r3, #0]
 800330e:	4b0a      	ldr	r3, [pc, #40]	; (8003338 <prvAddCurrentTaskToDelayedList+0x94>)
 8003310:	681b      	ldr	r3, [r3, #0]
 8003312:	3304      	adds	r3, #4
 8003314:	0019      	movs	r1, r3
 8003316:	0010      	movs	r0, r2
 8003318:	f7fe fd4b 	bl	8001db2 <vListInsert>
				if( xTimeToWake < xNextTaskUnblockTime )
 800331c:	4b0a      	ldr	r3, [pc, #40]	; (8003348 <prvAddCurrentTaskToDelayedList+0xa4>)
 800331e:	681b      	ldr	r3, [r3, #0]
 8003320:	68ba      	ldr	r2, [r7, #8]
 8003322:	429a      	cmp	r2, r3
 8003324:	d202      	bcs.n	800332c <prvAddCurrentTaskToDelayedList+0x88>
					xNextTaskUnblockTime = xTimeToWake;
 8003326:	4b08      	ldr	r3, [pc, #32]	; (8003348 <prvAddCurrentTaskToDelayedList+0xa4>)
 8003328:	68ba      	ldr	r2, [r7, #8]
 800332a:	601a      	str	r2, [r3, #0]
}
 800332c:	46c0      	nop			; (mov r8, r8)
 800332e:	46bd      	mov	sp, r7
 8003330:	b004      	add	sp, #16
 8003332:	bd80      	pop	{r7, pc}
 8003334:	20000bc4 	.word	0x20000bc4
 8003338:	200006ec 	.word	0x200006ec
 800333c:	20000bac 	.word	0x20000bac
 8003340:	20000b7c 	.word	0x20000b7c
 8003344:	20000b78 	.word	0x20000b78
 8003348:	20000be0 	.word	0x20000be0

0800334c <xTimerCreateTimerTask>:
									TimerCallbackFunction_t pxCallbackFunction,
									Timer_t *pxNewTimer ) PRIVILEGED_FUNCTION;
/*-----------------------------------------------------------*/

BaseType_t xTimerCreateTimerTask( void )
{
 800334c:	b590      	push	{r4, r7, lr}
 800334e:	b089      	sub	sp, #36	; 0x24
 8003350:	af04      	add	r7, sp, #16
BaseType_t xReturn = pdFAIL;
 8003352:	2300      	movs	r3, #0
 8003354:	60fb      	str	r3, [r7, #12]

	/* This function is called when the scheduler is started if
	configUSE_TIMERS is set to 1.  Check that the infrastructure used by the
	timer service task has been created/initialised.  If timers have already
	been created then the initialisation will already have been performed. */
	prvCheckForValidListAndQueue();
 8003356:	f000 fa8b 	bl	8003870 <prvCheckForValidListAndQueue>

	if( xTimerQueue != NULL )
 800335a:	4b17      	ldr	r3, [pc, #92]	; (80033b8 <xTimerCreateTimerTask+0x6c>)
 800335c:	681b      	ldr	r3, [r3, #0]
 800335e:	2b00      	cmp	r3, #0
 8003360:	d020      	beq.n	80033a4 <xTimerCreateTimerTask+0x58>
	{
		#if( configSUPPORT_STATIC_ALLOCATION == 1 )
		{
			StaticTask_t *pxTimerTaskTCBBuffer = NULL;
 8003362:	2300      	movs	r3, #0
 8003364:	60bb      	str	r3, [r7, #8]
			StackType_t *pxTimerTaskStackBuffer = NULL;
 8003366:	2300      	movs	r3, #0
 8003368:	607b      	str	r3, [r7, #4]
			uint32_t ulTimerTaskStackSize;

			vApplicationGetTimerTaskMemory( &pxTimerTaskTCBBuffer, &pxTimerTaskStackBuffer, &ulTimerTaskStackSize );
 800336a:	003a      	movs	r2, r7
 800336c:	1d39      	adds	r1, r7, #4
 800336e:	2308      	movs	r3, #8
 8003370:	18fb      	adds	r3, r7, r3
 8003372:	0018      	movs	r0, r3
 8003374:	f7fe fcba 	bl	8001cec <vApplicationGetTimerTaskMemory>
			xTimerTaskHandle = xTaskCreateStatic(	prvTimerTask,
 8003378:	683c      	ldr	r4, [r7, #0]
 800337a:	687b      	ldr	r3, [r7, #4]
 800337c:	68ba      	ldr	r2, [r7, #8]
 800337e:	490f      	ldr	r1, [pc, #60]	; (80033bc <xTimerCreateTimerTask+0x70>)
 8003380:	480f      	ldr	r0, [pc, #60]	; (80033c0 <xTimerCreateTimerTask+0x74>)
 8003382:	9202      	str	r2, [sp, #8]
 8003384:	9301      	str	r3, [sp, #4]
 8003386:	2302      	movs	r3, #2
 8003388:	9300      	str	r3, [sp, #0]
 800338a:	2300      	movs	r3, #0
 800338c:	0022      	movs	r2, r4
 800338e:	f7ff f996 	bl	80026be <xTaskCreateStatic>
 8003392:	0002      	movs	r2, r0
 8003394:	4b0b      	ldr	r3, [pc, #44]	; (80033c4 <xTimerCreateTimerTask+0x78>)
 8003396:	601a      	str	r2, [r3, #0]
													NULL,
													( ( UBaseType_t ) configTIMER_TASK_PRIORITY ) | portPRIVILEGE_BIT,
													pxTimerTaskStackBuffer,
													pxTimerTaskTCBBuffer );

			if( xTimerTaskHandle != NULL )
 8003398:	4b0a      	ldr	r3, [pc, #40]	; (80033c4 <xTimerCreateTimerTask+0x78>)
 800339a:	681b      	ldr	r3, [r3, #0]
 800339c:	2b00      	cmp	r3, #0
 800339e:	d001      	beq.n	80033a4 <xTimerCreateTimerTask+0x58>
			{
				xReturn = pdPASS;
 80033a0:	2301      	movs	r3, #1
 80033a2:	60fb      	str	r3, [r7, #12]
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	configASSERT( xReturn );
 80033a4:	68fb      	ldr	r3, [r7, #12]
 80033a6:	2b00      	cmp	r3, #0
 80033a8:	d101      	bne.n	80033ae <xTimerCreateTimerTask+0x62>
 80033aa:	b672      	cpsid	i
 80033ac:	e7fe      	b.n	80033ac <xTimerCreateTimerTask+0x60>
	return xReturn;
 80033ae:	68fb      	ldr	r3, [r7, #12]
}
 80033b0:	0018      	movs	r0, r3
 80033b2:	46bd      	mov	sp, r7
 80033b4:	b005      	add	sp, #20
 80033b6:	bd90      	pop	{r4, r7, pc}
 80033b8:	20000c1c 	.word	0x20000c1c
 80033bc:	08003f6c 	.word	0x08003f6c
 80033c0:	080034d1 	.word	0x080034d1
 80033c4:	20000c20 	.word	0x20000c20

080033c8 <xTimerGenericCommand>:
	}
}
/*-----------------------------------------------------------*/

BaseType_t xTimerGenericCommand( TimerHandle_t xTimer, const BaseType_t xCommandID, const TickType_t xOptionalValue, BaseType_t * const pxHigherPriorityTaskWoken, const TickType_t xTicksToWait )
{
 80033c8:	b580      	push	{r7, lr}
 80033ca:	b08a      	sub	sp, #40	; 0x28
 80033cc:	af00      	add	r7, sp, #0
 80033ce:	60f8      	str	r0, [r7, #12]
 80033d0:	60b9      	str	r1, [r7, #8]
 80033d2:	607a      	str	r2, [r7, #4]
 80033d4:	603b      	str	r3, [r7, #0]
BaseType_t xReturn = pdFAIL;
 80033d6:	2300      	movs	r3, #0
 80033d8:	627b      	str	r3, [r7, #36]	; 0x24
DaemonTaskMessage_t xMessage;

	configASSERT( xTimer );
 80033da:	68fb      	ldr	r3, [r7, #12]
 80033dc:	2b00      	cmp	r3, #0
 80033de:	d101      	bne.n	80033e4 <xTimerGenericCommand+0x1c>
 80033e0:	b672      	cpsid	i
 80033e2:	e7fe      	b.n	80033e2 <xTimerGenericCommand+0x1a>

	/* Send a message to the timer service task to perform a particular action
	on a particular timer definition. */
	if( xTimerQueue != NULL )
 80033e4:	4b1d      	ldr	r3, [pc, #116]	; (800345c <xTimerGenericCommand+0x94>)
 80033e6:	681b      	ldr	r3, [r3, #0]
 80033e8:	2b00      	cmp	r3, #0
 80033ea:	d031      	beq.n	8003450 <xTimerGenericCommand+0x88>
	{
		/* Send a command to the timer service task to start the xTimer timer. */
		xMessage.xMessageID = xCommandID;
 80033ec:	2114      	movs	r1, #20
 80033ee:	187b      	adds	r3, r7, r1
 80033f0:	68ba      	ldr	r2, [r7, #8]
 80033f2:	601a      	str	r2, [r3, #0]
		xMessage.u.xTimerParameters.xMessageValue = xOptionalValue;
 80033f4:	187b      	adds	r3, r7, r1
 80033f6:	687a      	ldr	r2, [r7, #4]
 80033f8:	605a      	str	r2, [r3, #4]
		xMessage.u.xTimerParameters.pxTimer = ( Timer_t * ) xTimer;
 80033fa:	187b      	adds	r3, r7, r1
 80033fc:	68fa      	ldr	r2, [r7, #12]
 80033fe:	609a      	str	r2, [r3, #8]

		if( xCommandID < tmrFIRST_FROM_ISR_COMMAND )
 8003400:	68bb      	ldr	r3, [r7, #8]
 8003402:	2b05      	cmp	r3, #5
 8003404:	dc1a      	bgt.n	800343c <xTimerGenericCommand+0x74>
		{
			if( xTaskGetSchedulerState() == taskSCHEDULER_RUNNING )
 8003406:	f7ff fed5 	bl	80031b4 <xTaskGetSchedulerState>
 800340a:	0003      	movs	r3, r0
 800340c:	2b02      	cmp	r3, #2
 800340e:	d10a      	bne.n	8003426 <xTimerGenericCommand+0x5e>
			{
				xReturn = xQueueSendToBack( xTimerQueue, &xMessage, xTicksToWait );
 8003410:	4b12      	ldr	r3, [pc, #72]	; (800345c <xTimerGenericCommand+0x94>)
 8003412:	6818      	ldr	r0, [r3, #0]
 8003414:	6b3a      	ldr	r2, [r7, #48]	; 0x30
 8003416:	2314      	movs	r3, #20
 8003418:	18f9      	adds	r1, r7, r3
 800341a:	2300      	movs	r3, #0
 800341c:	f7fe fded 	bl	8001ffa <xQueueGenericSend>
 8003420:	0003      	movs	r3, r0
 8003422:	627b      	str	r3, [r7, #36]	; 0x24
 8003424:	e014      	b.n	8003450 <xTimerGenericCommand+0x88>
			}
			else
			{
				xReturn = xQueueSendToBack( xTimerQueue, &xMessage, tmrNO_DELAY );
 8003426:	4b0d      	ldr	r3, [pc, #52]	; (800345c <xTimerGenericCommand+0x94>)
 8003428:	6818      	ldr	r0, [r3, #0]
 800342a:	2314      	movs	r3, #20
 800342c:	18f9      	adds	r1, r7, r3
 800342e:	2300      	movs	r3, #0
 8003430:	2200      	movs	r2, #0
 8003432:	f7fe fde2 	bl	8001ffa <xQueueGenericSend>
 8003436:	0003      	movs	r3, r0
 8003438:	627b      	str	r3, [r7, #36]	; 0x24
 800343a:	e009      	b.n	8003450 <xTimerGenericCommand+0x88>
			}
		}
		else
		{
			xReturn = xQueueSendToBackFromISR( xTimerQueue, &xMessage, pxHigherPriorityTaskWoken );
 800343c:	4b07      	ldr	r3, [pc, #28]	; (800345c <xTimerGenericCommand+0x94>)
 800343e:	6818      	ldr	r0, [r3, #0]
 8003440:	683a      	ldr	r2, [r7, #0]
 8003442:	2314      	movs	r3, #20
 8003444:	18f9      	adds	r1, r7, r3
 8003446:	2300      	movs	r3, #0
 8003448:	f7fe fe9b 	bl	8002182 <xQueueGenericSendFromISR>
 800344c:	0003      	movs	r3, r0
 800344e:	627b      	str	r3, [r7, #36]	; 0x24
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	return xReturn;
 8003450:	6a7b      	ldr	r3, [r7, #36]	; 0x24
}
 8003452:	0018      	movs	r0, r3
 8003454:	46bd      	mov	sp, r7
 8003456:	b00a      	add	sp, #40	; 0x28
 8003458:	bd80      	pop	{r7, pc}
 800345a:	46c0      	nop			; (mov r8, r8)
 800345c:	20000c1c 	.word	0x20000c1c

08003460 <prvProcessExpiredTimer>:
	return pxTimer->pcTimerName;
}
/*-----------------------------------------------------------*/

static void prvProcessExpiredTimer( const TickType_t xNextExpireTime, const TickType_t xTimeNow )
{
 8003460:	b580      	push	{r7, lr}
 8003462:	b086      	sub	sp, #24
 8003464:	af02      	add	r7, sp, #8
 8003466:	6078      	str	r0, [r7, #4]
 8003468:	6039      	str	r1, [r7, #0]
BaseType_t xResult;
Timer_t * const pxTimer = ( Timer_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxCurrentTimerList );
 800346a:	4b18      	ldr	r3, [pc, #96]	; (80034cc <prvProcessExpiredTimer+0x6c>)
 800346c:	681b      	ldr	r3, [r3, #0]
 800346e:	68db      	ldr	r3, [r3, #12]
 8003470:	68db      	ldr	r3, [r3, #12]
 8003472:	60fb      	str	r3, [r7, #12]

	/* Remove the timer from the list of active timers.  A check has already
	been performed to ensure the list is not empty. */
	( void ) uxListRemove( &( pxTimer->xTimerListItem ) );
 8003474:	68fb      	ldr	r3, [r7, #12]
 8003476:	3304      	adds	r3, #4
 8003478:	0018      	movs	r0, r3
 800347a:	f7fe fcd0 	bl	8001e1e <uxListRemove>
	traceTIMER_EXPIRED( pxTimer );

	/* If the timer is an auto reload timer then calculate the next
	expiry time and re-insert the timer in the list of active timers. */
	if( pxTimer->uxAutoReload == ( UBaseType_t ) pdTRUE )
 800347e:	68fb      	ldr	r3, [r7, #12]
 8003480:	69db      	ldr	r3, [r3, #28]
 8003482:	2b01      	cmp	r3, #1
 8003484:	d119      	bne.n	80034ba <prvProcessExpiredTimer+0x5a>
	{
		/* The timer is inserted into a list using a time relative to anything
		other than the current time.  It will therefore be inserted into the
		correct list relative to the time this task thinks it is now. */
		if( prvInsertTimerInActiveList( pxTimer, ( xNextExpireTime + pxTimer->xTimerPeriodInTicks ), xTimeNow, xNextExpireTime ) != pdFALSE )
 8003486:	68fb      	ldr	r3, [r7, #12]
 8003488:	699a      	ldr	r2, [r3, #24]
 800348a:	687b      	ldr	r3, [r7, #4]
 800348c:	18d1      	adds	r1, r2, r3
 800348e:	687b      	ldr	r3, [r7, #4]
 8003490:	683a      	ldr	r2, [r7, #0]
 8003492:	68f8      	ldr	r0, [r7, #12]
 8003494:	f000 f8b6 	bl	8003604 <prvInsertTimerInActiveList>
 8003498:	1e03      	subs	r3, r0, #0
 800349a:	d00e      	beq.n	80034ba <prvProcessExpiredTimer+0x5a>
		{
			/* The timer expired before it was added to the active timer
			list.  Reload it now.  */
			xResult = xTimerGenericCommand( pxTimer, tmrCOMMAND_START_DONT_TRACE, xNextExpireTime, NULL, tmrNO_DELAY );
 800349c:	687a      	ldr	r2, [r7, #4]
 800349e:	68f8      	ldr	r0, [r7, #12]
 80034a0:	2300      	movs	r3, #0
 80034a2:	9300      	str	r3, [sp, #0]
 80034a4:	2300      	movs	r3, #0
 80034a6:	2100      	movs	r1, #0
 80034a8:	f7ff ff8e 	bl	80033c8 <xTimerGenericCommand>
 80034ac:	0003      	movs	r3, r0
 80034ae:	60bb      	str	r3, [r7, #8]
			configASSERT( xResult );
 80034b0:	68bb      	ldr	r3, [r7, #8]
 80034b2:	2b00      	cmp	r3, #0
 80034b4:	d101      	bne.n	80034ba <prvProcessExpiredTimer+0x5a>
 80034b6:	b672      	cpsid	i
 80034b8:	e7fe      	b.n	80034b8 <prvProcessExpiredTimer+0x58>
	{
		mtCOVERAGE_TEST_MARKER();
	}

	/* Call the timer callback. */
	pxTimer->pxCallbackFunction( ( TimerHandle_t ) pxTimer );
 80034ba:	68fb      	ldr	r3, [r7, #12]
 80034bc:	6a5b      	ldr	r3, [r3, #36]	; 0x24
 80034be:	68fa      	ldr	r2, [r7, #12]
 80034c0:	0010      	movs	r0, r2
 80034c2:	4798      	blx	r3
}
 80034c4:	46c0      	nop			; (mov r8, r8)
 80034c6:	46bd      	mov	sp, r7
 80034c8:	b004      	add	sp, #16
 80034ca:	bd80      	pop	{r7, pc}
 80034cc:	20000c14 	.word	0x20000c14

080034d0 <prvTimerTask>:
/*-----------------------------------------------------------*/

static void prvTimerTask( void *pvParameters )
{
 80034d0:	b580      	push	{r7, lr}
 80034d2:	b084      	sub	sp, #16
 80034d4:	af00      	add	r7, sp, #0
 80034d6:	6078      	str	r0, [r7, #4]

	for( ;; )
	{
		/* Query the timers list to see if it contains any timers, and if so,
		obtain the time at which the next timer will expire. */
		xNextExpireTime = prvGetNextExpireTime( &xListWasEmpty );
 80034d8:	2308      	movs	r3, #8
 80034da:	18fb      	adds	r3, r7, r3
 80034dc:	0018      	movs	r0, r3
 80034de:	f000 f851 	bl	8003584 <prvGetNextExpireTime>
 80034e2:	0003      	movs	r3, r0
 80034e4:	60fb      	str	r3, [r7, #12]

		/* If a timer has expired, process it.  Otherwise, block this task
		until either a timer does expire, or a command is received. */
		prvProcessTimerOrBlockTask( xNextExpireTime, xListWasEmpty );
 80034e6:	68ba      	ldr	r2, [r7, #8]
 80034e8:	68fb      	ldr	r3, [r7, #12]
 80034ea:	0011      	movs	r1, r2
 80034ec:	0018      	movs	r0, r3
 80034ee:	f000 f803 	bl	80034f8 <prvProcessTimerOrBlockTask>

		/* Empty the command queue. */
		prvProcessReceivedCommands();
 80034f2:	f000 f8c9 	bl	8003688 <prvProcessReceivedCommands>
		xNextExpireTime = prvGetNextExpireTime( &xListWasEmpty );
 80034f6:	e7ef      	b.n	80034d8 <prvTimerTask+0x8>

080034f8 <prvProcessTimerOrBlockTask>:
	}
}
/*-----------------------------------------------------------*/

static void prvProcessTimerOrBlockTask( const TickType_t xNextExpireTime, BaseType_t xListWasEmpty )
{
 80034f8:	b580      	push	{r7, lr}
 80034fa:	b084      	sub	sp, #16
 80034fc:	af00      	add	r7, sp, #0
 80034fe:	6078      	str	r0, [r7, #4]
 8003500:	6039      	str	r1, [r7, #0]
TickType_t xTimeNow;
BaseType_t xTimerListsWereSwitched;

	vTaskSuspendAll();
 8003502:	f7ff facf 	bl	8002aa4 <vTaskSuspendAll>
		/* Obtain the time now to make an assessment as to whether the timer
		has expired or not.  If obtaining the time causes the lists to switch
		then don't process this timer as any timers that remained in the list
		when the lists were switched will have been processed within the
		prvSampleTimeNow() function. */
		xTimeNow = prvSampleTimeNow( &xTimerListsWereSwitched );
 8003506:	2308      	movs	r3, #8
 8003508:	18fb      	adds	r3, r7, r3
 800350a:	0018      	movs	r0, r3
 800350c:	f000 f85a 	bl	80035c4 <prvSampleTimeNow>
 8003510:	0003      	movs	r3, r0
 8003512:	60fb      	str	r3, [r7, #12]
		if( xTimerListsWereSwitched == pdFALSE )
 8003514:	68bb      	ldr	r3, [r7, #8]
 8003516:	2b00      	cmp	r3, #0
 8003518:	d129      	bne.n	800356e <prvProcessTimerOrBlockTask+0x76>
		{
			/* The tick count has not overflowed, has the timer expired? */
			if( ( xListWasEmpty == pdFALSE ) && ( xNextExpireTime <= xTimeNow ) )
 800351a:	683b      	ldr	r3, [r7, #0]
 800351c:	2b00      	cmp	r3, #0
 800351e:	d10c      	bne.n	800353a <prvProcessTimerOrBlockTask+0x42>
 8003520:	687a      	ldr	r2, [r7, #4]
 8003522:	68fb      	ldr	r3, [r7, #12]
 8003524:	429a      	cmp	r2, r3
 8003526:	d808      	bhi.n	800353a <prvProcessTimerOrBlockTask+0x42>
			{
				( void ) xTaskResumeAll();
 8003528:	f7ff fac8 	bl	8002abc <xTaskResumeAll>
				prvProcessExpiredTimer( xNextExpireTime, xTimeNow );
 800352c:	68fa      	ldr	r2, [r7, #12]
 800352e:	687b      	ldr	r3, [r7, #4]
 8003530:	0011      	movs	r1, r2
 8003532:	0018      	movs	r0, r3
 8003534:	f7ff ff94 	bl	8003460 <prvProcessExpiredTimer>
		else
		{
			( void ) xTaskResumeAll();
		}
	}
}
 8003538:	e01b      	b.n	8003572 <prvProcessTimerOrBlockTask+0x7a>
				if( xListWasEmpty != pdFALSE )
 800353a:	683b      	ldr	r3, [r7, #0]
 800353c:	2b00      	cmp	r3, #0
 800353e:	d006      	beq.n	800354e <prvProcessTimerOrBlockTask+0x56>
					xListWasEmpty = listLIST_IS_EMPTY( pxOverflowTimerList );
 8003540:	4b0e      	ldr	r3, [pc, #56]	; (800357c <prvProcessTimerOrBlockTask+0x84>)
 8003542:	681b      	ldr	r3, [r3, #0]
 8003544:	681b      	ldr	r3, [r3, #0]
 8003546:	425a      	negs	r2, r3
 8003548:	4153      	adcs	r3, r2
 800354a:	b2db      	uxtb	r3, r3
 800354c:	603b      	str	r3, [r7, #0]
				vQueueWaitForMessageRestricted( xTimerQueue, ( xNextExpireTime - xTimeNow ), xListWasEmpty );
 800354e:	4b0c      	ldr	r3, [pc, #48]	; (8003580 <prvProcessTimerOrBlockTask+0x88>)
 8003550:	6818      	ldr	r0, [r3, #0]
 8003552:	687a      	ldr	r2, [r7, #4]
 8003554:	68fb      	ldr	r3, [r7, #12]
 8003556:	1ad3      	subs	r3, r2, r3
 8003558:	683a      	ldr	r2, [r7, #0]
 800355a:	0019      	movs	r1, r3
 800355c:	f7ff f87c 	bl	8002658 <vQueueWaitForMessageRestricted>
				if( xTaskResumeAll() == pdFALSE )
 8003560:	f7ff faac 	bl	8002abc <xTaskResumeAll>
 8003564:	1e03      	subs	r3, r0, #0
 8003566:	d104      	bne.n	8003572 <prvProcessTimerOrBlockTask+0x7a>
					portYIELD_WITHIN_API();
 8003568:	f000 fa52 	bl	8003a10 <vPortYield>
}
 800356c:	e001      	b.n	8003572 <prvProcessTimerOrBlockTask+0x7a>
			( void ) xTaskResumeAll();
 800356e:	f7ff faa5 	bl	8002abc <xTaskResumeAll>
}
 8003572:	46c0      	nop			; (mov r8, r8)
 8003574:	46bd      	mov	sp, r7
 8003576:	b004      	add	sp, #16
 8003578:	bd80      	pop	{r7, pc}
 800357a:	46c0      	nop			; (mov r8, r8)
 800357c:	20000c18 	.word	0x20000c18
 8003580:	20000c1c 	.word	0x20000c1c

08003584 <prvGetNextExpireTime>:
/*-----------------------------------------------------------*/

static TickType_t prvGetNextExpireTime( BaseType_t * const pxListWasEmpty )
{
 8003584:	b580      	push	{r7, lr}
 8003586:	b084      	sub	sp, #16
 8003588:	af00      	add	r7, sp, #0
 800358a:	6078      	str	r0, [r7, #4]
	the timer with the nearest expiry time will expire.  If there are no
	active timers then just set the next expire time to 0.  That will cause
	this task to unblock when the tick count overflows, at which point the
	timer lists will be switched and the next expiry time can be
	re-assessed.  */
	*pxListWasEmpty = listLIST_IS_EMPTY( pxCurrentTimerList );
 800358c:	4b0c      	ldr	r3, [pc, #48]	; (80035c0 <prvGetNextExpireTime+0x3c>)
 800358e:	681b      	ldr	r3, [r3, #0]
 8003590:	681b      	ldr	r3, [r3, #0]
 8003592:	425a      	negs	r2, r3
 8003594:	4153      	adcs	r3, r2
 8003596:	b2db      	uxtb	r3, r3
 8003598:	001a      	movs	r2, r3
 800359a:	687b      	ldr	r3, [r7, #4]
 800359c:	601a      	str	r2, [r3, #0]
	if( *pxListWasEmpty == pdFALSE )
 800359e:	687b      	ldr	r3, [r7, #4]
 80035a0:	681b      	ldr	r3, [r3, #0]
 80035a2:	2b00      	cmp	r3, #0
 80035a4:	d105      	bne.n	80035b2 <prvGetNextExpireTime+0x2e>
	{
		xNextExpireTime = listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxCurrentTimerList );
 80035a6:	4b06      	ldr	r3, [pc, #24]	; (80035c0 <prvGetNextExpireTime+0x3c>)
 80035a8:	681b      	ldr	r3, [r3, #0]
 80035aa:	68db      	ldr	r3, [r3, #12]
 80035ac:	681b      	ldr	r3, [r3, #0]
 80035ae:	60fb      	str	r3, [r7, #12]
 80035b0:	e001      	b.n	80035b6 <prvGetNextExpireTime+0x32>
	}
	else
	{
		/* Ensure the task unblocks when the tick count rolls over. */
		xNextExpireTime = ( TickType_t ) 0U;
 80035b2:	2300      	movs	r3, #0
 80035b4:	60fb      	str	r3, [r7, #12]
	}

	return xNextExpireTime;
 80035b6:	68fb      	ldr	r3, [r7, #12]
}
 80035b8:	0018      	movs	r0, r3
 80035ba:	46bd      	mov	sp, r7
 80035bc:	b004      	add	sp, #16
 80035be:	bd80      	pop	{r7, pc}
 80035c0:	20000c14 	.word	0x20000c14

080035c4 <prvSampleTimeNow>:
/*-----------------------------------------------------------*/

static TickType_t prvSampleTimeNow( BaseType_t * const pxTimerListsWereSwitched )
{
 80035c4:	b580      	push	{r7, lr}
 80035c6:	b084      	sub	sp, #16
 80035c8:	af00      	add	r7, sp, #0
 80035ca:	6078      	str	r0, [r7, #4]
TickType_t xTimeNow;
PRIVILEGED_DATA static TickType_t xLastTime = ( TickType_t ) 0U; /*lint !e956 Variable is only accessible to one task. */

	xTimeNow = xTaskGetTickCount();
 80035cc:	f7ff fb02 	bl	8002bd4 <xTaskGetTickCount>
 80035d0:	0003      	movs	r3, r0
 80035d2:	60fb      	str	r3, [r7, #12]

	if( xTimeNow < xLastTime )
 80035d4:	4b0a      	ldr	r3, [pc, #40]	; (8003600 <prvSampleTimeNow+0x3c>)
 80035d6:	681b      	ldr	r3, [r3, #0]
 80035d8:	68fa      	ldr	r2, [r7, #12]
 80035da:	429a      	cmp	r2, r3
 80035dc:	d205      	bcs.n	80035ea <prvSampleTimeNow+0x26>
	{
		prvSwitchTimerLists();
 80035de:	f000 f8ed 	bl	80037bc <prvSwitchTimerLists>
		*pxTimerListsWereSwitched = pdTRUE;
 80035e2:	687b      	ldr	r3, [r7, #4]
 80035e4:	2201      	movs	r2, #1
 80035e6:	601a      	str	r2, [r3, #0]
 80035e8:	e002      	b.n	80035f0 <prvSampleTimeNow+0x2c>
	}
	else
	{
		*pxTimerListsWereSwitched = pdFALSE;
 80035ea:	687b      	ldr	r3, [r7, #4]
 80035ec:	2200      	movs	r2, #0
 80035ee:	601a      	str	r2, [r3, #0]
	}

	xLastTime = xTimeNow;
 80035f0:	4b03      	ldr	r3, [pc, #12]	; (8003600 <prvSampleTimeNow+0x3c>)
 80035f2:	68fa      	ldr	r2, [r7, #12]
 80035f4:	601a      	str	r2, [r3, #0]

	return xTimeNow;
 80035f6:	68fb      	ldr	r3, [r7, #12]
}
 80035f8:	0018      	movs	r0, r3
 80035fa:	46bd      	mov	sp, r7
 80035fc:	b004      	add	sp, #16
 80035fe:	bd80      	pop	{r7, pc}
 8003600:	20000c24 	.word	0x20000c24

08003604 <prvInsertTimerInActiveList>:
/*-----------------------------------------------------------*/

static BaseType_t prvInsertTimerInActiveList( Timer_t * const pxTimer, const TickType_t xNextExpiryTime, const TickType_t xTimeNow, const TickType_t xCommandTime )
{
 8003604:	b580      	push	{r7, lr}
 8003606:	b086      	sub	sp, #24
 8003608:	af00      	add	r7, sp, #0
 800360a:	60f8      	str	r0, [r7, #12]
 800360c:	60b9      	str	r1, [r7, #8]
 800360e:	607a      	str	r2, [r7, #4]
 8003610:	603b      	str	r3, [r7, #0]
BaseType_t xProcessTimerNow = pdFALSE;
 8003612:	2300      	movs	r3, #0
 8003614:	617b      	str	r3, [r7, #20]

	listSET_LIST_ITEM_VALUE( &( pxTimer->xTimerListItem ), xNextExpiryTime );
 8003616:	68fb      	ldr	r3, [r7, #12]
 8003618:	68ba      	ldr	r2, [r7, #8]
 800361a:	605a      	str	r2, [r3, #4]
	listSET_LIST_ITEM_OWNER( &( pxTimer->xTimerListItem ), pxTimer );
 800361c:	68fb      	ldr	r3, [r7, #12]
 800361e:	68fa      	ldr	r2, [r7, #12]
 8003620:	611a      	str	r2, [r3, #16]

	if( xNextExpiryTime <= xTimeNow )
 8003622:	68ba      	ldr	r2, [r7, #8]
 8003624:	687b      	ldr	r3, [r7, #4]
 8003626:	429a      	cmp	r2, r3
 8003628:	d812      	bhi.n	8003650 <prvInsertTimerInActiveList+0x4c>
	{
		/* Has the expiry time elapsed between the command to start/reset a
		timer was issued, and the time the command was processed? */
		if( ( ( TickType_t ) ( xTimeNow - xCommandTime ) ) >= pxTimer->xTimerPeriodInTicks ) /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 800362a:	687a      	ldr	r2, [r7, #4]
 800362c:	683b      	ldr	r3, [r7, #0]
 800362e:	1ad2      	subs	r2, r2, r3
 8003630:	68fb      	ldr	r3, [r7, #12]
 8003632:	699b      	ldr	r3, [r3, #24]
 8003634:	429a      	cmp	r2, r3
 8003636:	d302      	bcc.n	800363e <prvInsertTimerInActiveList+0x3a>
		{
			/* The time between a command being issued and the command being
			processed actually exceeds the timers period.  */
			xProcessTimerNow = pdTRUE;
 8003638:	2301      	movs	r3, #1
 800363a:	617b      	str	r3, [r7, #20]
 800363c:	e01b      	b.n	8003676 <prvInsertTimerInActiveList+0x72>
		}
		else
		{
			vListInsert( pxOverflowTimerList, &( pxTimer->xTimerListItem ) );
 800363e:	4b10      	ldr	r3, [pc, #64]	; (8003680 <prvInsertTimerInActiveList+0x7c>)
 8003640:	681a      	ldr	r2, [r3, #0]
 8003642:	68fb      	ldr	r3, [r7, #12]
 8003644:	3304      	adds	r3, #4
 8003646:	0019      	movs	r1, r3
 8003648:	0010      	movs	r0, r2
 800364a:	f7fe fbb2 	bl	8001db2 <vListInsert>
 800364e:	e012      	b.n	8003676 <prvInsertTimerInActiveList+0x72>
		}
	}
	else
	{
		if( ( xTimeNow < xCommandTime ) && ( xNextExpiryTime >= xCommandTime ) )
 8003650:	687a      	ldr	r2, [r7, #4]
 8003652:	683b      	ldr	r3, [r7, #0]
 8003654:	429a      	cmp	r2, r3
 8003656:	d206      	bcs.n	8003666 <prvInsertTimerInActiveList+0x62>
 8003658:	68ba      	ldr	r2, [r7, #8]
 800365a:	683b      	ldr	r3, [r7, #0]
 800365c:	429a      	cmp	r2, r3
 800365e:	d302      	bcc.n	8003666 <prvInsertTimerInActiveList+0x62>
		{
			/* If, since the command was issued, the tick count has overflowed
			but the expiry time has not, then the timer must have already passed
			its expiry time and should be processed immediately. */
			xProcessTimerNow = pdTRUE;
 8003660:	2301      	movs	r3, #1
 8003662:	617b      	str	r3, [r7, #20]
 8003664:	e007      	b.n	8003676 <prvInsertTimerInActiveList+0x72>
		}
		else
		{
			vListInsert( pxCurrentTimerList, &( pxTimer->xTimerListItem ) );
 8003666:	4b07      	ldr	r3, [pc, #28]	; (8003684 <prvInsertTimerInActiveList+0x80>)
 8003668:	681a      	ldr	r2, [r3, #0]
 800366a:	68fb      	ldr	r3, [r7, #12]
 800366c:	3304      	adds	r3, #4
 800366e:	0019      	movs	r1, r3
 8003670:	0010      	movs	r0, r2
 8003672:	f7fe fb9e 	bl	8001db2 <vListInsert>
		}
	}

	return xProcessTimerNow;
 8003676:	697b      	ldr	r3, [r7, #20]
}
 8003678:	0018      	movs	r0, r3
 800367a:	46bd      	mov	sp, r7
 800367c:	b006      	add	sp, #24
 800367e:	bd80      	pop	{r7, pc}
 8003680:	20000c18 	.word	0x20000c18
 8003684:	20000c14 	.word	0x20000c14

08003688 <prvProcessReceivedCommands>:
/*-----------------------------------------------------------*/

static void	prvProcessReceivedCommands( void )
{
 8003688:	b580      	push	{r7, lr}
 800368a:	b08c      	sub	sp, #48	; 0x30
 800368c:	af02      	add	r7, sp, #8
DaemonTaskMessage_t xMessage;
Timer_t *pxTimer;
BaseType_t xTimerListsWereSwitched, xResult;
TickType_t xTimeNow;

	while( xQueueReceive( xTimerQueue, &xMessage, tmrNO_DELAY ) != pdFAIL ) /*lint !e603 xMessage does not have to be initialised as it is passed out, not in, and it is not used unless xQueueReceive() returns pdTRUE. */
 800368e:	e082      	b.n	8003796 <prvProcessReceivedCommands+0x10e>
	{
		#if ( INCLUDE_xTimerPendFunctionCall == 1 )
		{
			/* Negative commands are pended function calls rather than timer
			commands. */
			if( xMessage.xMessageID < ( BaseType_t ) 0 )
 8003690:	2308      	movs	r3, #8
 8003692:	18fb      	adds	r3, r7, r3
 8003694:	681b      	ldr	r3, [r3, #0]
 8003696:	2b00      	cmp	r3, #0
 8003698:	da10      	bge.n	80036bc <prvProcessReceivedCommands+0x34>
			{
				const CallbackParameters_t * const pxCallback = &( xMessage.u.xCallbackParameters );
 800369a:	2308      	movs	r3, #8
 800369c:	18fb      	adds	r3, r7, r3
 800369e:	3304      	adds	r3, #4
 80036a0:	627b      	str	r3, [r7, #36]	; 0x24

				/* The timer uses the xCallbackParameters member to request a
				callback be executed.  Check the callback is not NULL. */
				configASSERT( pxCallback );
 80036a2:	6a7b      	ldr	r3, [r7, #36]	; 0x24
 80036a4:	2b00      	cmp	r3, #0
 80036a6:	d101      	bne.n	80036ac <prvProcessReceivedCommands+0x24>
 80036a8:	b672      	cpsid	i
 80036aa:	e7fe      	b.n	80036aa <prvProcessReceivedCommands+0x22>

				/* Call the function. */
				pxCallback->pxCallbackFunction( pxCallback->pvParameter1, pxCallback->ulParameter2 );
 80036ac:	6a7b      	ldr	r3, [r7, #36]	; 0x24
 80036ae:	681a      	ldr	r2, [r3, #0]
 80036b0:	6a7b      	ldr	r3, [r7, #36]	; 0x24
 80036b2:	6858      	ldr	r0, [r3, #4]
 80036b4:	6a7b      	ldr	r3, [r7, #36]	; 0x24
 80036b6:	689b      	ldr	r3, [r3, #8]
 80036b8:	0019      	movs	r1, r3
 80036ba:	4790      	blx	r2
		}
		#endif /* INCLUDE_xTimerPendFunctionCall */

		/* Commands that are positive are timer commands rather than pended
		function calls. */
		if( xMessage.xMessageID >= ( BaseType_t ) 0 )
 80036bc:	2308      	movs	r3, #8
 80036be:	18fb      	adds	r3, r7, r3
 80036c0:	681b      	ldr	r3, [r3, #0]
 80036c2:	2b00      	cmp	r3, #0
 80036c4:	db66      	blt.n	8003794 <prvProcessReceivedCommands+0x10c>
		{
			/* The messages uses the xTimerParameters member to work on a
			software timer. */
			pxTimer = xMessage.u.xTimerParameters.pxTimer;
 80036c6:	2308      	movs	r3, #8
 80036c8:	18fb      	adds	r3, r7, r3
 80036ca:	689b      	ldr	r3, [r3, #8]
 80036cc:	623b      	str	r3, [r7, #32]

			if( listIS_CONTAINED_WITHIN( NULL, &( pxTimer->xTimerListItem ) ) == pdFALSE ) /*lint !e961. The cast is only redundant when NULL is passed into the macro. */
 80036ce:	6a3b      	ldr	r3, [r7, #32]
 80036d0:	695b      	ldr	r3, [r3, #20]
 80036d2:	2b00      	cmp	r3, #0
 80036d4:	d004      	beq.n	80036e0 <prvProcessReceivedCommands+0x58>
			{
				/* The timer is in a list, remove it. */
				( void ) uxListRemove( &( pxTimer->xTimerListItem ) );
 80036d6:	6a3b      	ldr	r3, [r7, #32]
 80036d8:	3304      	adds	r3, #4
 80036da:	0018      	movs	r0, r3
 80036dc:	f7fe fb9f 	bl	8001e1e <uxListRemove>
			it must be present in the function call.  prvSampleTimeNow() must be
			called after the message is received from xTimerQueue so there is no
			possibility of a higher priority task adding a message to the message
			queue with a time that is ahead of the timer daemon task (because it
			pre-empted the timer daemon task after the xTimeNow value was set). */
			xTimeNow = prvSampleTimeNow( &xTimerListsWereSwitched );
 80036e0:	1d3b      	adds	r3, r7, #4
 80036e2:	0018      	movs	r0, r3
 80036e4:	f7ff ff6e 	bl	80035c4 <prvSampleTimeNow>
 80036e8:	0003      	movs	r3, r0
 80036ea:	61fb      	str	r3, [r7, #28]

			switch( xMessage.xMessageID )
 80036ec:	2308      	movs	r3, #8
 80036ee:	18fb      	adds	r3, r7, r3
 80036f0:	681b      	ldr	r3, [r3, #0]
 80036f2:	2b09      	cmp	r3, #9
 80036f4:	d84f      	bhi.n	8003796 <prvProcessReceivedCommands+0x10e>
 80036f6:	009a      	lsls	r2, r3, #2
 80036f8:	4b2e      	ldr	r3, [pc, #184]	; (80037b4 <prvProcessReceivedCommands+0x12c>)
 80036fa:	18d3      	adds	r3, r2, r3
 80036fc:	681b      	ldr	r3, [r3, #0]
 80036fe:	469f      	mov	pc, r3
			    case tmrCOMMAND_START_FROM_ISR :
			    case tmrCOMMAND_RESET :
			    case tmrCOMMAND_RESET_FROM_ISR :
				case tmrCOMMAND_START_DONT_TRACE :
					/* Start or restart a timer. */
					if( prvInsertTimerInActiveList( pxTimer,  xMessage.u.xTimerParameters.xMessageValue + pxTimer->xTimerPeriodInTicks, xTimeNow, xMessage.u.xTimerParameters.xMessageValue ) != pdFALSE )
 8003700:	2008      	movs	r0, #8
 8003702:	183b      	adds	r3, r7, r0
 8003704:	685a      	ldr	r2, [r3, #4]
 8003706:	6a3b      	ldr	r3, [r7, #32]
 8003708:	699b      	ldr	r3, [r3, #24]
 800370a:	18d1      	adds	r1, r2, r3
 800370c:	183b      	adds	r3, r7, r0
 800370e:	685b      	ldr	r3, [r3, #4]
 8003710:	69fa      	ldr	r2, [r7, #28]
 8003712:	6a38      	ldr	r0, [r7, #32]
 8003714:	f7ff ff76 	bl	8003604 <prvInsertTimerInActiveList>
 8003718:	1e03      	subs	r3, r0, #0
 800371a:	d03c      	beq.n	8003796 <prvProcessReceivedCommands+0x10e>
					{
						/* The timer expired before it was added to the active
						timer list.  Process it now. */
						pxTimer->pxCallbackFunction( ( TimerHandle_t ) pxTimer );
 800371c:	6a3b      	ldr	r3, [r7, #32]
 800371e:	6a5b      	ldr	r3, [r3, #36]	; 0x24
 8003720:	6a3a      	ldr	r2, [r7, #32]
 8003722:	0010      	movs	r0, r2
 8003724:	4798      	blx	r3
						traceTIMER_EXPIRED( pxTimer );

						if( pxTimer->uxAutoReload == ( UBaseType_t ) pdTRUE )
 8003726:	6a3b      	ldr	r3, [r7, #32]
 8003728:	69db      	ldr	r3, [r3, #28]
 800372a:	2b01      	cmp	r3, #1
 800372c:	d133      	bne.n	8003796 <prvProcessReceivedCommands+0x10e>
						{
							xResult = xTimerGenericCommand( pxTimer, tmrCOMMAND_START_DONT_TRACE, xMessage.u.xTimerParameters.xMessageValue + pxTimer->xTimerPeriodInTicks, NULL, tmrNO_DELAY );
 800372e:	2308      	movs	r3, #8
 8003730:	18fb      	adds	r3, r7, r3
 8003732:	685a      	ldr	r2, [r3, #4]
 8003734:	6a3b      	ldr	r3, [r7, #32]
 8003736:	699b      	ldr	r3, [r3, #24]
 8003738:	18d2      	adds	r2, r2, r3
 800373a:	6a38      	ldr	r0, [r7, #32]
 800373c:	2300      	movs	r3, #0
 800373e:	9300      	str	r3, [sp, #0]
 8003740:	2300      	movs	r3, #0
 8003742:	2100      	movs	r1, #0
 8003744:	f7ff fe40 	bl	80033c8 <xTimerGenericCommand>
 8003748:	0003      	movs	r3, r0
 800374a:	61bb      	str	r3, [r7, #24]
							configASSERT( xResult );
 800374c:	69bb      	ldr	r3, [r7, #24]
 800374e:	2b00      	cmp	r3, #0
 8003750:	d121      	bne.n	8003796 <prvProcessReceivedCommands+0x10e>
 8003752:	b672      	cpsid	i
 8003754:	e7fe      	b.n	8003754 <prvProcessReceivedCommands+0xcc>
					There is nothing to do here. */
					break;

				case tmrCOMMAND_CHANGE_PERIOD :
				case tmrCOMMAND_CHANGE_PERIOD_FROM_ISR :
					pxTimer->xTimerPeriodInTicks = xMessage.u.xTimerParameters.xMessageValue;
 8003756:	2308      	movs	r3, #8
 8003758:	18fb      	adds	r3, r7, r3
 800375a:	685a      	ldr	r2, [r3, #4]
 800375c:	6a3b      	ldr	r3, [r7, #32]
 800375e:	619a      	str	r2, [r3, #24]
					configASSERT( ( pxTimer->xTimerPeriodInTicks > 0 ) );
 8003760:	6a3b      	ldr	r3, [r7, #32]
 8003762:	699b      	ldr	r3, [r3, #24]
 8003764:	2b00      	cmp	r3, #0
 8003766:	d101      	bne.n	800376c <prvProcessReceivedCommands+0xe4>
 8003768:	b672      	cpsid	i
 800376a:	e7fe      	b.n	800376a <prvProcessReceivedCommands+0xe2>
					be longer or shorter than the old one.  The command time is
					therefore set to the current time, and as the period cannot
					be zero the next expiry time can only be in the future,
					meaning (unlike for the xTimerStart() case above) there is
					no fail case that needs to be handled here. */
					( void ) prvInsertTimerInActiveList( pxTimer, ( xTimeNow + pxTimer->xTimerPeriodInTicks ), xTimeNow, xTimeNow );
 800376c:	6a3b      	ldr	r3, [r7, #32]
 800376e:	699a      	ldr	r2, [r3, #24]
 8003770:	69fb      	ldr	r3, [r7, #28]
 8003772:	18d1      	adds	r1, r2, r3
 8003774:	69fb      	ldr	r3, [r7, #28]
 8003776:	69fa      	ldr	r2, [r7, #28]
 8003778:	6a38      	ldr	r0, [r7, #32]
 800377a:	f7ff ff43 	bl	8003604 <prvInsertTimerInActiveList>
					break;
 800377e:	e00a      	b.n	8003796 <prvProcessReceivedCommands+0x10e>
					#elif( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
					{
						/* The timer could have been allocated statically or
						dynamically, so check before attempting to free the
						memory. */
						if( pxTimer->ucStaticallyAllocated == ( uint8_t ) pdFALSE )
 8003780:	6a3b      	ldr	r3, [r7, #32]
 8003782:	222c      	movs	r2, #44	; 0x2c
 8003784:	5c9b      	ldrb	r3, [r3, r2]
 8003786:	2b00      	cmp	r3, #0
 8003788:	d105      	bne.n	8003796 <prvProcessReceivedCommands+0x10e>
						{
							vPortFree( pxTimer );
 800378a:	6a3b      	ldr	r3, [r7, #32]
 800378c:	0018      	movs	r0, r3
 800378e:	f000 fa8d 	bl	8003cac <vPortFree>
						{
							mtCOVERAGE_TEST_MARKER();
						}
					}
					#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
					break;
 8003792:	e000      	b.n	8003796 <prvProcessReceivedCommands+0x10e>

				default	:
					/* Don't expect to get here. */
					break;
			}
		}
 8003794:	46c0      	nop			; (mov r8, r8)
	while( xQueueReceive( xTimerQueue, &xMessage, tmrNO_DELAY ) != pdFAIL ) /*lint !e603 xMessage does not have to be initialised as it is passed out, not in, and it is not used unless xQueueReceive() returns pdTRUE. */
 8003796:	4b08      	ldr	r3, [pc, #32]	; (80037b8 <prvProcessReceivedCommands+0x130>)
 8003798:	681b      	ldr	r3, [r3, #0]
 800379a:	2208      	movs	r2, #8
 800379c:	18b9      	adds	r1, r7, r2
 800379e:	2200      	movs	r2, #0
 80037a0:	0018      	movs	r0, r3
 80037a2:	f7fe fd5f 	bl	8002264 <xQueueReceive>
 80037a6:	1e03      	subs	r3, r0, #0
 80037a8:	d000      	beq.n	80037ac <prvProcessReceivedCommands+0x124>
 80037aa:	e771      	b.n	8003690 <prvProcessReceivedCommands+0x8>
	}
}
 80037ac:	46c0      	nop			; (mov r8, r8)
 80037ae:	46bd      	mov	sp, r7
 80037b0:	b00a      	add	sp, #40	; 0x28
 80037b2:	bd80      	pop	{r7, pc}
 80037b4:	08003f94 	.word	0x08003f94
 80037b8:	20000c1c 	.word	0x20000c1c

080037bc <prvSwitchTimerLists>:
/*-----------------------------------------------------------*/

static void prvSwitchTimerLists( void )
{
 80037bc:	b580      	push	{r7, lr}
 80037be:	b088      	sub	sp, #32
 80037c0:	af02      	add	r7, sp, #8

	/* The tick count has overflowed.  The timer lists must be switched.
	If there are any timers still referenced from the current timer list
	then they must have expired and should be processed before the lists
	are switched. */
	while( listLIST_IS_EMPTY( pxCurrentTimerList ) == pdFALSE )
 80037c2:	e03e      	b.n	8003842 <prvSwitchTimerLists+0x86>
	{
		xNextExpireTime = listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxCurrentTimerList );
 80037c4:	4b28      	ldr	r3, [pc, #160]	; (8003868 <prvSwitchTimerLists+0xac>)
 80037c6:	681b      	ldr	r3, [r3, #0]
 80037c8:	68db      	ldr	r3, [r3, #12]
 80037ca:	681b      	ldr	r3, [r3, #0]
 80037cc:	613b      	str	r3, [r7, #16]

		/* Remove the timer from the list. */
		pxTimer = ( Timer_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxCurrentTimerList );
 80037ce:	4b26      	ldr	r3, [pc, #152]	; (8003868 <prvSwitchTimerLists+0xac>)
 80037d0:	681b      	ldr	r3, [r3, #0]
 80037d2:	68db      	ldr	r3, [r3, #12]
 80037d4:	68db      	ldr	r3, [r3, #12]
 80037d6:	60fb      	str	r3, [r7, #12]
		( void ) uxListRemove( &( pxTimer->xTimerListItem ) );
 80037d8:	68fb      	ldr	r3, [r7, #12]
 80037da:	3304      	adds	r3, #4
 80037dc:	0018      	movs	r0, r3
 80037de:	f7fe fb1e 	bl	8001e1e <uxListRemove>
		traceTIMER_EXPIRED( pxTimer );

		/* Execute its callback, then send a command to restart the timer if
		it is an auto-reload timer.  It cannot be restarted here as the lists
		have not yet been switched. */
		pxTimer->pxCallbackFunction( ( TimerHandle_t ) pxTimer );
 80037e2:	68fb      	ldr	r3, [r7, #12]
 80037e4:	6a5b      	ldr	r3, [r3, #36]	; 0x24
 80037e6:	68fa      	ldr	r2, [r7, #12]
 80037e8:	0010      	movs	r0, r2
 80037ea:	4798      	blx	r3

		if( pxTimer->uxAutoReload == ( UBaseType_t ) pdTRUE )
 80037ec:	68fb      	ldr	r3, [r7, #12]
 80037ee:	69db      	ldr	r3, [r3, #28]
 80037f0:	2b01      	cmp	r3, #1
 80037f2:	d126      	bne.n	8003842 <prvSwitchTimerLists+0x86>
			the timer going into the same timer list then it has already expired
			and the timer should be re-inserted into the current list so it is
			processed again within this loop.  Otherwise a command should be sent
			to restart the timer to ensure it is only inserted into a list after
			the lists have been swapped. */
			xReloadTime = ( xNextExpireTime + pxTimer->xTimerPeriodInTicks );
 80037f4:	68fb      	ldr	r3, [r7, #12]
 80037f6:	699b      	ldr	r3, [r3, #24]
 80037f8:	693a      	ldr	r2, [r7, #16]
 80037fa:	18d3      	adds	r3, r2, r3
 80037fc:	60bb      	str	r3, [r7, #8]
			if( xReloadTime > xNextExpireTime )
 80037fe:	68ba      	ldr	r2, [r7, #8]
 8003800:	693b      	ldr	r3, [r7, #16]
 8003802:	429a      	cmp	r2, r3
 8003804:	d90e      	bls.n	8003824 <prvSwitchTimerLists+0x68>
			{
				listSET_LIST_ITEM_VALUE( &( pxTimer->xTimerListItem ), xReloadTime );
 8003806:	68fb      	ldr	r3, [r7, #12]
 8003808:	68ba      	ldr	r2, [r7, #8]
 800380a:	605a      	str	r2, [r3, #4]
				listSET_LIST_ITEM_OWNER( &( pxTimer->xTimerListItem ), pxTimer );
 800380c:	68fb      	ldr	r3, [r7, #12]
 800380e:	68fa      	ldr	r2, [r7, #12]
 8003810:	611a      	str	r2, [r3, #16]
				vListInsert( pxCurrentTimerList, &( pxTimer->xTimerListItem ) );
 8003812:	4b15      	ldr	r3, [pc, #84]	; (8003868 <prvSwitchTimerLists+0xac>)
 8003814:	681a      	ldr	r2, [r3, #0]
 8003816:	68fb      	ldr	r3, [r7, #12]
 8003818:	3304      	adds	r3, #4
 800381a:	0019      	movs	r1, r3
 800381c:	0010      	movs	r0, r2
 800381e:	f7fe fac8 	bl	8001db2 <vListInsert>
 8003822:	e00e      	b.n	8003842 <prvSwitchTimerLists+0x86>
			}
			else
			{
				xResult = xTimerGenericCommand( pxTimer, tmrCOMMAND_START_DONT_TRACE, xNextExpireTime, NULL, tmrNO_DELAY );
 8003824:	693a      	ldr	r2, [r7, #16]
 8003826:	68f8      	ldr	r0, [r7, #12]
 8003828:	2300      	movs	r3, #0
 800382a:	9300      	str	r3, [sp, #0]
 800382c:	2300      	movs	r3, #0
 800382e:	2100      	movs	r1, #0
 8003830:	f7ff fdca 	bl	80033c8 <xTimerGenericCommand>
 8003834:	0003      	movs	r3, r0
 8003836:	607b      	str	r3, [r7, #4]
				configASSERT( xResult );
 8003838:	687b      	ldr	r3, [r7, #4]
 800383a:	2b00      	cmp	r3, #0
 800383c:	d101      	bne.n	8003842 <prvSwitchTimerLists+0x86>
 800383e:	b672      	cpsid	i
 8003840:	e7fe      	b.n	8003840 <prvSwitchTimerLists+0x84>
	while( listLIST_IS_EMPTY( pxCurrentTimerList ) == pdFALSE )
 8003842:	4b09      	ldr	r3, [pc, #36]	; (8003868 <prvSwitchTimerLists+0xac>)
 8003844:	681b      	ldr	r3, [r3, #0]
 8003846:	681b      	ldr	r3, [r3, #0]
 8003848:	2b00      	cmp	r3, #0
 800384a:	d1bb      	bne.n	80037c4 <prvSwitchTimerLists+0x8>
		{
			mtCOVERAGE_TEST_MARKER();
		}
	}

	pxTemp = pxCurrentTimerList;
 800384c:	4b06      	ldr	r3, [pc, #24]	; (8003868 <prvSwitchTimerLists+0xac>)
 800384e:	681b      	ldr	r3, [r3, #0]
 8003850:	617b      	str	r3, [r7, #20]
	pxCurrentTimerList = pxOverflowTimerList;
 8003852:	4b06      	ldr	r3, [pc, #24]	; (800386c <prvSwitchTimerLists+0xb0>)
 8003854:	681a      	ldr	r2, [r3, #0]
 8003856:	4b04      	ldr	r3, [pc, #16]	; (8003868 <prvSwitchTimerLists+0xac>)
 8003858:	601a      	str	r2, [r3, #0]
	pxOverflowTimerList = pxTemp;
 800385a:	4b04      	ldr	r3, [pc, #16]	; (800386c <prvSwitchTimerLists+0xb0>)
 800385c:	697a      	ldr	r2, [r7, #20]
 800385e:	601a      	str	r2, [r3, #0]
}
 8003860:	46c0      	nop			; (mov r8, r8)
 8003862:	46bd      	mov	sp, r7
 8003864:	b006      	add	sp, #24
 8003866:	bd80      	pop	{r7, pc}
 8003868:	20000c14 	.word	0x20000c14
 800386c:	20000c18 	.word	0x20000c18

08003870 <prvCheckForValidListAndQueue>:
/*-----------------------------------------------------------*/

static void prvCheckForValidListAndQueue( void )
{
 8003870:	b580      	push	{r7, lr}
 8003872:	b082      	sub	sp, #8
 8003874:	af02      	add	r7, sp, #8
	/* Check that the list from which active timers are referenced, and the
	queue used to communicate with the timer service, have been
	initialised. */
	taskENTER_CRITICAL();
 8003876:	f000 f8db 	bl	8003a30 <vPortEnterCritical>
	{
		if( xTimerQueue == NULL )
 800387a:	4b17      	ldr	r3, [pc, #92]	; (80038d8 <prvCheckForValidListAndQueue+0x68>)
 800387c:	681b      	ldr	r3, [r3, #0]
 800387e:	2b00      	cmp	r3, #0
 8003880:	d124      	bne.n	80038cc <prvCheckForValidListAndQueue+0x5c>
		{
			vListInitialise( &xActiveTimerList1 );
 8003882:	4b16      	ldr	r3, [pc, #88]	; (80038dc <prvCheckForValidListAndQueue+0x6c>)
 8003884:	0018      	movs	r0, r3
 8003886:	f7fe fa49 	bl	8001d1c <vListInitialise>
			vListInitialise( &xActiveTimerList2 );
 800388a:	4b15      	ldr	r3, [pc, #84]	; (80038e0 <prvCheckForValidListAndQueue+0x70>)
 800388c:	0018      	movs	r0, r3
 800388e:	f7fe fa45 	bl	8001d1c <vListInitialise>
			pxCurrentTimerList = &xActiveTimerList1;
 8003892:	4b14      	ldr	r3, [pc, #80]	; (80038e4 <prvCheckForValidListAndQueue+0x74>)
 8003894:	4a11      	ldr	r2, [pc, #68]	; (80038dc <prvCheckForValidListAndQueue+0x6c>)
 8003896:	601a      	str	r2, [r3, #0]
			pxOverflowTimerList = &xActiveTimerList2;
 8003898:	4b13      	ldr	r3, [pc, #76]	; (80038e8 <prvCheckForValidListAndQueue+0x78>)
 800389a:	4a11      	ldr	r2, [pc, #68]	; (80038e0 <prvCheckForValidListAndQueue+0x70>)
 800389c:	601a      	str	r2, [r3, #0]
				/* The timer queue is allocated statically in case
				configSUPPORT_DYNAMIC_ALLOCATION is 0. */
				static StaticQueue_t xStaticTimerQueue; /*lint !e956 Ok to declare in this manner to prevent additional conditional compilation guards in other locations. */
				static uint8_t ucStaticTimerQueueStorage[ ( size_t ) configTIMER_QUEUE_LENGTH * sizeof( DaemonTaskMessage_t ) ]; /*lint !e956 Ok to declare in this manner to prevent additional conditional compilation guards in other locations. */

				xTimerQueue = xQueueCreateStatic( ( UBaseType_t ) configTIMER_QUEUE_LENGTH, ( UBaseType_t ) sizeof( DaemonTaskMessage_t ), &( ucStaticTimerQueueStorage[ 0 ] ), &xStaticTimerQueue );
 800389e:	4913      	ldr	r1, [pc, #76]	; (80038ec <prvCheckForValidListAndQueue+0x7c>)
 80038a0:	4a13      	ldr	r2, [pc, #76]	; (80038f0 <prvCheckForValidListAndQueue+0x80>)
 80038a2:	2300      	movs	r3, #0
 80038a4:	9300      	str	r3, [sp, #0]
 80038a6:	000b      	movs	r3, r1
 80038a8:	2110      	movs	r1, #16
 80038aa:	200a      	movs	r0, #10
 80038ac:	f7fe fb33 	bl	8001f16 <xQueueGenericCreateStatic>
 80038b0:	0002      	movs	r2, r0
 80038b2:	4b09      	ldr	r3, [pc, #36]	; (80038d8 <prvCheckForValidListAndQueue+0x68>)
 80038b4:	601a      	str	r2, [r3, #0]
			}
			#endif

			#if ( configQUEUE_REGISTRY_SIZE > 0 )
			{
				if( xTimerQueue != NULL )
 80038b6:	4b08      	ldr	r3, [pc, #32]	; (80038d8 <prvCheckForValidListAndQueue+0x68>)
 80038b8:	681b      	ldr	r3, [r3, #0]
 80038ba:	2b00      	cmp	r3, #0
 80038bc:	d006      	beq.n	80038cc <prvCheckForValidListAndQueue+0x5c>
				{
					vQueueAddToRegistry( xTimerQueue, "TmrQ" );
 80038be:	4b06      	ldr	r3, [pc, #24]	; (80038d8 <prvCheckForValidListAndQueue+0x68>)
 80038c0:	681b      	ldr	r3, [r3, #0]
 80038c2:	4a0c      	ldr	r2, [pc, #48]	; (80038f4 <prvCheckForValidListAndQueue+0x84>)
 80038c4:	0011      	movs	r1, r2
 80038c6:	0018      	movs	r0, r3
 80038c8:	f7fe fe9e 	bl	8002608 <vQueueAddToRegistry>
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}
	}
	taskEXIT_CRITICAL();
 80038cc:	f000 f8c2 	bl	8003a54 <vPortExitCritical>
}
 80038d0:	46c0      	nop			; (mov r8, r8)
 80038d2:	46bd      	mov	sp, r7
 80038d4:	bd80      	pop	{r7, pc}
 80038d6:	46c0      	nop			; (mov r8, r8)
 80038d8:	20000c1c 	.word	0x20000c1c
 80038dc:	20000bec 	.word	0x20000bec
 80038e0:	20000c00 	.word	0x20000c00
 80038e4:	20000c14 	.word	0x20000c14
 80038e8:	20000c18 	.word	0x20000c18
 80038ec:	20000cc8 	.word	0x20000cc8
 80038f0:	20000c28 	.word	0x20000c28
 80038f4:	08003f74 	.word	0x08003f74

080038f8 <pxPortInitialiseStack>:

/*
 * See header file for description.
 */
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
{
 80038f8:	b580      	push	{r7, lr}
 80038fa:	b084      	sub	sp, #16
 80038fc:	af00      	add	r7, sp, #0
 80038fe:	60f8      	str	r0, [r7, #12]
 8003900:	60b9      	str	r1, [r7, #8]
 8003902:	607a      	str	r2, [r7, #4]
	/* Simulate the stack frame as it would be created by a context switch
	interrupt. */
	pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
 8003904:	68fb      	ldr	r3, [r7, #12]
 8003906:	3b04      	subs	r3, #4
 8003908:	60fb      	str	r3, [r7, #12]
	*pxTopOfStack = portINITIAL_XPSR;	/* xPSR */
 800390a:	68fb      	ldr	r3, [r7, #12]
 800390c:	2280      	movs	r2, #128	; 0x80
 800390e:	0452      	lsls	r2, r2, #17
 8003910:	601a      	str	r2, [r3, #0]
	pxTopOfStack--;
 8003912:	68fb      	ldr	r3, [r7, #12]
 8003914:	3b04      	subs	r3, #4
 8003916:	60fb      	str	r3, [r7, #12]
	*pxTopOfStack = ( StackType_t ) pxCode;	/* PC */
 8003918:	68ba      	ldr	r2, [r7, #8]
 800391a:	68fb      	ldr	r3, [r7, #12]
 800391c:	601a      	str	r2, [r3, #0]
	pxTopOfStack--;
 800391e:	68fb      	ldr	r3, [r7, #12]
 8003920:	3b04      	subs	r3, #4
 8003922:	60fb      	str	r3, [r7, #12]
	*pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS;	/* LR */
 8003924:	4a08      	ldr	r2, [pc, #32]	; (8003948 <pxPortInitialiseStack+0x50>)
 8003926:	68fb      	ldr	r3, [r7, #12]
 8003928:	601a      	str	r2, [r3, #0]
	pxTopOfStack -= 5;	/* R12, R3, R2 and R1. */
 800392a:	68fb      	ldr	r3, [r7, #12]
 800392c:	3b14      	subs	r3, #20
 800392e:	60fb      	str	r3, [r7, #12]
	*pxTopOfStack = ( StackType_t ) pvParameters;	/* R0 */
 8003930:	687a      	ldr	r2, [r7, #4]
 8003932:	68fb      	ldr	r3, [r7, #12]
 8003934:	601a      	str	r2, [r3, #0]
	pxTopOfStack -= 8; /* R11..R4. */
 8003936:	68fb      	ldr	r3, [r7, #12]
 8003938:	3b20      	subs	r3, #32
 800393a:	60fb      	str	r3, [r7, #12]

	return pxTopOfStack;
 800393c:	68fb      	ldr	r3, [r7, #12]
}
 800393e:	0018      	movs	r0, r3
 8003940:	46bd      	mov	sp, r7
 8003942:	b004      	add	sp, #16
 8003944:	bd80      	pop	{r7, pc}
 8003946:	46c0      	nop			; (mov r8, r8)
 8003948:	0800394d 	.word	0x0800394d

0800394c <prvTaskExitError>:
/*-----------------------------------------------------------*/

static void prvTaskExitError( void )
{
 800394c:	b580      	push	{r7, lr}
 800394e:	b082      	sub	sp, #8
 8003950:	af00      	add	r7, sp, #0
volatile uint32_t ulDummy = 0UL;
 8003952:	2300      	movs	r3, #0
 8003954:	607b      	str	r3, [r7, #4]
	its caller as there is nothing to return to.  If a task wants to exit it
	should instead call vTaskDelete( NULL ).

	Artificially force an assert() to be triggered if configASSERT() is
	defined, then stop here so application writers can catch the error. */
	configASSERT( uxCriticalNesting == ~0UL );
 8003956:	4b07      	ldr	r3, [pc, #28]	; (8003974 <prvTaskExitError+0x28>)
 8003958:	681b      	ldr	r3, [r3, #0]
 800395a:	3301      	adds	r3, #1
 800395c:	d001      	beq.n	8003962 <prvTaskExitError+0x16>
 800395e:	b672      	cpsid	i
 8003960:	e7fe      	b.n	8003960 <prvTaskExitError+0x14>
	portDISABLE_INTERRUPTS();
 8003962:	b672      	cpsid	i
	while( ulDummy == 0 )
 8003964:	46c0      	nop			; (mov r8, r8)
 8003966:	687b      	ldr	r3, [r7, #4]
 8003968:	2b00      	cmp	r3, #0
 800396a:	d0fc      	beq.n	8003966 <prvTaskExitError+0x1a>
		about code appearing after this function is called - making ulDummy
		volatile makes the compiler think the function could return and
		therefore not output an 'unreachable code' warning for code that appears
		after it. */
	}
}
 800396c:	46c0      	nop			; (mov r8, r8)
 800396e:	46bd      	mov	sp, r7
 8003970:	b002      	add	sp, #8
 8003972:	bd80      	pop	{r7, pc}
 8003974:	2000000c 	.word	0x2000000c

08003978 <SVC_Handler>:
/*-----------------------------------------------------------*/

void vPortSVCHandler( void )
{
 8003978:	b580      	push	{r7, lr}
 800397a:	af00      	add	r7, sp, #0
	/* This function is no longer used, but retained for backward
	compatibility. */
}
 800397c:	46c0      	nop			; (mov r8, r8)
 800397e:	46bd      	mov	sp, r7
 8003980:	bd80      	pop	{r7, pc}
	...

08003990 <vPortStartFirstTask>:
void vPortStartFirstTask( void )
{
	/* The MSP stack is not reset as, unlike on M3/4 parts, there is no vector
	table offset register that can be used to locate the initial stack value.
	Not all M0 parts have the application vector table at address 0. */
	__asm volatile(
 8003990:	4a0b      	ldr	r2, [pc, #44]	; (80039c0 <pxCurrentTCBConst2>)
 8003992:	6813      	ldr	r3, [r2, #0]
 8003994:	6818      	ldr	r0, [r3, #0]
 8003996:	3020      	adds	r0, #32
 8003998:	f380 8809 	msr	PSP, r0
 800399c:	2002      	movs	r0, #2
 800399e:	f380 8814 	msr	CONTROL, r0
 80039a2:	f3bf 8f6f 	isb	sy
 80039a6:	bc3f      	pop	{r0, r1, r2, r3, r4, r5}
 80039a8:	46ae      	mov	lr, r5
 80039aa:	bc08      	pop	{r3}
 80039ac:	bc04      	pop	{r2}
 80039ae:	b662      	cpsie	i
 80039b0:	4718      	bx	r3
 80039b2:	46c0      	nop			; (mov r8, r8)
 80039b4:	46c0      	nop			; (mov r8, r8)
 80039b6:	46c0      	nop			; (mov r8, r8)
 80039b8:	46c0      	nop			; (mov r8, r8)
 80039ba:	46c0      	nop			; (mov r8, r8)
 80039bc:	46c0      	nop			; (mov r8, r8)
 80039be:	46c0      	nop			; (mov r8, r8)

080039c0 <pxCurrentTCBConst2>:
 80039c0:	200006ec 	.word	0x200006ec
	"	bx   r3						\n" /* Finally, jump to the user defined task code. */
	"								\n"
	"	.align 4					\n"
	"pxCurrentTCBConst2: .word pxCurrentTCB	  "
				  );
}
 80039c4:	46c0      	nop			; (mov r8, r8)
 80039c6:	46c0      	nop			; (mov r8, r8)

080039c8 <xPortStartScheduler>:

/*
 * See header file for description.
 */
BaseType_t xPortStartScheduler( void )
{
 80039c8:	b580      	push	{r7, lr}
 80039ca:	af00      	add	r7, sp, #0
	/* Make PendSV, CallSV and SysTick the same priroity as the kernel. */
	*(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;
 80039cc:	4b0e      	ldr	r3, [pc, #56]	; (8003a08 <xPortStartScheduler+0x40>)
 80039ce:	681a      	ldr	r2, [r3, #0]
 80039d0:	4b0d      	ldr	r3, [pc, #52]	; (8003a08 <xPortStartScheduler+0x40>)
 80039d2:	21ff      	movs	r1, #255	; 0xff
 80039d4:	0409      	lsls	r1, r1, #16
 80039d6:	430a      	orrs	r2, r1
 80039d8:	601a      	str	r2, [r3, #0]
	*(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI;
 80039da:	4b0b      	ldr	r3, [pc, #44]	; (8003a08 <xPortStartScheduler+0x40>)
 80039dc:	681a      	ldr	r2, [r3, #0]
 80039de:	4b0a      	ldr	r3, [pc, #40]	; (8003a08 <xPortStartScheduler+0x40>)
 80039e0:	21ff      	movs	r1, #255	; 0xff
 80039e2:	0609      	lsls	r1, r1, #24
 80039e4:	430a      	orrs	r2, r1
 80039e6:	601a      	str	r2, [r3, #0]

	/* Start the timer that generates the tick ISR.  Interrupts are disabled
	here already. */
	prvSetupTimerInterrupt();
 80039e8:	f000 f898 	bl	8003b1c <prvSetupTimerInterrupt>

	/* Initialise the critical nesting count ready for the first task. */
	uxCriticalNesting = 0;
 80039ec:	4b07      	ldr	r3, [pc, #28]	; (8003a0c <xPortStartScheduler+0x44>)
 80039ee:	2200      	movs	r2, #0
 80039f0:	601a      	str	r2, [r3, #0]

	/* Start the first task. */
	vPortStartFirstTask();
 80039f2:	f7ff ffcd 	bl	8003990 <vPortStartFirstTask>
	exit error function to prevent compiler warnings about a static function
	not being called in the case that the application writer overrides this
	functionality by defining configTASK_RETURN_ADDRESS.  Call
	vTaskSwitchContext() so link time optimisation does not remove the
	symbol. */
	vTaskSwitchContext();
 80039f6:	f7ff f9af 	bl	8002d58 <vTaskSwitchContext>
	prvTaskExitError();
 80039fa:	f7ff ffa7 	bl	800394c <prvTaskExitError>

	/* Should not get here! */
	return 0;
 80039fe:	2300      	movs	r3, #0
}
 8003a00:	0018      	movs	r0, r3
 8003a02:	46bd      	mov	sp, r7
 8003a04:	bd80      	pop	{r7, pc}
 8003a06:	46c0      	nop			; (mov r8, r8)
 8003a08:	e000ed20 	.word	0xe000ed20
 8003a0c:	2000000c 	.word	0x2000000c

08003a10 <vPortYield>:
	configASSERT( uxCriticalNesting == 1000UL );
}
/*-----------------------------------------------------------*/

void vPortYield( void )
{
 8003a10:	b580      	push	{r7, lr}
 8003a12:	af00      	add	r7, sp, #0
	/* Set a PendSV to request a context switch. */
	*( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET;
 8003a14:	4b05      	ldr	r3, [pc, #20]	; (8003a2c <vPortYield+0x1c>)
 8003a16:	2280      	movs	r2, #128	; 0x80
 8003a18:	0552      	lsls	r2, r2, #21
 8003a1a:	601a      	str	r2, [r3, #0]

	/* Barriers are normally not required but do ensure the code is completely
	within the specified behaviour for the architecture. */
	__asm volatile( "dsb" ::: "memory" );
 8003a1c:	f3bf 8f4f 	dsb	sy
	__asm volatile( "isb" );
 8003a20:	f3bf 8f6f 	isb	sy
}
 8003a24:	46c0      	nop			; (mov r8, r8)
 8003a26:	46bd      	mov	sp, r7
 8003a28:	bd80      	pop	{r7, pc}
 8003a2a:	46c0      	nop			; (mov r8, r8)
 8003a2c:	e000ed04 	.word	0xe000ed04

08003a30 <vPortEnterCritical>:
/*-----------------------------------------------------------*/

void vPortEnterCritical( void )
{
 8003a30:	b580      	push	{r7, lr}
 8003a32:	af00      	add	r7, sp, #0
    portDISABLE_INTERRUPTS();
 8003a34:	b672      	cpsid	i
    uxCriticalNesting++;
 8003a36:	4b06      	ldr	r3, [pc, #24]	; (8003a50 <vPortEnterCritical+0x20>)
 8003a38:	681b      	ldr	r3, [r3, #0]
 8003a3a:	1c5a      	adds	r2, r3, #1
 8003a3c:	4b04      	ldr	r3, [pc, #16]	; (8003a50 <vPortEnterCritical+0x20>)
 8003a3e:	601a      	str	r2, [r3, #0]
	__asm volatile( "dsb" ::: "memory" );
 8003a40:	f3bf 8f4f 	dsb	sy
	__asm volatile( "isb" );
 8003a44:	f3bf 8f6f 	isb	sy
}
 8003a48:	46c0      	nop			; (mov r8, r8)
 8003a4a:	46bd      	mov	sp, r7
 8003a4c:	bd80      	pop	{r7, pc}
 8003a4e:	46c0      	nop			; (mov r8, r8)
 8003a50:	2000000c 	.word	0x2000000c

08003a54 <vPortExitCritical>:
/*-----------------------------------------------------------*/

void vPortExitCritical( void )
{
 8003a54:	b580      	push	{r7, lr}
 8003a56:	af00      	add	r7, sp, #0
	configASSERT( uxCriticalNesting );
 8003a58:	4b09      	ldr	r3, [pc, #36]	; (8003a80 <vPortExitCritical+0x2c>)
 8003a5a:	681b      	ldr	r3, [r3, #0]
 8003a5c:	2b00      	cmp	r3, #0
 8003a5e:	d101      	bne.n	8003a64 <vPortExitCritical+0x10>
 8003a60:	b672      	cpsid	i
 8003a62:	e7fe      	b.n	8003a62 <vPortExitCritical+0xe>
    uxCriticalNesting--;
 8003a64:	4b06      	ldr	r3, [pc, #24]	; (8003a80 <vPortExitCritical+0x2c>)
 8003a66:	681b      	ldr	r3, [r3, #0]
 8003a68:	1e5a      	subs	r2, r3, #1
 8003a6a:	4b05      	ldr	r3, [pc, #20]	; (8003a80 <vPortExitCritical+0x2c>)
 8003a6c:	601a      	str	r2, [r3, #0]
    if( uxCriticalNesting == 0 )
 8003a6e:	4b04      	ldr	r3, [pc, #16]	; (8003a80 <vPortExitCritical+0x2c>)
 8003a70:	681b      	ldr	r3, [r3, #0]
 8003a72:	2b00      	cmp	r3, #0
 8003a74:	d100      	bne.n	8003a78 <vPortExitCritical+0x24>
    {
        portENABLE_INTERRUPTS();
 8003a76:	b662      	cpsie	i
    }
}
 8003a78:	46c0      	nop			; (mov r8, r8)
 8003a7a:	46bd      	mov	sp, r7
 8003a7c:	bd80      	pop	{r7, pc}
 8003a7e:	46c0      	nop			; (mov r8, r8)
 8003a80:	2000000c 	.word	0x2000000c

08003a84 <ulSetInterruptMaskFromISR>:
/*-----------------------------------------------------------*/

uint32_t ulSetInterruptMaskFromISR( void )
{
	__asm volatile(
 8003a84:	f3ef 8010 	mrs	r0, PRIMASK
 8003a88:	b672      	cpsid	i
 8003a8a:	4770      	bx	lr
	/* To avoid compiler warnings.  The return statement will nevere be reached,
	but some compilers warn if it is not included, while others won't compile if
	it is. */
	return 0;
#endif
}
 8003a8c:	46c0      	nop			; (mov r8, r8)
 8003a8e:	0018      	movs	r0, r3

08003a90 <vClearInterruptMaskFromISR>:
/*-----------------------------------------------------------*/

void vClearInterruptMaskFromISR( __attribute__( ( unused ) ) uint32_t ulMask )
{
	__asm volatile(
 8003a90:	f380 8810 	msr	PRIMASK, r0
 8003a94:	4770      	bx	lr
	/* Just to avoid compiler warning.  ulMask is used from the asm code but
	the compiler can't see that.  Some compilers generate warnings without the
	following line, while others generate warnings if the line is included. */
	( void ) ulMask;
#endif
}
 8003a96:	46c0      	nop			; (mov r8, r8)
	...

08003aa0 <PendSV_Handler>:

void xPortPendSVHandler( void )
{
	/* This is a naked function. */

	__asm volatile
 8003aa0:	f3ef 8009 	mrs	r0, PSP
 8003aa4:	4b0e      	ldr	r3, [pc, #56]	; (8003ae0 <pxCurrentTCBConst>)
 8003aa6:	681a      	ldr	r2, [r3, #0]
 8003aa8:	3820      	subs	r0, #32
 8003aaa:	6010      	str	r0, [r2, #0]
 8003aac:	c0f0      	stmia	r0!, {r4, r5, r6, r7}
 8003aae:	4644      	mov	r4, r8
 8003ab0:	464d      	mov	r5, r9
 8003ab2:	4656      	mov	r6, sl
 8003ab4:	465f      	mov	r7, fp
 8003ab6:	c0f0      	stmia	r0!, {r4, r5, r6, r7}
 8003ab8:	b508      	push	{r3, lr}
 8003aba:	b672      	cpsid	i
 8003abc:	f7ff f94c 	bl	8002d58 <vTaskSwitchContext>
 8003ac0:	b662      	cpsie	i
 8003ac2:	bc0c      	pop	{r2, r3}
 8003ac4:	6811      	ldr	r1, [r2, #0]
 8003ac6:	6808      	ldr	r0, [r1, #0]
 8003ac8:	3010      	adds	r0, #16
 8003aca:	c8f0      	ldmia	r0!, {r4, r5, r6, r7}
 8003acc:	46a0      	mov	r8, r4
 8003ace:	46a9      	mov	r9, r5
 8003ad0:	46b2      	mov	sl, r6
 8003ad2:	46bb      	mov	fp, r7
 8003ad4:	f380 8809 	msr	PSP, r0
 8003ad8:	3820      	subs	r0, #32
 8003ada:	c8f0      	ldmia	r0!, {r4, r5, r6, r7}
 8003adc:	4718      	bx	r3
 8003ade:	46c0      	nop			; (mov r8, r8)

08003ae0 <pxCurrentTCBConst>:
 8003ae0:	200006ec 	.word	0x200006ec
	"	bx r3								\n"
	"										\n"
	"	.align 4							\n"
	"pxCurrentTCBConst: .word pxCurrentTCB	  "
	);
}
 8003ae4:	46c0      	nop			; (mov r8, r8)
 8003ae6:	46c0      	nop			; (mov r8, r8)

08003ae8 <SysTick_Handler>:
/*-----------------------------------------------------------*/

void xPortSysTickHandler( void )
{
 8003ae8:	b580      	push	{r7, lr}
 8003aea:	b082      	sub	sp, #8
 8003aec:	af00      	add	r7, sp, #0
uint32_t ulPreviousMask;

	ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();
 8003aee:	f7ff ffc9 	bl	8003a84 <ulSetInterruptMaskFromISR>
 8003af2:	0003      	movs	r3, r0
 8003af4:	607b      	str	r3, [r7, #4]
	{
		/* Increment the RTOS tick. */
		if( xTaskIncrementTick() != pdFALSE )
 8003af6:	f7ff f87b 	bl	8002bf0 <xTaskIncrementTick>
 8003afa:	1e03      	subs	r3, r0, #0
 8003afc:	d003      	beq.n	8003b06 <SysTick_Handler+0x1e>
		{
			/* Pend a context switch. */
			*(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
 8003afe:	4b06      	ldr	r3, [pc, #24]	; (8003b18 <SysTick_Handler+0x30>)
 8003b00:	2280      	movs	r2, #128	; 0x80
 8003b02:	0552      	lsls	r2, r2, #21
 8003b04:	601a      	str	r2, [r3, #0]
		}
	}
	portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
 8003b06:	687b      	ldr	r3, [r7, #4]
 8003b08:	0018      	movs	r0, r3
 8003b0a:	f7ff ffc1 	bl	8003a90 <vClearInterruptMaskFromISR>
}
 8003b0e:	46c0      	nop			; (mov r8, r8)
 8003b10:	46bd      	mov	sp, r7
 8003b12:	b002      	add	sp, #8
 8003b14:	bd80      	pop	{r7, pc}
 8003b16:	46c0      	nop			; (mov r8, r8)
 8003b18:	e000ed04 	.word	0xe000ed04

08003b1c <prvSetupTimerInterrupt>:
/*
 * Setup the systick timer to generate the tick interrupts at the required
 * frequency.
 */
void prvSetupTimerInterrupt( void )
{
 8003b1c:	b580      	push	{r7, lr}
 8003b1e:	af00      	add	r7, sp, #0
   ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
 }
 #endif /* configUSE_TICKLESS_IDLE */

/* Stop and reset the SysTick. */
	portNVIC_SYSTICK_CTRL = 0UL;
 8003b20:	4b0b      	ldr	r3, [pc, #44]	; (8003b50 <prvSetupTimerInterrupt+0x34>)
 8003b22:	2200      	movs	r2, #0
 8003b24:	601a      	str	r2, [r3, #0]
	portNVIC_SYSTICK_CURRENT_VALUE = 0UL;
 8003b26:	4b0b      	ldr	r3, [pc, #44]	; (8003b54 <prvSetupTimerInterrupt+0x38>)
 8003b28:	2200      	movs	r2, #0
 8003b2a:	601a      	str	r2, [r3, #0]

 /* Configure SysTick to interrupt at the requested rate. */
 portNVIC_SYSTICK_LOAD = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
 8003b2c:	4b0a      	ldr	r3, [pc, #40]	; (8003b58 <prvSetupTimerInterrupt+0x3c>)
 8003b2e:	681a      	ldr	r2, [r3, #0]
 8003b30:	23fa      	movs	r3, #250	; 0xfa
 8003b32:	0099      	lsls	r1, r3, #2
 8003b34:	0010      	movs	r0, r2
 8003b36:	f7fc fae7 	bl	8000108 <__udivsi3>
 8003b3a:	0003      	movs	r3, r0
 8003b3c:	001a      	movs	r2, r3
 8003b3e:	4b07      	ldr	r3, [pc, #28]	; (8003b5c <prvSetupTimerInterrupt+0x40>)
 8003b40:	3a01      	subs	r2, #1
 8003b42:	601a      	str	r2, [r3, #0]
 portNVIC_SYSTICK_CTRL = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;
 8003b44:	4b02      	ldr	r3, [pc, #8]	; (8003b50 <prvSetupTimerInterrupt+0x34>)
 8003b46:	2207      	movs	r2, #7
 8003b48:	601a      	str	r2, [r3, #0]
}
 8003b4a:	46c0      	nop			; (mov r8, r8)
 8003b4c:	46bd      	mov	sp, r7
 8003b4e:	bd80      	pop	{r7, pc}
 8003b50:	e000e010 	.word	0xe000e010
 8003b54:	e000e018 	.word	0xe000e018
 8003b58:	20000004 	.word	0x20000004
 8003b5c:	e000e014 	.word	0xe000e014

08003b60 <pvPortMalloc>:
static size_t xBlockAllocatedBit = 0;

/*-----------------------------------------------------------*/

void *pvPortMalloc( size_t xWantedSize )
{
 8003b60:	b580      	push	{r7, lr}
 8003b62:	b086      	sub	sp, #24
 8003b64:	af00      	add	r7, sp, #0
 8003b66:	6078      	str	r0, [r7, #4]
BlockLink_t *pxBlock, *pxPreviousBlock, *pxNewBlockLink;
void *pvReturn = NULL;
 8003b68:	2300      	movs	r3, #0
 8003b6a:	60fb      	str	r3, [r7, #12]

	vTaskSuspendAll();
 8003b6c:	f7fe ff9a 	bl	8002aa4 <vTaskSuspendAll>
	{
		/* If this is the first call to malloc then the heap will require
		initialisation to setup the list of free blocks. */
		if( pxEnd == NULL )
 8003b70:	4b49      	ldr	r3, [pc, #292]	; (8003c98 <pvPortMalloc+0x138>)
 8003b72:	681b      	ldr	r3, [r3, #0]
 8003b74:	2b00      	cmp	r3, #0
 8003b76:	d101      	bne.n	8003b7c <pvPortMalloc+0x1c>
		{
			prvHeapInit();
 8003b78:	f000 f8e0 	bl	8003d3c <prvHeapInit>

		/* Check the requested block size is not so large that the top bit is
		set.  The top bit of the block size member of the BlockLink_t structure
		is used to determine who owns the block - the application or the
		kernel, so it must be free. */
		if( ( xWantedSize & xBlockAllocatedBit ) == 0 )
 8003b7c:	4b47      	ldr	r3, [pc, #284]	; (8003c9c <pvPortMalloc+0x13c>)
 8003b7e:	681b      	ldr	r3, [r3, #0]
 8003b80:	687a      	ldr	r2, [r7, #4]
 8003b82:	4013      	ands	r3, r2
 8003b84:	d000      	beq.n	8003b88 <pvPortMalloc+0x28>
 8003b86:	e079      	b.n	8003c7c <pvPortMalloc+0x11c>
		{
			/* The wanted size is increased so it can contain a BlockLink_t
			structure in addition to the requested amount of bytes. */
			if( xWantedSize > 0 )
 8003b88:	687b      	ldr	r3, [r7, #4]
 8003b8a:	2b00      	cmp	r3, #0
 8003b8c:	d012      	beq.n	8003bb4 <pvPortMalloc+0x54>
			{
				xWantedSize += xHeapStructSize;
 8003b8e:	2208      	movs	r2, #8
 8003b90:	687b      	ldr	r3, [r7, #4]
 8003b92:	189b      	adds	r3, r3, r2
 8003b94:	607b      	str	r3, [r7, #4]

				/* Ensure that blocks are always aligned to the required number
				of bytes. */
				if( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) != 0x00 )
 8003b96:	687b      	ldr	r3, [r7, #4]
 8003b98:	2207      	movs	r2, #7
 8003b9a:	4013      	ands	r3, r2
 8003b9c:	d00a      	beq.n	8003bb4 <pvPortMalloc+0x54>
				{
					/* Byte alignment required. */
					xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ) );
 8003b9e:	687b      	ldr	r3, [r7, #4]
 8003ba0:	2207      	movs	r2, #7
 8003ba2:	4393      	bics	r3, r2
 8003ba4:	3308      	adds	r3, #8
 8003ba6:	607b      	str	r3, [r7, #4]
					configASSERT( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) == 0 );
 8003ba8:	687b      	ldr	r3, [r7, #4]
 8003baa:	2207      	movs	r2, #7
 8003bac:	4013      	ands	r3, r2
 8003bae:	d001      	beq.n	8003bb4 <pvPortMalloc+0x54>
 8003bb0:	b672      	cpsid	i
 8003bb2:	e7fe      	b.n	8003bb2 <pvPortMalloc+0x52>
			else
			{
				mtCOVERAGE_TEST_MARKER();
			}

			if( ( xWantedSize > 0 ) && ( xWantedSize <= xFreeBytesRemaining ) )
 8003bb4:	687b      	ldr	r3, [r7, #4]
 8003bb6:	2b00      	cmp	r3, #0
 8003bb8:	d060      	beq.n	8003c7c <pvPortMalloc+0x11c>
 8003bba:	4b39      	ldr	r3, [pc, #228]	; (8003ca0 <pvPortMalloc+0x140>)
 8003bbc:	681b      	ldr	r3, [r3, #0]
 8003bbe:	687a      	ldr	r2, [r7, #4]
 8003bc0:	429a      	cmp	r2, r3
 8003bc2:	d85b      	bhi.n	8003c7c <pvPortMalloc+0x11c>
			{
				/* Traverse the list from the start	(lowest address) block until
				one	of adequate size is found. */
				pxPreviousBlock = &xStart;
 8003bc4:	4b37      	ldr	r3, [pc, #220]	; (8003ca4 <pvPortMalloc+0x144>)
 8003bc6:	613b      	str	r3, [r7, #16]
				pxBlock = xStart.pxNextFreeBlock;
 8003bc8:	4b36      	ldr	r3, [pc, #216]	; (8003ca4 <pvPortMalloc+0x144>)
 8003bca:	681b      	ldr	r3, [r3, #0]
 8003bcc:	617b      	str	r3, [r7, #20]
				while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )
 8003bce:	e004      	b.n	8003bda <pvPortMalloc+0x7a>
				{
					pxPreviousBlock = pxBlock;
 8003bd0:	697b      	ldr	r3, [r7, #20]
 8003bd2:	613b      	str	r3, [r7, #16]
					pxBlock = pxBlock->pxNextFreeBlock;
 8003bd4:	697b      	ldr	r3, [r7, #20]
 8003bd6:	681b      	ldr	r3, [r3, #0]
 8003bd8:	617b      	str	r3, [r7, #20]
				while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )
 8003bda:	697b      	ldr	r3, [r7, #20]
 8003bdc:	685b      	ldr	r3, [r3, #4]
 8003bde:	687a      	ldr	r2, [r7, #4]
 8003be0:	429a      	cmp	r2, r3
 8003be2:	d903      	bls.n	8003bec <pvPortMalloc+0x8c>
 8003be4:	697b      	ldr	r3, [r7, #20]
 8003be6:	681b      	ldr	r3, [r3, #0]
 8003be8:	2b00      	cmp	r3, #0
 8003bea:	d1f1      	bne.n	8003bd0 <pvPortMalloc+0x70>
				}

				/* If the end marker was reached then a block of adequate size
				was	not found. */
				if( pxBlock != pxEnd )
 8003bec:	4b2a      	ldr	r3, [pc, #168]	; (8003c98 <pvPortMalloc+0x138>)
 8003bee:	681b      	ldr	r3, [r3, #0]
 8003bf0:	697a      	ldr	r2, [r7, #20]
 8003bf2:	429a      	cmp	r2, r3
 8003bf4:	d042      	beq.n	8003c7c <pvPortMalloc+0x11c>
				{
					/* Return the memory space pointed to - jumping over the
					BlockLink_t structure at its start. */
					pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize );
 8003bf6:	693b      	ldr	r3, [r7, #16]
 8003bf8:	681b      	ldr	r3, [r3, #0]
 8003bfa:	2208      	movs	r2, #8
 8003bfc:	189b      	adds	r3, r3, r2
 8003bfe:	60fb      	str	r3, [r7, #12]

					/* This block is being returned for use so must be taken out
					of the list of free blocks. */
					pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock;
 8003c00:	697b      	ldr	r3, [r7, #20]
 8003c02:	681a      	ldr	r2, [r3, #0]
 8003c04:	693b      	ldr	r3, [r7, #16]
 8003c06:	601a      	str	r2, [r3, #0]

					/* If the block is larger than required it can be split into
					two. */
					if( ( pxBlock->xBlockSize - xWantedSize ) > heapMINIMUM_BLOCK_SIZE )
 8003c08:	697b      	ldr	r3, [r7, #20]
 8003c0a:	685a      	ldr	r2, [r3, #4]
 8003c0c:	687b      	ldr	r3, [r7, #4]
 8003c0e:	1ad2      	subs	r2, r2, r3
 8003c10:	2308      	movs	r3, #8
 8003c12:	005b      	lsls	r3, r3, #1
 8003c14:	429a      	cmp	r2, r3
 8003c16:	d916      	bls.n	8003c46 <pvPortMalloc+0xe6>
					{
						/* This block is to be split into two.  Create a new
						block following the number of bytes requested. The void
						cast is used to prevent byte alignment warnings from the
						compiler. */
						pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize );
 8003c18:	697a      	ldr	r2, [r7, #20]
 8003c1a:	687b      	ldr	r3, [r7, #4]
 8003c1c:	18d3      	adds	r3, r2, r3
 8003c1e:	60bb      	str	r3, [r7, #8]
						configASSERT( ( ( ( size_t ) pxNewBlockLink ) & portBYTE_ALIGNMENT_MASK ) == 0 );
 8003c20:	68bb      	ldr	r3, [r7, #8]
 8003c22:	2207      	movs	r2, #7
 8003c24:	4013      	ands	r3, r2
 8003c26:	d001      	beq.n	8003c2c <pvPortMalloc+0xcc>
 8003c28:	b672      	cpsid	i
 8003c2a:	e7fe      	b.n	8003c2a <pvPortMalloc+0xca>

						/* Calculate the sizes of two blocks split from the
						single block. */
						pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize;
 8003c2c:	697b      	ldr	r3, [r7, #20]
 8003c2e:	685a      	ldr	r2, [r3, #4]
 8003c30:	687b      	ldr	r3, [r7, #4]
 8003c32:	1ad2      	subs	r2, r2, r3
 8003c34:	68bb      	ldr	r3, [r7, #8]
 8003c36:	605a      	str	r2, [r3, #4]
						pxBlock->xBlockSize = xWantedSize;
 8003c38:	697b      	ldr	r3, [r7, #20]
 8003c3a:	687a      	ldr	r2, [r7, #4]
 8003c3c:	605a      	str	r2, [r3, #4]

						/* Insert the new block into the list of free blocks. */
						prvInsertBlockIntoFreeList( pxNewBlockLink );
 8003c3e:	68bb      	ldr	r3, [r7, #8]
 8003c40:	0018      	movs	r0, r3
 8003c42:	f000 f8db 	bl	8003dfc <prvInsertBlockIntoFreeList>
					else
					{
						mtCOVERAGE_TEST_MARKER();
					}

					xFreeBytesRemaining -= pxBlock->xBlockSize;
 8003c46:	4b16      	ldr	r3, [pc, #88]	; (8003ca0 <pvPortMalloc+0x140>)
 8003c48:	681a      	ldr	r2, [r3, #0]
 8003c4a:	697b      	ldr	r3, [r7, #20]
 8003c4c:	685b      	ldr	r3, [r3, #4]
 8003c4e:	1ad2      	subs	r2, r2, r3
 8003c50:	4b13      	ldr	r3, [pc, #76]	; (8003ca0 <pvPortMalloc+0x140>)
 8003c52:	601a      	str	r2, [r3, #0]

					if( xFreeBytesRemaining < xMinimumEverFreeBytesRemaining )
 8003c54:	4b12      	ldr	r3, [pc, #72]	; (8003ca0 <pvPortMalloc+0x140>)
 8003c56:	681a      	ldr	r2, [r3, #0]
 8003c58:	4b13      	ldr	r3, [pc, #76]	; (8003ca8 <pvPortMalloc+0x148>)
 8003c5a:	681b      	ldr	r3, [r3, #0]
 8003c5c:	429a      	cmp	r2, r3
 8003c5e:	d203      	bcs.n	8003c68 <pvPortMalloc+0x108>
					{
						xMinimumEverFreeBytesRemaining = xFreeBytesRemaining;
 8003c60:	4b0f      	ldr	r3, [pc, #60]	; (8003ca0 <pvPortMalloc+0x140>)
 8003c62:	681a      	ldr	r2, [r3, #0]
 8003c64:	4b10      	ldr	r3, [pc, #64]	; (8003ca8 <pvPortMalloc+0x148>)
 8003c66:	601a      	str	r2, [r3, #0]
						mtCOVERAGE_TEST_MARKER();
					}

					/* The block is being returned - it is allocated and owned
					by the application and has no "next" block. */
					pxBlock->xBlockSize |= xBlockAllocatedBit;
 8003c68:	697b      	ldr	r3, [r7, #20]
 8003c6a:	685a      	ldr	r2, [r3, #4]
 8003c6c:	4b0b      	ldr	r3, [pc, #44]	; (8003c9c <pvPortMalloc+0x13c>)
 8003c6e:	681b      	ldr	r3, [r3, #0]
 8003c70:	431a      	orrs	r2, r3
 8003c72:	697b      	ldr	r3, [r7, #20]
 8003c74:	605a      	str	r2, [r3, #4]
					pxBlock->pxNextFreeBlock = NULL;
 8003c76:	697b      	ldr	r3, [r7, #20]
 8003c78:	2200      	movs	r2, #0
 8003c7a:	601a      	str	r2, [r3, #0]
			mtCOVERAGE_TEST_MARKER();
		}

		traceMALLOC( pvReturn, xWantedSize );
	}
	( void ) xTaskResumeAll();
 8003c7c:	f7fe ff1e 	bl	8002abc <xTaskResumeAll>
			mtCOVERAGE_TEST_MARKER();
		}
	}
	#endif

	configASSERT( ( ( ( size_t ) pvReturn ) & ( size_t ) portBYTE_ALIGNMENT_MASK ) == 0 );
 8003c80:	68fb      	ldr	r3, [r7, #12]
 8003c82:	2207      	movs	r2, #7
 8003c84:	4013      	ands	r3, r2
 8003c86:	d001      	beq.n	8003c8c <pvPortMalloc+0x12c>
 8003c88:	b672      	cpsid	i
 8003c8a:	e7fe      	b.n	8003c8a <pvPortMalloc+0x12a>
	return pvReturn;
 8003c8c:	68fb      	ldr	r3, [r7, #12]
}
 8003c8e:	0018      	movs	r0, r3
 8003c90:	46bd      	mov	sp, r7
 8003c92:	b006      	add	sp, #24
 8003c94:	bd80      	pop	{r7, pc}
 8003c96:	46c0      	nop			; (mov r8, r8)
 8003c98:	20001920 	.word	0x20001920
 8003c9c:	2000192c 	.word	0x2000192c
 8003ca0:	20001924 	.word	0x20001924
 8003ca4:	20001918 	.word	0x20001918
 8003ca8:	20001928 	.word	0x20001928

08003cac <vPortFree>:
/*-----------------------------------------------------------*/

void vPortFree( void *pv )
{
 8003cac:	b580      	push	{r7, lr}
 8003cae:	b084      	sub	sp, #16
 8003cb0:	af00      	add	r7, sp, #0
 8003cb2:	6078      	str	r0, [r7, #4]
uint8_t *puc = ( uint8_t * ) pv;
 8003cb4:	687b      	ldr	r3, [r7, #4]
 8003cb6:	60fb      	str	r3, [r7, #12]
BlockLink_t *pxLink;

	if( pv != NULL )
 8003cb8:	687b      	ldr	r3, [r7, #4]
 8003cba:	2b00      	cmp	r3, #0
 8003cbc:	d035      	beq.n	8003d2a <vPortFree+0x7e>
	{
		/* The memory being freed will have an BlockLink_t structure immediately
		before it. */
		puc -= xHeapStructSize;
 8003cbe:	2308      	movs	r3, #8
 8003cc0:	425b      	negs	r3, r3
 8003cc2:	68fa      	ldr	r2, [r7, #12]
 8003cc4:	18d3      	adds	r3, r2, r3
 8003cc6:	60fb      	str	r3, [r7, #12]

		/* This casting is to keep the compiler from issuing warnings. */
		pxLink = ( void * ) puc;
 8003cc8:	68fb      	ldr	r3, [r7, #12]
 8003cca:	60bb      	str	r3, [r7, #8]

		/* Check the block is actually allocated. */
		configASSERT( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 );
 8003ccc:	68bb      	ldr	r3, [r7, #8]
 8003cce:	685a      	ldr	r2, [r3, #4]
 8003cd0:	4b18      	ldr	r3, [pc, #96]	; (8003d34 <vPortFree+0x88>)
 8003cd2:	681b      	ldr	r3, [r3, #0]
 8003cd4:	4013      	ands	r3, r2
 8003cd6:	d101      	bne.n	8003cdc <vPortFree+0x30>
 8003cd8:	b672      	cpsid	i
 8003cda:	e7fe      	b.n	8003cda <vPortFree+0x2e>
		configASSERT( pxLink->pxNextFreeBlock == NULL );
 8003cdc:	68bb      	ldr	r3, [r7, #8]
 8003cde:	681b      	ldr	r3, [r3, #0]
 8003ce0:	2b00      	cmp	r3, #0
 8003ce2:	d001      	beq.n	8003ce8 <vPortFree+0x3c>
 8003ce4:	b672      	cpsid	i
 8003ce6:	e7fe      	b.n	8003ce6 <vPortFree+0x3a>

		if( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 )
 8003ce8:	68bb      	ldr	r3, [r7, #8]
 8003cea:	685a      	ldr	r2, [r3, #4]
 8003cec:	4b11      	ldr	r3, [pc, #68]	; (8003d34 <vPortFree+0x88>)
 8003cee:	681b      	ldr	r3, [r3, #0]
 8003cf0:	4013      	ands	r3, r2
 8003cf2:	d01a      	beq.n	8003d2a <vPortFree+0x7e>
		{
			if( pxLink->pxNextFreeBlock == NULL )
 8003cf4:	68bb      	ldr	r3, [r7, #8]
 8003cf6:	681b      	ldr	r3, [r3, #0]
 8003cf8:	2b00      	cmp	r3, #0
 8003cfa:	d116      	bne.n	8003d2a <vPortFree+0x7e>
			{
				/* The block is being returned to the heap - it is no longer
				allocated. */
				pxLink->xBlockSize &= ~xBlockAllocatedBit;
 8003cfc:	68bb      	ldr	r3, [r7, #8]
 8003cfe:	685a      	ldr	r2, [r3, #4]
 8003d00:	4b0c      	ldr	r3, [pc, #48]	; (8003d34 <vPortFree+0x88>)
 8003d02:	681b      	ldr	r3, [r3, #0]
 8003d04:	43db      	mvns	r3, r3
 8003d06:	401a      	ands	r2, r3
 8003d08:	68bb      	ldr	r3, [r7, #8]
 8003d0a:	605a      	str	r2, [r3, #4]

				vTaskSuspendAll();
 8003d0c:	f7fe feca 	bl	8002aa4 <vTaskSuspendAll>
				{
					/* Add this block to the list of free blocks. */
					xFreeBytesRemaining += pxLink->xBlockSize;
 8003d10:	68bb      	ldr	r3, [r7, #8]
 8003d12:	685a      	ldr	r2, [r3, #4]
 8003d14:	4b08      	ldr	r3, [pc, #32]	; (8003d38 <vPortFree+0x8c>)
 8003d16:	681b      	ldr	r3, [r3, #0]
 8003d18:	18d2      	adds	r2, r2, r3
 8003d1a:	4b07      	ldr	r3, [pc, #28]	; (8003d38 <vPortFree+0x8c>)
 8003d1c:	601a      	str	r2, [r3, #0]
					traceFREE( pv, pxLink->xBlockSize );
					prvInsertBlockIntoFreeList( ( ( BlockLink_t * ) pxLink ) );
 8003d1e:	68bb      	ldr	r3, [r7, #8]
 8003d20:	0018      	movs	r0, r3
 8003d22:	f000 f86b 	bl	8003dfc <prvInsertBlockIntoFreeList>
				}
				( void ) xTaskResumeAll();
 8003d26:	f7fe fec9 	bl	8002abc <xTaskResumeAll>
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}
	}
}
 8003d2a:	46c0      	nop			; (mov r8, r8)
 8003d2c:	46bd      	mov	sp, r7
 8003d2e:	b004      	add	sp, #16
 8003d30:	bd80      	pop	{r7, pc}
 8003d32:	46c0      	nop			; (mov r8, r8)
 8003d34:	2000192c 	.word	0x2000192c
 8003d38:	20001924 	.word	0x20001924

08003d3c <prvHeapInit>:
	/* This just exists to keep the linker quiet. */
}
/*-----------------------------------------------------------*/

static void prvHeapInit( void )
{
 8003d3c:	b580      	push	{r7, lr}
 8003d3e:	b084      	sub	sp, #16
 8003d40:	af00      	add	r7, sp, #0
BlockLink_t *pxFirstFreeBlock;
uint8_t *pucAlignedHeap;
size_t uxAddress;
size_t xTotalHeapSize = configTOTAL_HEAP_SIZE;
 8003d42:	23c0      	movs	r3, #192	; 0xc0
 8003d44:	011b      	lsls	r3, r3, #4
 8003d46:	60bb      	str	r3, [r7, #8]

	/* Ensure the heap starts on a correctly aligned boundary. */
	uxAddress = ( size_t ) ucHeap;
 8003d48:	4b26      	ldr	r3, [pc, #152]	; (8003de4 <prvHeapInit+0xa8>)
 8003d4a:	60fb      	str	r3, [r7, #12]

	if( ( uxAddress & portBYTE_ALIGNMENT_MASK ) != 0 )
 8003d4c:	68fb      	ldr	r3, [r7, #12]
 8003d4e:	2207      	movs	r2, #7
 8003d50:	4013      	ands	r3, r2
 8003d52:	d00c      	beq.n	8003d6e <prvHeapInit+0x32>
	{
		uxAddress += ( portBYTE_ALIGNMENT - 1 );
 8003d54:	68fb      	ldr	r3, [r7, #12]
 8003d56:	3307      	adds	r3, #7
 8003d58:	60fb      	str	r3, [r7, #12]
		uxAddress &= ~( ( size_t ) portBYTE_ALIGNMENT_MASK );
 8003d5a:	68fb      	ldr	r3, [r7, #12]
 8003d5c:	2207      	movs	r2, #7
 8003d5e:	4393      	bics	r3, r2
 8003d60:	60fb      	str	r3, [r7, #12]
		xTotalHeapSize -= uxAddress - ( size_t ) ucHeap;
 8003d62:	68ba      	ldr	r2, [r7, #8]
 8003d64:	68fb      	ldr	r3, [r7, #12]
 8003d66:	1ad2      	subs	r2, r2, r3
 8003d68:	4b1e      	ldr	r3, [pc, #120]	; (8003de4 <prvHeapInit+0xa8>)
 8003d6a:	18d3      	adds	r3, r2, r3
 8003d6c:	60bb      	str	r3, [r7, #8]
	}

	pucAlignedHeap = ( uint8_t * ) uxAddress;
 8003d6e:	68fb      	ldr	r3, [r7, #12]
 8003d70:	607b      	str	r3, [r7, #4]

	/* xStart is used to hold a pointer to the first item in the list of free
	blocks.  The void cast is used to prevent compiler warnings. */
	xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap;
 8003d72:	4b1d      	ldr	r3, [pc, #116]	; (8003de8 <prvHeapInit+0xac>)
 8003d74:	687a      	ldr	r2, [r7, #4]
 8003d76:	601a      	str	r2, [r3, #0]
	xStart.xBlockSize = ( size_t ) 0;
 8003d78:	4b1b      	ldr	r3, [pc, #108]	; (8003de8 <prvHeapInit+0xac>)
 8003d7a:	2200      	movs	r2, #0
 8003d7c:	605a      	str	r2, [r3, #4]

	/* pxEnd is used to mark the end of the list of free blocks and is inserted
	at the end of the heap space. */
	uxAddress = ( ( size_t ) pucAlignedHeap ) + xTotalHeapSize;
 8003d7e:	687b      	ldr	r3, [r7, #4]
 8003d80:	68ba      	ldr	r2, [r7, #8]
 8003d82:	18d3      	adds	r3, r2, r3
 8003d84:	60fb      	str	r3, [r7, #12]
	uxAddress -= xHeapStructSize;
 8003d86:	2208      	movs	r2, #8
 8003d88:	68fb      	ldr	r3, [r7, #12]
 8003d8a:	1a9b      	subs	r3, r3, r2
 8003d8c:	60fb      	str	r3, [r7, #12]
	uxAddress &= ~( ( size_t ) portBYTE_ALIGNMENT_MASK );
 8003d8e:	68fb      	ldr	r3, [r7, #12]
 8003d90:	2207      	movs	r2, #7
 8003d92:	4393      	bics	r3, r2
 8003d94:	60fb      	str	r3, [r7, #12]
	pxEnd = ( void * ) uxAddress;
 8003d96:	68fa      	ldr	r2, [r7, #12]
 8003d98:	4b14      	ldr	r3, [pc, #80]	; (8003dec <prvHeapInit+0xb0>)
 8003d9a:	601a      	str	r2, [r3, #0]
	pxEnd->xBlockSize = 0;
 8003d9c:	4b13      	ldr	r3, [pc, #76]	; (8003dec <prvHeapInit+0xb0>)
 8003d9e:	681b      	ldr	r3, [r3, #0]
 8003da0:	2200      	movs	r2, #0
 8003da2:	605a      	str	r2, [r3, #4]
	pxEnd->pxNextFreeBlock = NULL;
 8003da4:	4b11      	ldr	r3, [pc, #68]	; (8003dec <prvHeapInit+0xb0>)
 8003da6:	681b      	ldr	r3, [r3, #0]
 8003da8:	2200      	movs	r2, #0
 8003daa:	601a      	str	r2, [r3, #0]

	/* To start with there is a single free block that is sized to take up the
	entire heap space, minus the space taken by pxEnd. */
	pxFirstFreeBlock = ( void * ) pucAlignedHeap;
 8003dac:	687b      	ldr	r3, [r7, #4]
 8003dae:	603b      	str	r3, [r7, #0]
	pxFirstFreeBlock->xBlockSize = uxAddress - ( size_t ) pxFirstFreeBlock;
 8003db0:	683b      	ldr	r3, [r7, #0]
 8003db2:	68fa      	ldr	r2, [r7, #12]
 8003db4:	1ad2      	subs	r2, r2, r3
 8003db6:	683b      	ldr	r3, [r7, #0]
 8003db8:	605a      	str	r2, [r3, #4]
	pxFirstFreeBlock->pxNextFreeBlock = pxEnd;
 8003dba:	4b0c      	ldr	r3, [pc, #48]	; (8003dec <prvHeapInit+0xb0>)
 8003dbc:	681a      	ldr	r2, [r3, #0]
 8003dbe:	683b      	ldr	r3, [r7, #0]
 8003dc0:	601a      	str	r2, [r3, #0]

	/* Only one block exists - and it covers the entire usable heap space. */
	xMinimumEverFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
 8003dc2:	683b      	ldr	r3, [r7, #0]
 8003dc4:	685a      	ldr	r2, [r3, #4]
 8003dc6:	4b0a      	ldr	r3, [pc, #40]	; (8003df0 <prvHeapInit+0xb4>)
 8003dc8:	601a      	str	r2, [r3, #0]
	xFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
 8003dca:	683b      	ldr	r3, [r7, #0]
 8003dcc:	685a      	ldr	r2, [r3, #4]
 8003dce:	4b09      	ldr	r3, [pc, #36]	; (8003df4 <prvHeapInit+0xb8>)
 8003dd0:	601a      	str	r2, [r3, #0]

	/* Work out the position of the top bit in a size_t variable. */
	xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * heapBITS_PER_BYTE ) - 1 );
 8003dd2:	4b09      	ldr	r3, [pc, #36]	; (8003df8 <prvHeapInit+0xbc>)
 8003dd4:	2280      	movs	r2, #128	; 0x80
 8003dd6:	0612      	lsls	r2, r2, #24
 8003dd8:	601a      	str	r2, [r3, #0]
}
 8003dda:	46c0      	nop			; (mov r8, r8)
 8003ddc:	46bd      	mov	sp, r7
 8003dde:	b004      	add	sp, #16
 8003de0:	bd80      	pop	{r7, pc}
 8003de2:	46c0      	nop			; (mov r8, r8)
 8003de4:	20000d18 	.word	0x20000d18
 8003de8:	20001918 	.word	0x20001918
 8003dec:	20001920 	.word	0x20001920
 8003df0:	20001928 	.word	0x20001928
 8003df4:	20001924 	.word	0x20001924
 8003df8:	2000192c 	.word	0x2000192c

08003dfc <prvInsertBlockIntoFreeList>:
/*-----------------------------------------------------------*/

static void prvInsertBlockIntoFreeList( BlockLink_t *pxBlockToInsert )
{
 8003dfc:	b580      	push	{r7, lr}
 8003dfe:	b084      	sub	sp, #16
 8003e00:	af00      	add	r7, sp, #0
 8003e02:	6078      	str	r0, [r7, #4]
BlockLink_t *pxIterator;
uint8_t *puc;

	/* Iterate through the list until a block is found that has a higher address
	than the block being inserted. */
	for( pxIterator = &xStart; pxIterator->pxNextFreeBlock < pxBlockToInsert; pxIterator = pxIterator->pxNextFreeBlock )
 8003e04:	4b27      	ldr	r3, [pc, #156]	; (8003ea4 <prvInsertBlockIntoFreeList+0xa8>)
 8003e06:	60fb      	str	r3, [r7, #12]
 8003e08:	e002      	b.n	8003e10 <prvInsertBlockIntoFreeList+0x14>
 8003e0a:	68fb      	ldr	r3, [r7, #12]
 8003e0c:	681b      	ldr	r3, [r3, #0]
 8003e0e:	60fb      	str	r3, [r7, #12]
 8003e10:	68fb      	ldr	r3, [r7, #12]
 8003e12:	681b      	ldr	r3, [r3, #0]
 8003e14:	687a      	ldr	r2, [r7, #4]
 8003e16:	429a      	cmp	r2, r3
 8003e18:	d8f7      	bhi.n	8003e0a <prvInsertBlockIntoFreeList+0xe>
		/* Nothing to do here, just iterate to the right position. */
	}

	/* Do the block being inserted, and the block it is being inserted after
	make a contiguous block of memory? */
	puc = ( uint8_t * ) pxIterator;
 8003e1a:	68fb      	ldr	r3, [r7, #12]
 8003e1c:	60bb      	str	r3, [r7, #8]
	if( ( puc + pxIterator->xBlockSize ) == ( uint8_t * ) pxBlockToInsert )
 8003e1e:	68fb      	ldr	r3, [r7, #12]
 8003e20:	685b      	ldr	r3, [r3, #4]
 8003e22:	68ba      	ldr	r2, [r7, #8]
 8003e24:	18d3      	adds	r3, r2, r3
 8003e26:	687a      	ldr	r2, [r7, #4]
 8003e28:	429a      	cmp	r2, r3
 8003e2a:	d108      	bne.n	8003e3e <prvInsertBlockIntoFreeList+0x42>
	{
		pxIterator->xBlockSize += pxBlockToInsert->xBlockSize;
 8003e2c:	68fb      	ldr	r3, [r7, #12]
 8003e2e:	685a      	ldr	r2, [r3, #4]
 8003e30:	687b      	ldr	r3, [r7, #4]
 8003e32:	685b      	ldr	r3, [r3, #4]
 8003e34:	18d2      	adds	r2, r2, r3
 8003e36:	68fb      	ldr	r3, [r7, #12]
 8003e38:	605a      	str	r2, [r3, #4]
		pxBlockToInsert = pxIterator;
 8003e3a:	68fb      	ldr	r3, [r7, #12]
 8003e3c:	607b      	str	r3, [r7, #4]
		mtCOVERAGE_TEST_MARKER();
	}

	/* Do the block being inserted, and the block it is being inserted before
	make a contiguous block of memory? */
	puc = ( uint8_t * ) pxBlockToInsert;
 8003e3e:	687b      	ldr	r3, [r7, #4]
 8003e40:	60bb      	str	r3, [r7, #8]
	if( ( puc + pxBlockToInsert->xBlockSize ) == ( uint8_t * ) pxIterator->pxNextFreeBlock )
 8003e42:	687b      	ldr	r3, [r7, #4]
 8003e44:	685b      	ldr	r3, [r3, #4]
 8003e46:	68ba      	ldr	r2, [r7, #8]
 8003e48:	18d2      	adds	r2, r2, r3
 8003e4a:	68fb      	ldr	r3, [r7, #12]
 8003e4c:	681b      	ldr	r3, [r3, #0]
 8003e4e:	429a      	cmp	r2, r3
 8003e50:	d118      	bne.n	8003e84 <prvInsertBlockIntoFreeList+0x88>
	{
		if( pxIterator->pxNextFreeBlock != pxEnd )
 8003e52:	68fb      	ldr	r3, [r7, #12]
 8003e54:	681a      	ldr	r2, [r3, #0]
 8003e56:	4b14      	ldr	r3, [pc, #80]	; (8003ea8 <prvInsertBlockIntoFreeList+0xac>)
 8003e58:	681b      	ldr	r3, [r3, #0]
 8003e5a:	429a      	cmp	r2, r3
 8003e5c:	d00d      	beq.n	8003e7a <prvInsertBlockIntoFreeList+0x7e>
		{
			/* Form one big block from the two blocks. */
			pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize;
 8003e5e:	687b      	ldr	r3, [r7, #4]
 8003e60:	685a      	ldr	r2, [r3, #4]
 8003e62:	68fb      	ldr	r3, [r7, #12]
 8003e64:	681b      	ldr	r3, [r3, #0]
 8003e66:	685b      	ldr	r3, [r3, #4]
 8003e68:	18d2      	adds	r2, r2, r3
 8003e6a:	687b      	ldr	r3, [r7, #4]
 8003e6c:	605a      	str	r2, [r3, #4]
			pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock->pxNextFreeBlock;
 8003e6e:	68fb      	ldr	r3, [r7, #12]
 8003e70:	681b      	ldr	r3, [r3, #0]
 8003e72:	681a      	ldr	r2, [r3, #0]
 8003e74:	687b      	ldr	r3, [r7, #4]
 8003e76:	601a      	str	r2, [r3, #0]
 8003e78:	e008      	b.n	8003e8c <prvInsertBlockIntoFreeList+0x90>
		}
		else
		{
			pxBlockToInsert->pxNextFreeBlock = pxEnd;
 8003e7a:	4b0b      	ldr	r3, [pc, #44]	; (8003ea8 <prvInsertBlockIntoFreeList+0xac>)
 8003e7c:	681a      	ldr	r2, [r3, #0]
 8003e7e:	687b      	ldr	r3, [r7, #4]
 8003e80:	601a      	str	r2, [r3, #0]
 8003e82:	e003      	b.n	8003e8c <prvInsertBlockIntoFreeList+0x90>
		}
	}
	else
	{
		pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
 8003e84:	68fb      	ldr	r3, [r7, #12]
 8003e86:	681a      	ldr	r2, [r3, #0]
 8003e88:	687b      	ldr	r3, [r7, #4]
 8003e8a:	601a      	str	r2, [r3, #0]

	/* If the block being inserted plugged a gab, so was merged with the block
	before and the block after, then it's pxNextFreeBlock pointer will have
	already been set, and should not be set here as that would make it point
	to itself. */
	if( pxIterator != pxBlockToInsert )
 8003e8c:	68fa      	ldr	r2, [r7, #12]
 8003e8e:	687b      	ldr	r3, [r7, #4]
 8003e90:	429a      	cmp	r2, r3
 8003e92:	d002      	beq.n	8003e9a <prvInsertBlockIntoFreeList+0x9e>
	{
		pxIterator->pxNextFreeBlock = pxBlockToInsert;
 8003e94:	68fb      	ldr	r3, [r7, #12]
 8003e96:	687a      	ldr	r2, [r7, #4]
 8003e98:	601a      	str	r2, [r3, #0]
	}
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}
}
 8003e9a:	46c0      	nop			; (mov r8, r8)
 8003e9c:	46bd      	mov	sp, r7
 8003e9e:	b004      	add	sp, #16
 8003ea0:	bd80      	pop	{r7, pc}
 8003ea2:	46c0      	nop			; (mov r8, r8)
 8003ea4:	20001918 	.word	0x20001918
 8003ea8:	20001920 	.word	0x20001920

08003eac <__libc_init_array>:
 8003eac:	b570      	push	{r4, r5, r6, lr}
 8003eae:	2600      	movs	r6, #0
 8003eb0:	4d0c      	ldr	r5, [pc, #48]	; (8003ee4 <__libc_init_array+0x38>)
 8003eb2:	4c0d      	ldr	r4, [pc, #52]	; (8003ee8 <__libc_init_array+0x3c>)
 8003eb4:	1b64      	subs	r4, r4, r5
 8003eb6:	10a4      	asrs	r4, r4, #2
 8003eb8:	42a6      	cmp	r6, r4
 8003eba:	d109      	bne.n	8003ed0 <__libc_init_array+0x24>
 8003ebc:	2600      	movs	r6, #0
 8003ebe:	f000 f82b 	bl	8003f18 <_init>
 8003ec2:	4d0a      	ldr	r5, [pc, #40]	; (8003eec <__libc_init_array+0x40>)
 8003ec4:	4c0a      	ldr	r4, [pc, #40]	; (8003ef0 <__libc_init_array+0x44>)
 8003ec6:	1b64      	subs	r4, r4, r5
 8003ec8:	10a4      	asrs	r4, r4, #2
 8003eca:	42a6      	cmp	r6, r4
 8003ecc:	d105      	bne.n	8003eda <__libc_init_array+0x2e>
 8003ece:	bd70      	pop	{r4, r5, r6, pc}
 8003ed0:	00b3      	lsls	r3, r6, #2
 8003ed2:	58eb      	ldr	r3, [r5, r3]
 8003ed4:	4798      	blx	r3
 8003ed6:	3601      	adds	r6, #1
 8003ed8:	e7ee      	b.n	8003eb8 <__libc_init_array+0xc>
 8003eda:	00b3      	lsls	r3, r6, #2
 8003edc:	58eb      	ldr	r3, [r5, r3]
 8003ede:	4798      	blx	r3
 8003ee0:	3601      	adds	r6, #1
 8003ee2:	e7f2      	b.n	8003eca <__libc_init_array+0x1e>
 8003ee4:	08003fbc 	.word	0x08003fbc
 8003ee8:	08003fbc 	.word	0x08003fbc
 8003eec:	08003fbc 	.word	0x08003fbc
 8003ef0:	08003fc0 	.word	0x08003fc0

08003ef4 <memcpy>:
 8003ef4:	2300      	movs	r3, #0
 8003ef6:	b510      	push	{r4, lr}
 8003ef8:	429a      	cmp	r2, r3
 8003efa:	d100      	bne.n	8003efe <memcpy+0xa>
 8003efc:	bd10      	pop	{r4, pc}
 8003efe:	5ccc      	ldrb	r4, [r1, r3]
 8003f00:	54c4      	strb	r4, [r0, r3]
 8003f02:	3301      	adds	r3, #1
 8003f04:	e7f8      	b.n	8003ef8 <memcpy+0x4>

08003f06 <memset>:
 8003f06:	0003      	movs	r3, r0
 8003f08:	1812      	adds	r2, r2, r0
 8003f0a:	4293      	cmp	r3, r2
 8003f0c:	d100      	bne.n	8003f10 <memset+0xa>
 8003f0e:	4770      	bx	lr
 8003f10:	7019      	strb	r1, [r3, #0]
 8003f12:	3301      	adds	r3, #1
 8003f14:	e7f9      	b.n	8003f0a <memset+0x4>
	...

08003f18 <_init>:
 8003f18:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 8003f1a:	46c0      	nop			; (mov r8, r8)
 8003f1c:	bcf8      	pop	{r3, r4, r5, r6, r7}
 8003f1e:	bc08      	pop	{r3}
 8003f20:	469e      	mov	lr, r3
 8003f22:	4770      	bx	lr

08003f24 <_fini>:
 8003f24:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 8003f26:	46c0      	nop			; (mov r8, r8)
 8003f28:	bcf8      	pop	{r3, r4, r5, r6, r7}
 8003f2a:	bc08      	pop	{r3}
 8003f2c:	469e      	mov	lr, r3
 8003f2e:	4770      	bx	lr