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1 [PreviousGenFiles]
2 AdvancedFolderStructure=true
3 HeaderFileListSize=3
4 HeaderFiles#0=F:/IoT/STM32/workspace/STM32Test/Core/Inc/stm32f0xx_it.h
5 HeaderFiles#1=F:/IoT/STM32/workspace/STM32Test/Core/Inc/stm32f0xx_hal_conf.h
6 HeaderFiles#2=F:/IoT/STM32/workspace/STM32Test/Core/Inc/main.h
7 HeaderFolderListSize=1
8 HeaderPath#0=F:/IoT/STM32/workspace/STM32Test/Core/Inc
9 HeaderFiles=;
10 SourceFileListSize=3
11 SourceFiles#0=F:/IoT/STM32/workspace/STM32Test/Core/Src/stm32f0xx_it.c
12 SourceFiles#1=F:/IoT/STM32/workspace/STM32Test/Core/Src/stm32f0xx_hal_msp.c
13 SourceFiles#2=F:/IoT/STM32/workspace/STM32Test/Core/Src/main.c
14 SourceFolderListSize=1
15 SourcePath#0=F:/IoT/STM32/workspace/STM32Test/Core/Src
16 SourceFiles=;
17
18 [PreviousLibFiles]
19 LibFiles=Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h;Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h;Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h;Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f030x8.h;Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h;Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h;Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/system_stm32f0xx.c;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/tz_context.h;
20
21 [PreviousUsedCubeIDEFiles]
22 SourceFiles=Core\Src\main.c;Core\Src\stm32f0xx_it.c;Core\Src\stm32f0xx_hal_msp.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c;Core\Src/system_stm32f0xx.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c;Core\Src/system_stm32f0xx.c;Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/system_stm32f0xx.c;;
23 HeaderPath=Drivers\STM32F0xx_HAL_Driver\Inc;Drivers\STM32F0xx_HAL_Driver\Inc\Legacy;Drivers\CMSIS\Device\ST\STM32F0xx\Include;Drivers\CMSIS\Include;Core\Inc;
24 CDefines=USE_HAL_DRIVER;STM32F030x8;USE_HAL_DRIVER;USE_HAL_DRIVER;
25
1 <?xml version="1.0" encoding="UTF-8"?>
2 <projectDescription>
3 <name>STM32Test</name>
4 <comment></comment>
5 <projects>
6 </projects>
7 <buildSpec>
8 <buildCommand>
9 <name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
10 <triggers>clean,full,incremental,</triggers>
11 <arguments>
12 </arguments>
13 </buildCommand>
14 <buildCommand>
15 <name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
16 <triggers>full,incremental,</triggers>
17 <arguments>
18 </arguments>
19 </buildCommand>
20 </buildSpec>
21 <natures>
22 <nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
23 <nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
24 <nature>org.eclipse.cdt.core.cnature</nature>
25 <nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
26 <nature>com.st.stm32cube.ide.mcu.MCUAdvancedStructureProjectNature</nature>
27 <nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
28 <nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
29 <nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
30 <nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
31 <nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
32 </natures>
33 </projectDescription>
1 <?xml version="1.0" encoding="UTF-8" standalone="no"?>
2 <project>
3 <configuration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.338277118" name="Debug">
4 <extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
5 <provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
6 <provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
7 <provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
8 <provider copy-of="extension" id="org.eclipse.cdt.managedbuilder.core.GCCBuildCommandParser"/>
9 <provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="175442219548387224" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
10 <language-scope id="org.eclipse.cdt.core.gcc"/>
11 <language-scope id="org.eclipse.cdt.core.g++"/>
12 </provider>
13 </extension>
14 </configuration>
15 <configuration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.922454081" name="Release">
16 <extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
17 <provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
18 <provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
19 <provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
20 <provider copy-of="extension" id="org.eclipse.cdt.managedbuilder.core.GCCBuildCommandParser"/>
21 <provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="175442219548387224" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
22 <language-scope id="org.eclipse.cdt.core.gcc"/>
23 <language-scope id="org.eclipse.cdt.core.g++"/>
24 </provider>
25 </extension>
26 </configuration>
27 </project>
1 /* USER CODE BEGIN Header */
2 /**
3 ******************************************************************************
4 * @file : main.h
5 * @brief : Header for main.c file.
6 * This file contains the common defines of the application.
7 ******************************************************************************
8 * @attention
9 *
10 * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
11 * All rights reserved.</center></h2>
12 *
13 * This software component is licensed by ST under BSD 3-Clause license,
14 * the "License"; You may not use this file except in compliance with the
15 * License. You may obtain a copy of the License at:
16 * opensource.org/licenses/BSD-3-Clause
17 *
18 ******************************************************************************
19 */
20 /* USER CODE END Header */
21
22 /* Define to prevent recursive inclusion -------------------------------------*/
23 #ifndef __MAIN_H
24 #define __MAIN_H
25
26 #ifdef __cplusplus
27 extern "C" {
28 #endif
29
30 /* Includes ------------------------------------------------------------------*/
31 #include "stm32f0xx_hal.h"
32
33 /* Private includes ----------------------------------------------------------*/
34 /* USER CODE BEGIN Includes */
35
36 /* USER CODE END Includes */
37
38 /* Exported types ------------------------------------------------------------*/
39 /* USER CODE BEGIN ET */
40
41 /* USER CODE END ET */
42
43 /* Exported constants --------------------------------------------------------*/
44 /* USER CODE BEGIN EC */
45
46 /* USER CODE END EC */
47
48 /* Exported macro ------------------------------------------------------------*/
49 /* USER CODE BEGIN EM */
50
51 /* USER CODE END EM */
52
53 /* Exported functions prototypes ---------------------------------------------*/
54 void Error_Handler(void);
55
56 /* USER CODE BEGIN EFP */
57
58 /* USER CODE END EFP */
59
60 /* Private defines -----------------------------------------------------------*/
61 /* USER CODE BEGIN Private defines */
62
63 /* USER CODE END Private defines */
64
65 #ifdef __cplusplus
66 }
67 #endif
68
69 #endif /* __MAIN_H */
70
71 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
1 /* USER CODE BEGIN Header */
2 /**
3 ******************************************************************************
4 * @file stm32f0xx_it.h
5 * @brief This file contains the headers of the interrupt handlers.
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
10 * All rights reserved.</center></h2>
11 *
12 * This software component is licensed by ST under BSD 3-Clause license,
13 * the "License"; You may not use this file except in compliance with the
14 * License. You may obtain a copy of the License at:
15 * opensource.org/licenses/BSD-3-Clause
16 *
17 ******************************************************************************
18 */
19 /* USER CODE END Header */
20
21 /* Define to prevent recursive inclusion -------------------------------------*/
22 #ifndef __STM32F0xx_IT_H
23 #define __STM32F0xx_IT_H
24
25 #ifdef __cplusplus
26 extern "C" {
27 #endif
28
29 /* Private includes ----------------------------------------------------------*/
30 /* USER CODE BEGIN Includes */
31
32 /* USER CODE END Includes */
33
34 /* Exported types ------------------------------------------------------------*/
35 /* USER CODE BEGIN ET */
36
37 /* USER CODE END ET */
38
39 /* Exported constants --------------------------------------------------------*/
40 /* USER CODE BEGIN EC */
41
42 /* USER CODE END EC */
43
44 /* Exported macro ------------------------------------------------------------*/
45 /* USER CODE BEGIN EM */
46
47 /* USER CODE END EM */
48
49 /* Exported functions prototypes ---------------------------------------------*/
50 void NMI_Handler(void);
51 void HardFault_Handler(void);
52 void SVC_Handler(void);
53 void PendSV_Handler(void);
54 void SysTick_Handler(void);
55 /* USER CODE BEGIN EFP */
56
57 /* USER CODE END EFP */
58
59 #ifdef __cplusplus
60 }
61 #endif
62
63 #endif /* __STM32F0xx_IT_H */
64
65 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
1 /* USER CODE BEGIN Header */
2 /**
3 ******************************************************************************
4 * @file : main.c
5 * @brief : Main program body
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
10 * All rights reserved.</center></h2>
11 *
12 * This software component is licensed by ST under BSD 3-Clause license,
13 * the "License"; You may not use this file except in compliance with the
14 * License. You may obtain a copy of the License at:
15 * opensource.org/licenses/BSD-3-Clause
16 *
17 ******************************************************************************
18 */
19 /* USER CODE END Header */
20
21 /* Includes ------------------------------------------------------------------*/
22 #include "main.h"
23
24 /* Private includes ----------------------------------------------------------*/
25 /* USER CODE BEGIN Includes */
26
27 /* USER CODE END Includes */
28
29 /* Private typedef -----------------------------------------------------------*/
30 /* USER CODE BEGIN PTD */
31
32 /* USER CODE END PTD */
33
34 /* Private define ------------------------------------------------------------*/
35 /* USER CODE BEGIN PD */
36 /* USER CODE END PD */
37
38 /* Private macro -------------------------------------------------------------*/
39 /* USER CODE BEGIN PM */
40
41 /* USER CODE END PM */
42
43 /* Private variables ---------------------------------------------------------*/
44
45 /* USER CODE BEGIN PV */
46
47 /* USER CODE END PV */
48
49 /* Private function prototypes -----------------------------------------------*/
50 void SystemClock_Config(void);
51 /* USER CODE BEGIN PFP */
52
53 /* USER CODE END PFP */
54
55 /* Private user code ---------------------------------------------------------*/
56 /* USER CODE BEGIN 0 */
57
58 /* USER CODE END 0 */
59
60 /**
61 * @brief The application entry point.
62 * @retval int
63 */
64 int main(void)
65 {
66 /* USER CODE BEGIN 1 */
67
68 /* USER CODE END 1 */
69
70
71 /* MCU Configuration--------------------------------------------------------*/
72
73 /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
74 HAL_Init();
75
76 /* USER CODE BEGIN Init */
77
78 /* USER CODE END Init */
79
80 /* Configure the system clock */
81 SystemClock_Config();
82
83 /* USER CODE BEGIN SysInit */
84
85 /* USER CODE END SysInit */
86
87 /* Initialize all configured peripherals */
88 /* USER CODE BEGIN 2 */
89
90 /* USER CODE END 2 */
91
92 /* Infinite loop */
93 /* USER CODE BEGIN WHILE */
94 while (1)
95 {
96 /* USER CODE END WHILE */
97
98 /* USER CODE BEGIN 3 */
99 }
100 /* USER CODE END 3 */
101 }
102
103 /**
104 * @brief System Clock Configuration
105 * @retval None
106 */
107 void SystemClock_Config(void)
108 {
109 RCC_OscInitTypeDef RCC_OscInitStruct = {0};
110 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
111
112 /** Initializes the CPU, AHB and APB busses clocks
113 */
114 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
115 RCC_OscInitStruct.HSIState = RCC_HSI_ON;
116 RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
117 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
118 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
119 {
120 Error_Handler();
121 }
122 /** Initializes the CPU, AHB and APB busses clocks
123 */
124 RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
125 |RCC_CLOCKTYPE_PCLK1;
126 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI;
127 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
128 RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
129
130 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
131 {
132 Error_Handler();
133 }
134 }
135
136 /* USER CODE BEGIN 4 */
137
138 /* USER CODE END 4 */
139
140 /**
141 * @brief This function is executed in case of error occurrence.
142 * @retval None
143 */
144 void Error_Handler(void)
145 {
146 /* USER CODE BEGIN Error_Handler_Debug */
147 /* User can add his own implementation to report the HAL error return state */
148
149 /* USER CODE END Error_Handler_Debug */
150 }
151
152 #ifdef USE_FULL_ASSERT
153 /**
154 * @brief Reports the name of the source file and the source line number
155 * where the assert_param error has occurred.
156 * @param file: pointer to the source file name
157 * @param line: assert_param error line source number
158 * @retval None
159 */
160 void assert_failed(char *file, uint32_t line)
161 {
162 /* USER CODE BEGIN 6 */
163 /* User can add his own implementation to report the file name and line number,
164 tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
165 /* USER CODE END 6 */
166 }
167 #endif /* USE_FULL_ASSERT */
168
169 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
1 /* USER CODE BEGIN Header */
2 /**
3 ******************************************************************************
4 * File Name : stm32f0xx_hal_msp.c
5 * Description : This file provides code for the MSP Initialization
6 * and de-Initialization codes.
7 ******************************************************************************
8 * @attention
9 *
10 * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
11 * All rights reserved.</center></h2>
12 *
13 * This software component is licensed by ST under BSD 3-Clause license,
14 * the "License"; You may not use this file except in compliance with the
15 * License. You may obtain a copy of the License at:
16 * opensource.org/licenses/BSD-3-Clause
17 *
18 ******************************************************************************
19 */
20 /* USER CODE END Header */
21
22 /* Includes ------------------------------------------------------------------*/
23 #include "main.h"
24 /* USER CODE BEGIN Includes */
25
26 /* USER CODE END Includes */
27
28 /* Private typedef -----------------------------------------------------------*/
29 /* USER CODE BEGIN TD */
30
31 /* USER CODE END TD */
32
33 /* Private define ------------------------------------------------------------*/
34 /* USER CODE BEGIN Define */
35
36 /* USER CODE END Define */
37
38 /* Private macro -------------------------------------------------------------*/
39 /* USER CODE BEGIN Macro */
40
41 /* USER CODE END Macro */
42
43 /* Private variables ---------------------------------------------------------*/
44 /* USER CODE BEGIN PV */
45
46 /* USER CODE END PV */
47
48 /* Private function prototypes -----------------------------------------------*/
49 /* USER CODE BEGIN PFP */
50
51 /* USER CODE END PFP */
52
53 /* External functions --------------------------------------------------------*/
54 /* USER CODE BEGIN ExternalFunctions */
55
56 /* USER CODE END ExternalFunctions */
57
58 /* USER CODE BEGIN 0 */
59
60 /* USER CODE END 0 */
61 /**
62 * Initializes the Global MSP.
63 */
64 void HAL_MspInit(void)
65 {
66 /* USER CODE BEGIN MspInit 0 */
67
68 /* USER CODE END MspInit 0 */
69
70 __HAL_RCC_SYSCFG_CLK_ENABLE();
71 __HAL_RCC_PWR_CLK_ENABLE();
72
73 /* System interrupt init*/
74
75 /* USER CODE BEGIN MspInit 1 */
76
77 /* USER CODE END MspInit 1 */
78 }
79
80 /* USER CODE BEGIN 1 */
81
82 /* USER CODE END 1 */
83
84 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
1 /* USER CODE BEGIN Header */
2 /**
3 ******************************************************************************
4 * @file stm32f0xx_it.c
5 * @brief Interrupt Service Routines.
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
10 * All rights reserved.</center></h2>
11 *
12 * This software component is licensed by ST under BSD 3-Clause license,
13 * the "License"; You may not use this file except in compliance with the
14 * License. You may obtain a copy of the License at:
15 * opensource.org/licenses/BSD-3-Clause
16 *
17 ******************************************************************************
18 */
19 /* USER CODE END Header */
20
21 /* Includes ------------------------------------------------------------------*/
22 #include "main.h"
23 #include "stm32f0xx_it.h"
24 /* Private includes ----------------------------------------------------------*/
25 /* USER CODE BEGIN Includes */
26 /* USER CODE END Includes */
27
28 /* Private typedef -----------------------------------------------------------*/
29 /* USER CODE BEGIN TD */
30
31 /* USER CODE END TD */
32
33 /* Private define ------------------------------------------------------------*/
34 /* USER CODE BEGIN PD */
35
36 /* USER CODE END PD */
37
38 /* Private macro -------------------------------------------------------------*/
39 /* USER CODE BEGIN PM */
40
41 /* USER CODE END PM */
42
43 /* Private variables ---------------------------------------------------------*/
44 /* USER CODE BEGIN PV */
45
46 /* USER CODE END PV */
47
48 /* Private function prototypes -----------------------------------------------*/
49 /* USER CODE BEGIN PFP */
50
51 /* USER CODE END PFP */
52
53 /* Private user code ---------------------------------------------------------*/
54 /* USER CODE BEGIN 0 */
55
56 /* USER CODE END 0 */
57
58 /* External variables --------------------------------------------------------*/
59
60 /* USER CODE BEGIN EV */
61
62 /* USER CODE END EV */
63
64 /******************************************************************************/
65 /* Cortex-M0 Processor Interruption and Exception Handlers */
66 /******************************************************************************/
67 /**
68 * @brief This function handles Non maskable interrupt.
69 */
70 void NMI_Handler(void)
71 {
72 /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
73
74 /* USER CODE END NonMaskableInt_IRQn 0 */
75 /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
76
77 /* USER CODE END NonMaskableInt_IRQn 1 */
78 }
79
80 /**
81 * @brief This function handles Hard fault interrupt.
82 */
83 void HardFault_Handler(void)
84 {
85 /* USER CODE BEGIN HardFault_IRQn 0 */
86
87 /* USER CODE END HardFault_IRQn 0 */
88 while (1)
89 {
90 /* USER CODE BEGIN W1_HardFault_IRQn 0 */
91 /* USER CODE END W1_HardFault_IRQn 0 */
92 }
93 }
94
95 /**
96 * @brief This function handles System service call via SWI instruction.
97 */
98 void SVC_Handler(void)
99 {
100 /* USER CODE BEGIN SVC_IRQn 0 */
101
102 /* USER CODE END SVC_IRQn 0 */
103 /* USER CODE BEGIN SVC_IRQn 1 */
104
105 /* USER CODE END SVC_IRQn 1 */
106 }
107
108 /**
109 * @brief This function handles Pendable request for system service.
110 */
111 void PendSV_Handler(void)
112 {
113 /* USER CODE BEGIN PendSV_IRQn 0 */
114
115 /* USER CODE END PendSV_IRQn 0 */
116 /* USER CODE BEGIN PendSV_IRQn 1 */
117
118 /* USER CODE END PendSV_IRQn 1 */
119 }
120
121 /**
122 * @brief This function handles System tick timer.
123 */
124 void SysTick_Handler(void)
125 {
126 /* USER CODE BEGIN SysTick_IRQn 0 */
127
128 /* USER CODE END SysTick_IRQn 0 */
129 HAL_IncTick();
130 /* USER CODE BEGIN SysTick_IRQn 1 */
131
132 /* USER CODE END SysTick_IRQn 1 */
133 }
134
135 /******************************************************************************/
136 /* STM32F0xx Peripheral Interrupt Handlers */
137 /* Add here the Interrupt Handlers for the used peripherals. */
138 /* For the available peripheral interrupt handler names, */
139 /* please refer to the startup file (startup_stm32f0xx.s). */
140 /******************************************************************************/
141
142 /* USER CODE BEGIN 1 */
143
144 /* USER CODE END 1 */
145 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
1 /**
2 *****************************************************************************
3 **
4 ** File : syscalls.c
5 **
6 ** Author : Auto-generated by STM32CubeIDE
7 **
8 ** Abstract : STM32CubeIDE Minimal System calls file
9 **
10 ** For more information about which c-functions
11 ** need which of these lowlevel functions
12 ** please consult the Newlib libc-manual
13 **
14 ** Environment : STM32CubeIDE MCU
15 **
16 ** Distribution: The file is distributed as is, without any warranty
17 ** of any kind.
18 **
19 *****************************************************************************
20 **
21 ** <h2><center>&copy; COPYRIGHT(c) 2018 STMicroelectronics</center></h2>
22 **
23 ** Redistribution and use in source and binary forms, with or without modification,
24 ** are permitted provided that the following conditions are met:
25 ** 1. Redistributions of source code must retain the above copyright notice,
26 ** this list of conditions and the following disclaimer.
27 ** 2. Redistributions in binary form must reproduce the above copyright notice,
28 ** this list of conditions and the following disclaimer in the documentation
29 ** and/or other materials provided with the distribution.
30 ** 3. Neither the name of STMicroelectronics nor the names of its contributors
31 ** may be used to endorse or promote products derived from this software
32 ** without specific prior written permission.
33 **
34 ** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
35 ** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
36 ** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
37 ** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
38 ** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
39 ** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
40 ** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
41 ** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
42 ** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
43 ** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
44 **
45 **
46 *****************************************************************************
47 */
48
49 /* Includes */
50 #include <sys/stat.h>
51 #include <stdlib.h>
52 #include <errno.h>
53 #include <stdio.h>
54 #include <signal.h>
55 #include <time.h>
56 #include <sys/time.h>
57 #include <sys/times.h>
58
59
60 /* Variables */
61 //#undef errno
62 extern int errno;
63 extern int __io_putchar(int ch) __attribute__((weak));
64 extern int __io_getchar(void) __attribute__((weak));
65
66 register char * stack_ptr asm("sp");
67
68 char *__env[1] = { 0 };
69 char **environ = __env;
70
71
72 /* Functions */
73 void initialise_monitor_handles()
74 {
75 }
76
77 int _getpid(void)
78 {
79 return 1;
80 }
81
82 int _kill(int pid, int sig)
83 {
84 errno = EINVAL;
85 return -1;
86 }
87
88 void _exit (int status)
89 {
90 _kill(status, -1);
91 while (1) {} /* Make sure we hang here */
92 }
93
94 __attribute__((weak)) int _read(int file, char *ptr, int len)
95 {
96 int DataIdx;
97
98 for (DataIdx = 0; DataIdx < len; DataIdx++)
99 {
100 *ptr++ = __io_getchar();
101 }
102
103 return len;
104 }
105
106 __attribute__((weak)) int _write(int file, char *ptr, int len)
107 {
108 int DataIdx;
109
110 for (DataIdx = 0; DataIdx < len; DataIdx++)
111 {
112 __io_putchar(*ptr++);
113 }
114 return len;
115 }
116
117 int _close(int file)
118 {
119 return -1;
120 }
121
122
123 int _fstat(int file, struct stat *st)
124 {
125 st->st_mode = S_IFCHR;
126 return 0;
127 }
128
129 int _isatty(int file)
130 {
131 return 1;
132 }
133
134 int _lseek(int file, int ptr, int dir)
135 {
136 return 0;
137 }
138
139 int _open(char *path, int flags, ...)
140 {
141 /* Pretend like we always fail */
142 return -1;
143 }
144
145 int _wait(int *status)
146 {
147 errno = ECHILD;
148 return -1;
149 }
150
151 int _unlink(char *name)
152 {
153 errno = ENOENT;
154 return -1;
155 }
156
157 int _times(struct tms *buf)
158 {
159 return -1;
160 }
161
162 int _stat(char *file, struct stat *st)
163 {
164 st->st_mode = S_IFCHR;
165 return 0;
166 }
167
168 int _link(char *old, char *new)
169 {
170 errno = EMLINK;
171 return -1;
172 }
173
174 int _fork(void)
175 {
176 errno = EAGAIN;
177 return -1;
178 }
179
180 int _execve(char *name, char **argv, char **env)
181 {
182 errno = ENOMEM;
183 return -1;
184 }
1 /**
2 *****************************************************************************
3 **
4 ** File : sysmem.c
5 **
6 ** Author : Auto-generated by STM32CubeIDE
7 **
8 ** Abstract : STM32CubeIDE Minimal System Memory calls file
9 **
10 ** For more information about which c-functions
11 ** need which of these lowlevel functions
12 ** please consult the Newlib libc-manual
13 **
14 ** Environment : STM32CubeIDE MCU
15 **
16 ** Distribution: The file is distributed as is, without any warranty
17 ** of any kind.
18 **
19 *****************************************************************************
20 **
21 ** <h2><center>&copy; COPYRIGHT(c) 2018 STMicroelectronics</center></h2>
22 **
23 ** Redistribution and use in source and binary forms, with or without modification,
24 ** are permitted provided that the following conditions are met:
25 ** 1. Redistributions of source code must retain the above copyright notice,
26 ** this list of conditions and the following disclaimer.
27 ** 2. Redistributions in binary form must reproduce the above copyright notice,
28 ** this list of conditions and the following disclaimer in the documentation
29 ** and/or other materials provided with the distribution.
30 ** 3. Neither the name of STMicroelectronics nor the names of its contributors
31 ** may be used to endorse or promote products derived from this software
32 ** without specific prior written permission.
33 **
34 ** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
35 ** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
36 ** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
37 ** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
38 ** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
39 ** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
40 ** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
41 ** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
42 ** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
43 ** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
44 **
45 **
46 *****************************************************************************
47 */
48
49 /* Includes */
50 #include <errno.h>
51 #include <stdio.h>
52
53 /* Variables */
54 extern int errno;
55 register char * stack_ptr asm("sp");
56
57 /* Functions */
58
59 /**
60 _sbrk
61 Increase program data space. Malloc and related functions depend on this
62 **/
63 caddr_t _sbrk(int incr)
64 {
65 extern char end asm("end");
66 static char *heap_end;
67 char *prev_heap_end;
68
69 if (heap_end == 0)
70 heap_end = &end;
71
72 prev_heap_end = heap_end;
73 if (heap_end + incr > stack_ptr)
74 {
75 errno = ENOMEM;
76 return (caddr_t) -1;
77 }
78
79 heap_end += incr;
80
81 return (caddr_t) prev_heap_end;
82 }
83
1 /**
2 ******************************************************************************
3 * @file system_stm32f0xx.c
4 * @author MCD Application Team
5 * @brief CMSIS Cortex-M0 Device Peripheral Access Layer System Source File.
6 *
7 * 1. This file provides two functions and one global variable to be called from
8 * user application:
9 * - SystemInit(): This function is called at startup just after reset and
10 * before branch to main program. This call is made inside
11 * the "startup_stm32f0xx.s" file.
12 *
13 * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
14 * by the user application to setup the SysTick
15 * timer or configure other parameters.
16 *
17 * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
18 * be called whenever the core clock is changed
19 * during program execution.
20 *
21 * 2. After each device reset the HSI (8 MHz) is used as system clock source.
22 * Then SystemInit() function is called, in "startup_stm32f0xx.s" file, to
23 * configure the system clock before to branch to main program.
24 *
25 * 3. This file configures the system clock as follows:
26 *=============================================================================
27 * Supported STM32F0xx device
28 *-----------------------------------------------------------------------------
29 * System Clock source | HSI
30 *-----------------------------------------------------------------------------
31 * SYSCLK(Hz) | 8000000
32 *-----------------------------------------------------------------------------
33 * HCLK(Hz) | 8000000
34 *-----------------------------------------------------------------------------
35 * AHB Prescaler | 1
36 *-----------------------------------------------------------------------------
37 * APB1 Prescaler | 1
38 *-----------------------------------------------------------------------------
39 *=============================================================================
40 ******************************************************************************
41 * @attention
42 *
43 * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
44 * All rights reserved.</center></h2>
45 *
46 * This software component is licensed by ST under BSD 3-Clause license,
47 * the "License"; You may not use this file except in compliance with the
48 * License. You may obtain a copy of the License at:
49 * opensource.org/licenses/BSD-3-Clause
50 *
51 ******************************************************************************
52 */
53
54 /** @addtogroup CMSIS
55 * @{
56 */
57
58 /** @addtogroup stm32f0xx_system
59 * @{
60 */
61
62 /** @addtogroup STM32F0xx_System_Private_Includes
63 * @{
64 */
65
66 #include "stm32f0xx.h"
67
68 /**
69 * @}
70 */
71
72 /** @addtogroup STM32F0xx_System_Private_TypesDefinitions
73 * @{
74 */
75
76 /**
77 * @}
78 */
79
80 /** @addtogroup STM32F0xx_System_Private_Defines
81 * @{
82 */
83 #if !defined (HSE_VALUE)
84 #define HSE_VALUE ((uint32_t)8000000) /*!< Default value of the External oscillator in Hz.
85 This value can be provided and adapted by the user application. */
86 #endif /* HSE_VALUE */
87
88 #if !defined (HSI_VALUE)
89 #define HSI_VALUE ((uint32_t)8000000) /*!< Default value of the Internal oscillator in Hz.
90 This value can be provided and adapted by the user application. */
91 #endif /* HSI_VALUE */
92
93 #if !defined (HSI48_VALUE)
94 #define HSI48_VALUE ((uint32_t)48000000) /*!< Default value of the HSI48 Internal oscillator in Hz.
95 This value can be provided and adapted by the user application. */
96 #endif /* HSI48_VALUE */
97 /**
98 * @}
99 */
100
101 /** @addtogroup STM32F0xx_System_Private_Macros
102 * @{
103 */
104
105 /**
106 * @}
107 */
108
109 /** @addtogroup STM32F0xx_System_Private_Variables
110 * @{
111 */
112 /* This variable is updated in three ways:
113 1) by calling CMSIS function SystemCoreClockUpdate()
114 2) by calling HAL API function HAL_RCC_GetHCLKFreq()
115 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
116 Note: If you use this function to configure the system clock there is no need to
117 call the 2 first functions listed above, since SystemCoreClock variable is
118 updated automatically.
119 */
120 uint32_t SystemCoreClock = 8000000;
121
122 const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
123 const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4};
124
125 /**
126 * @}
127 */
128
129 /** @addtogroup STM32F0xx_System_Private_FunctionPrototypes
130 * @{
131 */
132
133 /**
134 * @}
135 */
136
137 /** @addtogroup STM32F0xx_System_Private_Functions
138 * @{
139 */
140
141 /**
142 * @brief Setup the microcontroller system.
143 * @param None
144 * @retval None
145 */
146 void SystemInit(void)
147 {
148 /* NOTE :SystemInit(): This function is called at startup just after reset and
149 before branch to main program. This call is made inside
150 the "startup_stm32f0xx.s" file.
151 User can setups the default system clock (System clock source, PLL Multiplier
152 and Divider factors, AHB/APBx prescalers and Flash settings).
153 */
154 }
155
156 /**
157 * @brief Update SystemCoreClock variable according to Clock Register Values.
158 * The SystemCoreClock variable contains the core clock (HCLK), it can
159 * be used by the user application to setup the SysTick timer or configure
160 * other parameters.
161 *
162 * @note Each time the core clock (HCLK) changes, this function must be called
163 * to update SystemCoreClock variable value. Otherwise, any configuration
164 * based on this variable will be incorrect.
165 *
166 * @note - The system frequency computed by this function is not the real
167 * frequency in the chip. It is calculated based on the predefined
168 * constant and the selected clock source:
169 *
170 * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
171 *
172 * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
173 *
174 * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
175 * or HSI_VALUE(*) multiplied/divided by the PLL factors.
176 *
177 * (*) HSI_VALUE is a constant defined in stm32f0xx_hal.h file (default value
178 * 8 MHz) but the real value may vary depending on the variations
179 * in voltage and temperature.
180 *
181 * (**) HSE_VALUE is a constant defined in stm32f0xx_hal.h file (default value
182 * 8 MHz), user has to ensure that HSE_VALUE is same as the real
183 * frequency of the crystal used. Otherwise, this function may
184 * have wrong result.
185 *
186 * - The result of this function could be not correct when using fractional
187 * value for HSE crystal.
188 *
189 * @param None
190 * @retval None
191 */
192 void SystemCoreClockUpdate (void)
193 {
194 uint32_t tmp = 0, pllmull = 0, pllsource = 0, predivfactor = 0;
195
196 /* Get SYSCLK source -------------------------------------------------------*/
197 tmp = RCC->CFGR & RCC_CFGR_SWS;
198
199 switch (tmp)
200 {
201 case RCC_CFGR_SWS_HSI: /* HSI used as system clock */
202 SystemCoreClock = HSI_VALUE;
203 break;
204 case RCC_CFGR_SWS_HSE: /* HSE used as system clock */
205 SystemCoreClock = HSE_VALUE;
206 break;
207 case RCC_CFGR_SWS_PLL: /* PLL used as system clock */
208 /* Get PLL clock source and multiplication factor ----------------------*/
209 pllmull = RCC->CFGR & RCC_CFGR_PLLMUL;
210 pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
211 pllmull = ( pllmull >> 18) + 2;
212 predivfactor = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1;
213
214 if (pllsource == RCC_CFGR_PLLSRC_HSE_PREDIV)
215 {
216 /* HSE used as PLL clock source : SystemCoreClock = HSE/PREDIV * PLLMUL */
217 SystemCoreClock = (HSE_VALUE/predivfactor) * pllmull;
218 }
219 #if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F091xC) || defined(STM32F098xx)
220 else if (pllsource == RCC_CFGR_PLLSRC_HSI48_PREDIV)
221 {
222 /* HSI48 used as PLL clock source : SystemCoreClock = HSI48/PREDIV * PLLMUL */
223 SystemCoreClock = (HSI48_VALUE/predivfactor) * pllmull;
224 }
225 #endif /* STM32F042x6 || STM32F048xx || STM32F072xB || STM32F078xx || STM32F091xC || STM32F098xx */
226 else
227 {
228 #if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F070x6) \
229 || defined(STM32F078xx) || defined(STM32F071xB) || defined(STM32F072xB) \
230 || defined(STM32F070xB) || defined(STM32F091xC) || defined(STM32F098xx) || defined(STM32F030xC)
231 /* HSI used as PLL clock source : SystemCoreClock = HSI/PREDIV * PLLMUL */
232 SystemCoreClock = (HSI_VALUE/predivfactor) * pllmull;
233 #else
234 /* HSI used as PLL clock source : SystemCoreClock = HSI/2 * PLLMUL */
235 SystemCoreClock = (HSI_VALUE >> 1) * pllmull;
236 #endif /* STM32F042x6 || STM32F048xx || STM32F070x6 ||
237 STM32F071xB || STM32F072xB || STM32F078xx || STM32F070xB ||
238 STM32F091xC || STM32F098xx || STM32F030xC */
239 }
240 break;
241 default: /* HSI used as system clock */
242 SystemCoreClock = HSI_VALUE;
243 break;
244 }
245 /* Compute HCLK clock frequency ----------------*/
246 /* Get HCLK prescaler */
247 tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
248 /* HCLK clock frequency */
249 SystemCoreClock >>= tmp;
250 }
251
252 /**
253 * @}
254 */
255
256 /**
257 * @}
258 */
259
260 /**
261 * @}
262 */
263
264 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
265
1 /**
2 ******************************************************************************
3 * @file startup_stm32f030x8.s
4 * @author MCD Application Team
5 * @brief STM32F030x8 devices vector table for GCC toolchain.
6 * This module performs:
7 * - Set the initial SP
8 * - Set the initial PC == Reset_Handler,
9 * - Set the vector table entries with the exceptions ISR address
10 * - Branches to main in the C library (which eventually
11 * calls main()).
12 * After Reset the Cortex-M0 processor is in Thread mode,
13 * priority is Privileged, and the Stack is set to Main.
14 ******************************************************************************
15 * @attention
16 *
17 * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
18 * All rights reserved.</center></h2>
19 *
20 * This software component is licensed by ST under BSD 3-Clause license,
21 * the "License"; You may not use this file except in compliance with the
22 * License. You may obtain a copy of the License at:
23 * opensource.org/licenses/BSD-3-Clause
24 *
25 ******************************************************************************
26 */
27
28 .syntax unified
29 .cpu cortex-m0
30 .fpu softvfp
31 .thumb
32
33 .global g_pfnVectors
34 .global Default_Handler
35
36 /* start address for the initialization values of the .data section.
37 defined in linker script */
38 .word _sidata
39 /* start address for the .data section. defined in linker script */
40 .word _sdata
41 /* end address for the .data section. defined in linker script */
42 .word _edata
43 /* start address for the .bss section. defined in linker script */
44 .word _sbss
45 /* end address for the .bss section. defined in linker script */
46 .word _ebss
47
48 .section .text.Reset_Handler
49 .weak Reset_Handler
50 .type Reset_Handler, %function
51 Reset_Handler:
52 ldr r0, =_estack
53 mov sp, r0 /* set stack pointer */
54
55 /* Copy the data segment initializers from flash to SRAM */
56 ldr r0, =_sdata
57 ldr r1, =_edata
58 ldr r2, =_sidata
59 movs r3, #0
60 b LoopCopyDataInit
61
62 CopyDataInit:
63 ldr r4, [r2, r3]
64 str r4, [r0, r3]
65 adds r3, r3, #4
66
67 LoopCopyDataInit:
68 adds r4, r0, r3
69 cmp r4, r1
70 bcc CopyDataInit
71
72 /* Zero fill the bss segment. */
73 ldr r2, =_sbss
74 ldr r4, =_ebss
75 movs r3, #0
76 b LoopFillZerobss
77
78 FillZerobss:
79 str r3, [r2]
80 adds r2, r2, #4
81
82 LoopFillZerobss:
83 cmp r2, r4
84 bcc FillZerobss
85
86 /* Call the clock system intitialization function.*/
87 bl SystemInit
88 /* Call static constructors */
89 bl __libc_init_array
90 /* Call the application's entry point.*/
91 bl main
92
93 LoopForever:
94 b LoopForever
95
96
97 .size Reset_Handler, .-Reset_Handler
98
99 /**
100 * @brief This is the code that gets called when the processor receives an
101 * unexpected interrupt. This simply enters an infinite loop, preserving
102 * the system state for examination by a debugger.
103 *
104 * @param None
105 * @retval : None
106 */
107 .section .text.Default_Handler,"ax",%progbits
108 Default_Handler:
109 Infinite_Loop:
110 b Infinite_Loop
111 .size Default_Handler, .-Default_Handler
112 /******************************************************************************
113 *
114 * The minimal vector table for a Cortex M0. Note that the proper constructs
115 * must be placed on this to ensure that it ends up at physical address
116 * 0x0000.0000.
117 *
118 ******************************************************************************/
119 .section .isr_vector,"a",%progbits
120 .type g_pfnVectors, %object
121 .size g_pfnVectors, .-g_pfnVectors
122
123
124 g_pfnVectors:
125 .word _estack
126 .word Reset_Handler
127 .word NMI_Handler
128 .word HardFault_Handler
129 .word 0
130 .word 0
131 .word 0
132 .word 0
133 .word 0
134 .word 0
135 .word 0
136 .word SVC_Handler
137 .word 0
138 .word 0
139 .word PendSV_Handler
140 .word SysTick_Handler
141 .word WWDG_IRQHandler /* Window WatchDog */
142 .word 0 /* Reserved */
143 .word RTC_IRQHandler /* RTC through the EXTI line */
144 .word FLASH_IRQHandler /* FLASH */
145 .word RCC_IRQHandler /* RCC */
146 .word EXTI0_1_IRQHandler /* EXTI Line 0 and 1 */
147 .word EXTI2_3_IRQHandler /* EXTI Line 2 and 3 */
148 .word EXTI4_15_IRQHandler /* EXTI Line 4 to 15 */
149 .word 0 /* Reserved */
150 .word DMA1_Channel1_IRQHandler /* DMA1 Channel 1 */
151 .word DMA1_Channel2_3_IRQHandler /* DMA1 Channel 2 and Channel 3 */
152 .word DMA1_Channel4_5_IRQHandler /* DMA1 Channel 4 and Channel 5 */
153 .word ADC1_IRQHandler /* ADC1 */
154 .word TIM1_BRK_UP_TRG_COM_IRQHandler /* TIM1 Break, Update, Trigger and Commutation */
155 .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
156 .word 0 /* Reserved */
157 .word TIM3_IRQHandler /* TIM3 */
158 .word TIM6_IRQHandler /* TIM6 */
159 .word 0 /* Reserved */
160 .word TIM14_IRQHandler /* TIM14 */
161 .word TIM15_IRQHandler /* TIM15 */
162 .word TIM16_IRQHandler /* TIM16 */
163 .word TIM17_IRQHandler /* TIM17 */
164 .word I2C1_IRQHandler /* I2C1 */
165 .word I2C2_IRQHandler /* I2C2 */
166 .word SPI1_IRQHandler /* SPI1 */
167 .word SPI2_IRQHandler /* SPI2 */
168 .word USART1_IRQHandler /* USART1 */
169 .word USART2_IRQHandler /* USART2 */
170 .word 0 /* Reserved */
171 .word 0 /* Reserved */
172 .word 0 /* Reserved */
173
174 /*******************************************************************************
175 *
176 * Provide weak aliases for each Exception handler to the Default_Handler.
177 * As they are weak aliases, any function with the same name will override
178 * this definition.
179 *
180 *******************************************************************************/
181
182 .weak NMI_Handler
183 .thumb_set NMI_Handler,Default_Handler
184
185 .weak HardFault_Handler
186 .thumb_set HardFault_Handler,Default_Handler
187
188 .weak SVC_Handler
189 .thumb_set SVC_Handler,Default_Handler
190
191 .weak PendSV_Handler
192 .thumb_set PendSV_Handler,Default_Handler
193
194 .weak SysTick_Handler
195 .thumb_set SysTick_Handler,Default_Handler
196
197 .weak WWDG_IRQHandler
198 .thumb_set WWDG_IRQHandler,Default_Handler
199
200 .weak RTC_IRQHandler
201 .thumb_set RTC_IRQHandler,Default_Handler
202
203 .weak FLASH_IRQHandler
204 .thumb_set FLASH_IRQHandler,Default_Handler
205
206 .weak RCC_IRQHandler
207 .thumb_set RCC_IRQHandler,Default_Handler
208
209 .weak EXTI0_1_IRQHandler
210 .thumb_set EXTI0_1_IRQHandler,Default_Handler
211
212 .weak EXTI2_3_IRQHandler
213 .thumb_set EXTI2_3_IRQHandler,Default_Handler
214
215 .weak EXTI4_15_IRQHandler
216 .thumb_set EXTI4_15_IRQHandler,Default_Handler
217
218 .weak DMA1_Channel1_IRQHandler
219 .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
220
221 .weak DMA1_Channel2_3_IRQHandler
222 .thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler
223
224 .weak DMA1_Channel4_5_IRQHandler
225 .thumb_set DMA1_Channel4_5_IRQHandler,Default_Handler
226
227 .weak ADC1_IRQHandler
228 .thumb_set ADC1_IRQHandler,Default_Handler
229
230 .weak TIM1_BRK_UP_TRG_COM_IRQHandler
231 .thumb_set TIM1_BRK_UP_TRG_COM_IRQHandler,Default_Handler
232
233 .weak TIM1_CC_IRQHandler
234 .thumb_set TIM1_CC_IRQHandler,Default_Handler
235
236 .weak TIM3_IRQHandler
237 .thumb_set TIM3_IRQHandler,Default_Handler
238
239 .weak TIM6_IRQHandler
240 .thumb_set TIM6_IRQHandler,Default_Handler
241
242 .weak TIM14_IRQHandler
243 .thumb_set TIM14_IRQHandler,Default_Handler
244
245 .weak TIM15_IRQHandler
246 .thumb_set TIM15_IRQHandler,Default_Handler
247
248 .weak TIM16_IRQHandler
249 .thumb_set TIM16_IRQHandler,Default_Handler
250
251 .weak TIM17_IRQHandler
252 .thumb_set TIM17_IRQHandler,Default_Handler
253
254 .weak I2C1_IRQHandler
255 .thumb_set I2C1_IRQHandler,Default_Handler
256
257 .weak I2C2_IRQHandler
258 .thumb_set I2C2_IRQHandler,Default_Handler
259
260 .weak SPI1_IRQHandler
261 .thumb_set SPI1_IRQHandler,Default_Handler
262
263 .weak SPI2_IRQHandler
264 .thumb_set SPI2_IRQHandler,Default_Handler
265
266 .weak USART1_IRQHandler
267 .thumb_set USART1_IRQHandler,Default_Handler
268
269 .weak USART2_IRQHandler
270 .thumb_set USART2_IRQHandler,Default_Handler
271
272 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
273
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1 /**
2 ******************************************************************************
3 * @file stm32f0xx.h
4 * @author MCD Application Team
5 * @brief CMSIS STM32F0xx Device Peripheral Access Layer Header File.
6 *
7 * The file is the unique include file that the application programmer
8 * is using in the C source code, usually in main.c. This file contains:
9 * - Configuration section that allows to select:
10 * - The STM32F0xx device used in the target application
11 * - To use or not the peripheral’s drivers in application code(i.e.
12 * code will be based on direct access to peripheral’s registers
13 * rather than drivers API), this option is controlled by
14 * "#define USE_HAL_DRIVER"
15 *
16 ******************************************************************************
17 * @attention
18 *
19 * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
20 * All rights reserved.</center></h2>
21 *
22 * This software component is licensed by ST under BSD 3-Clause license,
23 * the "License"; You may not use this file except in compliance with the
24 * License. You may obtain a copy of the License at:
25 * opensource.org/licenses/BSD-3-Clause
26 *
27 ******************************************************************************
28 */
29
30 /** @addtogroup CMSIS
31 * @{
32 */
33
34 /** @addtogroup stm32f0xx
35 * @{
36 */
37
38 #ifndef __STM32F0xx_H
39 #define __STM32F0xx_H
40
41 #ifdef __cplusplus
42 extern "C" {
43 #endif /* __cplusplus */
44
45 /** @addtogroup Library_configuration_section
46 * @{
47 */
48
49 /**
50 * @brief STM32 Family
51 */
52 #if !defined (STM32F0)
53 #define STM32F0
54 #endif /* STM32F0 */
55
56 /* Uncomment the line below according to the target STM32 device used in your
57 application
58 */
59
60 #if !defined (STM32F030x6) && !defined (STM32F030x8) && \
61 !defined (STM32F031x6) && !defined (STM32F038xx) && \
62 !defined (STM32F042x6) && !defined (STM32F048xx) && !defined (STM32F070x6) && \
63 !defined (STM32F051x8) && !defined (STM32F058xx) && \
64 !defined (STM32F071xB) && !defined (STM32F072xB) && !defined (STM32F078xx) && !defined (STM32F070xB) && \
65 !defined (STM32F091xC) && !defined (STM32F098xx) && !defined (STM32F030xC)
66 /* #define STM32F030x6 */ /*!< STM32F030x4, STM32F030x6 Devices (STM32F030xx microcontrollers where the Flash memory ranges between 16 and 32 Kbytes) */
67 /* #define STM32F030x8 */ /*!< STM32F030x8 Devices (STM32F030xx microcontrollers where the Flash memory is 64 Kbytes) */
68 /* #define STM32F031x6 */ /*!< STM32F031x4, STM32F031x6 Devices (STM32F031xx microcontrollers where the Flash memory ranges between 16 and 32 Kbytes) */
69 /* #define STM32F038xx */ /*!< STM32F038xx Devices (STM32F038xx microcontrollers where the Flash memory is 32 Kbytes) */
70 /* #define STM32F042x6 */ /*!< STM32F042x4, STM32F042x6 Devices (STM32F042xx microcontrollers where the Flash memory ranges between 16 and 32 Kbytes) */
71 /* #define STM32F048x6 */ /*!< STM32F048xx Devices (STM32F042xx microcontrollers where the Flash memory is 32 Kbytes) */
72 /* #define STM32F051x8 */ /*!< STM32F051x4, STM32F051x6, STM32F051x8 Devices (STM32F051xx microcontrollers where the Flash memory ranges between 16 and 64 Kbytes) */
73 /* #define STM32F058xx */ /*!< STM32F058xx Devices (STM32F058xx microcontrollers where the Flash memory is 64 Kbytes) */
74 /* #define STM32F070x6 */ /*!< STM32F070x6 Devices (STM32F070x6 microcontrollers where the Flash memory ranges between 16 and 32 Kbytes) */
75 /* #define STM32F070xB */ /*!< STM32F070xB Devices (STM32F070xB microcontrollers where the Flash memory ranges between 64 and 128 Kbytes) */
76 /* #define STM32F071xB */ /*!< STM32F071x8, STM32F071xB Devices (STM32F071xx microcontrollers where the Flash memory ranges between 64 and 128 Kbytes) */
77 /* #define STM32F072xB */ /*!< STM32F072x8, STM32F072xB Devices (STM32F072xx microcontrollers where the Flash memory ranges between 64 and 128 Kbytes) */
78 /* #define STM32F078xx */ /*!< STM32F078xx Devices (STM32F078xx microcontrollers where the Flash memory is 128 Kbytes) */
79 /* #define STM32F030xC */ /*!< STM32F030xC Devices (STM32F030xC microcontrollers where the Flash memory is 256 Kbytes) */
80 /* #define STM32F091xC */ /*!< STM32F091xB, STM32F091xC Devices (STM32F091xx microcontrollers where the Flash memory ranges between 128 and 256 Kbytes) */
81 /* #define STM32F098xx */ /*!< STM32F098xx Devices (STM32F098xx microcontrollers where the Flash memory is 256 Kbytes) */
82 #endif
83
84 /* Tip: To avoid modifying this file each time you need to switch between these
85 devices, you can define the device in your toolchain compiler preprocessor.
86 */
87 #if !defined (USE_HAL_DRIVER)
88 /**
89 * @brief Comment the line below if you will not use the peripherals drivers.
90 In this case, these drivers will not be included and the application code will
91 be based on direct access to peripherals registers
92 */
93 /*#define USE_HAL_DRIVER */
94 #endif /* USE_HAL_DRIVER */
95
96 /**
97 * @brief CMSIS Device version number V2.3.4
98 */
99 #define __STM32F0_DEVICE_VERSION_MAIN (0x02) /*!< [31:24] main version */
100 #define __STM32F0_DEVICE_VERSION_SUB1 (0x03) /*!< [23:16] sub1 version */
101 #define __STM32F0_DEVICE_VERSION_SUB2 (0x04) /*!< [15:8] sub2 version */
102 #define __STM32F0_DEVICE_VERSION_RC (0x00) /*!< [7:0] release candidate */
103 #define __STM32F0_DEVICE_VERSION ((__STM32F0_DEVICE_VERSION_MAIN << 24)\
104 |(__STM32F0_DEVICE_VERSION_SUB1 << 16)\
105 |(__STM32F0_DEVICE_VERSION_SUB2 << 8 )\
106 |(__STM32F0_DEVICE_VERSION_RC))
107
108 /**
109 * @}
110 */
111
112 /** @addtogroup Device_Included
113 * @{
114 */
115
116 #if defined(STM32F030x6)
117 #include "stm32f030x6.h"
118 #elif defined(STM32F030x8)
119 #include "stm32f030x8.h"
120 #elif defined(STM32F031x6)
121 #include "stm32f031x6.h"
122 #elif defined(STM32F038xx)
123 #include "stm32f038xx.h"
124 #elif defined(STM32F042x6)
125 #include "stm32f042x6.h"
126 #elif defined(STM32F048xx)
127 #include "stm32f048xx.h"
128 #elif defined(STM32F051x8)
129 #include "stm32f051x8.h"
130 #elif defined(STM32F058xx)
131 #include "stm32f058xx.h"
132 #elif defined(STM32F070x6)
133 #include "stm32f070x6.h"
134 #elif defined(STM32F070xB)
135 #include "stm32f070xb.h"
136 #elif defined(STM32F071xB)
137 #include "stm32f071xb.h"
138 #elif defined(STM32F072xB)
139 #include "stm32f072xb.h"
140 #elif defined(STM32F078xx)
141 #include "stm32f078xx.h"
142 #elif defined(STM32F091xC)
143 #include "stm32f091xc.h"
144 #elif defined(STM32F098xx)
145 #include "stm32f098xx.h"
146 #elif defined(STM32F030xC)
147 #include "stm32f030xc.h"
148 #else
149 #error "Please select first the target STM32F0xx device used in your application (in stm32f0xx.h file)"
150 #endif
151
152 /**
153 * @}
154 */
155
156 /** @addtogroup Exported_types
157 * @{
158 */
159 typedef enum
160 {
161 RESET = 0U,
162 SET = !RESET
163 } FlagStatus, ITStatus;
164
165 typedef enum
166 {
167 DISABLE = 0U,
168 ENABLE = !DISABLE
169 } FunctionalState;
170 #define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
171
172 typedef enum
173 {
174 SUCCESS = 0U,
175 ERROR = !SUCCESS
176 } ErrorStatus;
177
178 /**
179 * @}
180 */
181
182
183 /** @addtogroup Exported_macros
184 * @{
185 */
186 #define SET_BIT(REG, BIT) ((REG) |= (BIT))
187
188 #define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT))
189
190 #define READ_BIT(REG, BIT) ((REG) & (BIT))
191
192 #define CLEAR_REG(REG) ((REG) = (0x0))
193
194 #define WRITE_REG(REG, VAL) ((REG) = (VAL))
195
196 #define READ_REG(REG) ((REG))
197
198 #define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
199
200
201 /**
202 * @}
203 */
204
205 #if defined (USE_HAL_DRIVER)
206 #include "stm32f0xx_hal.h"
207 #endif /* USE_HAL_DRIVER */
208
209
210 #ifdef __cplusplus
211 }
212 #endif /* __cplusplus */
213
214 #endif /* __STM32F0xx_H */
215 /**
216 * @}
217 */
218
219 /**
220 * @}
221 */
222
223
224
225
226 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
1 /**
2 ******************************************************************************
3 * @file system_stm32f0xx.h
4 * @author MCD Application Team
5 * @brief CMSIS Cortex-M0 Device System Source File for STM32F0xx devices.
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
10 * All rights reserved.</center></h2>
11 *
12 * This software component is licensed by ST under BSD 3-Clause license,
13 * the "License"; You may not use this file except in compliance with the
14 * License. You may obtain a copy of the License at:
15 * opensource.org/licenses/BSD-3-Clause
16 *
17 ******************************************************************************
18 */
19
20 /** @addtogroup CMSIS
21 * @{
22 */
23
24 /** @addtogroup stm32f0xx_system
25 * @{
26 */
27
28 /**
29 * @brief Define to prevent recursive inclusion
30 */
31 #ifndef __SYSTEM_STM32F0XX_H
32 #define __SYSTEM_STM32F0XX_H
33
34 #ifdef __cplusplus
35 extern "C" {
36 #endif
37
38 /** @addtogroup STM32F0xx_System_Includes
39 * @{
40 */
41
42 /**
43 * @}
44 */
45
46
47 /** @addtogroup STM32F0xx_System_Exported_types
48 * @{
49 */
50 /* This variable is updated in three ways:
51 1) by calling CMSIS function SystemCoreClockUpdate()
52 3) by calling HAL API function HAL_RCC_GetHCLKFreq()
53 3) by calling HAL API function HAL_RCC_ClockConfig()
54 Note: If you use this function to configure the system clock; then there
55 is no need to call the 2 first functions listed above, since SystemCoreClock
56 variable is updated automatically.
57 */
58 extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
59 extern const uint8_t AHBPrescTable[16]; /*!< AHB prescalers table values */
60 extern const uint8_t APBPrescTable[8]; /*!< APB prescalers table values */
61
62 /**
63 * @}
64 */
65
66 /** @addtogroup STM32F0xx_System_Exported_Constants
67 * @{
68 */
69
70 /**
71 * @}
72 */
73
74 /** @addtogroup STM32F0xx_System_Exported_Macros
75 * @{
76 */
77
78 /**
79 * @}
80 */
81
82 /** @addtogroup STM32F0xx_System_Exported_Functions
83 * @{
84 */
85
86 extern void SystemInit(void);
87 extern void SystemCoreClockUpdate(void);
88 /**
89 * @}
90 */
91
92 #ifdef __cplusplus
93 }
94 #endif
95
96 #endif /*__SYSTEM_STM32F0XX_H */
97
98 /**
99 * @}
100 */
101
102 /**
103 * @}
104 */
105 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
1 /**************************************************************************//**
2 * @file cmsis_compiler.h
3 * @brief CMSIS compiler generic header file
4 * @version V5.0.4
5 * @date 10. January 2018
6 ******************************************************************************/
7 /*
8 * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
9 *
10 * SPDX-License-Identifier: Apache-2.0
11 *
12 * Licensed under the Apache License, Version 2.0 (the License); you may
13 * not use this file except in compliance with the License.
14 * You may obtain a copy of the License at
15 *
16 * www.apache.org/licenses/LICENSE-2.0
17 *
18 * Unless required by applicable law or agreed to in writing, software
19 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
20 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
21 * See the License for the specific language governing permissions and
22 * limitations under the License.
23 */
24
25 #ifndef __CMSIS_COMPILER_H
26 #define __CMSIS_COMPILER_H
27
28 #include <stdint.h>
29
30 /*
31 * Arm Compiler 4/5
32 */
33 #if defined ( __CC_ARM )
34 #include "cmsis_armcc.h"
35
36
37 /*
38 * Arm Compiler 6 (armclang)
39 */
40 #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
41 #include "cmsis_armclang.h"
42
43
44 /*
45 * GNU Compiler
46 */
47 #elif defined ( __GNUC__ )
48 #include "cmsis_gcc.h"
49
50
51 /*
52 * IAR Compiler
53 */
54 #elif defined ( __ICCARM__ )
55 #include <cmsis_iccarm.h>
56
57
58 /*
59 * TI Arm Compiler
60 */
61 #elif defined ( __TI_ARM__ )
62 #include <cmsis_ccs.h>
63
64 #ifndef __ASM
65 #define __ASM __asm
66 #endif
67 #ifndef __INLINE
68 #define __INLINE inline
69 #endif
70 #ifndef __STATIC_INLINE
71 #define __STATIC_INLINE static inline
72 #endif
73 #ifndef __STATIC_FORCEINLINE
74 #define __STATIC_FORCEINLINE __STATIC_INLINE
75 #endif
76 #ifndef __NO_RETURN
77 #define __NO_RETURN __attribute__((noreturn))
78 #endif
79 #ifndef __USED
80 #define __USED __attribute__((used))
81 #endif
82 #ifndef __WEAK
83 #define __WEAK __attribute__((weak))
84 #endif
85 #ifndef __PACKED
86 #define __PACKED __attribute__((packed))
87 #endif
88 #ifndef __PACKED_STRUCT
89 #define __PACKED_STRUCT struct __attribute__((packed))
90 #endif
91 #ifndef __PACKED_UNION
92 #define __PACKED_UNION union __attribute__((packed))
93 #endif
94 #ifndef __UNALIGNED_UINT32 /* deprecated */
95 struct __attribute__((packed)) T_UINT32 { uint32_t v; };
96 #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
97 #endif
98 #ifndef __UNALIGNED_UINT16_WRITE
99 __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
100 #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void*)(addr))->v) = (val))
101 #endif
102 #ifndef __UNALIGNED_UINT16_READ
103 __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
104 #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
105 #endif
106 #ifndef __UNALIGNED_UINT32_WRITE
107 __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
108 #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
109 #endif
110 #ifndef __UNALIGNED_UINT32_READ
111 __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
112 #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
113 #endif
114 #ifndef __ALIGNED
115 #define __ALIGNED(x) __attribute__((aligned(x)))
116 #endif
117 #ifndef __RESTRICT
118 #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
119 #define __RESTRICT
120 #endif
121
122
123 /*
124 * TASKING Compiler
125 */
126 #elif defined ( __TASKING__ )
127 /*
128 * The CMSIS functions have been implemented as intrinsics in the compiler.
129 * Please use "carm -?i" to get an up to date list of all intrinsics,
130 * Including the CMSIS ones.
131 */
132
133 #ifndef __ASM
134 #define __ASM __asm
135 #endif
136 #ifndef __INLINE
137 #define __INLINE inline
138 #endif
139 #ifndef __STATIC_INLINE
140 #define __STATIC_INLINE static inline
141 #endif
142 #ifndef __STATIC_FORCEINLINE
143 #define __STATIC_FORCEINLINE __STATIC_INLINE
144 #endif
145 #ifndef __NO_RETURN
146 #define __NO_RETURN __attribute__((noreturn))
147 #endif
148 #ifndef __USED
149 #define __USED __attribute__((used))
150 #endif
151 #ifndef __WEAK
152 #define __WEAK __attribute__((weak))
153 #endif
154 #ifndef __PACKED
155 #define __PACKED __packed__
156 #endif
157 #ifndef __PACKED_STRUCT
158 #define __PACKED_STRUCT struct __packed__
159 #endif
160 #ifndef __PACKED_UNION
161 #define __PACKED_UNION union __packed__
162 #endif
163 #ifndef __UNALIGNED_UINT32 /* deprecated */
164 struct __packed__ T_UINT32 { uint32_t v; };
165 #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
166 #endif
167 #ifndef __UNALIGNED_UINT16_WRITE
168 __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
169 #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
170 #endif
171 #ifndef __UNALIGNED_UINT16_READ
172 __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
173 #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
174 #endif
175 #ifndef __UNALIGNED_UINT32_WRITE
176 __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
177 #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
178 #endif
179 #ifndef __UNALIGNED_UINT32_READ
180 __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
181 #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
182 #endif
183 #ifndef __ALIGNED
184 #define __ALIGNED(x) __align(x)
185 #endif
186 #ifndef __RESTRICT
187 #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
188 #define __RESTRICT
189 #endif
190
191
192 /*
193 * COSMIC Compiler
194 */
195 #elif defined ( __CSMC__ )
196 #include <cmsis_csm.h>
197
198 #ifndef __ASM
199 #define __ASM _asm
200 #endif
201 #ifndef __INLINE
202 #define __INLINE inline
203 #endif
204 #ifndef __STATIC_INLINE
205 #define __STATIC_INLINE static inline
206 #endif
207 #ifndef __STATIC_FORCEINLINE
208 #define __STATIC_FORCEINLINE __STATIC_INLINE
209 #endif
210 #ifndef __NO_RETURN
211 // NO RETURN is automatically detected hence no warning here
212 #define __NO_RETURN
213 #endif
214 #ifndef __USED
215 #warning No compiler specific solution for __USED. __USED is ignored.
216 #define __USED
217 #endif
218 #ifndef __WEAK
219 #define __WEAK __weak
220 #endif
221 #ifndef __PACKED
222 #define __PACKED @packed
223 #endif
224 #ifndef __PACKED_STRUCT
225 #define __PACKED_STRUCT @packed struct
226 #endif
227 #ifndef __PACKED_UNION
228 #define __PACKED_UNION @packed union
229 #endif
230 #ifndef __UNALIGNED_UINT32 /* deprecated */
231 @packed struct T_UINT32 { uint32_t v; };
232 #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
233 #endif
234 #ifndef __UNALIGNED_UINT16_WRITE
235 __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
236 #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
237 #endif
238 #ifndef __UNALIGNED_UINT16_READ
239 __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
240 #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
241 #endif
242 #ifndef __UNALIGNED_UINT32_WRITE
243 __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
244 #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
245 #endif
246 #ifndef __UNALIGNED_UINT32_READ
247 __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
248 #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
249 #endif
250 #ifndef __ALIGNED
251 #warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored.
252 #define __ALIGNED(x)
253 #endif
254 #ifndef __RESTRICT
255 #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
256 #define __RESTRICT
257 #endif
258
259
260 #else
261 #error Unknown compiler.
262 #endif
263
264
265 #endif /* __CMSIS_COMPILER_H */
266
1 /**************************************************************************//**
2 * @file cmsis_version.h
3 * @brief CMSIS Core(M) Version definitions
4 * @version V5.0.2
5 * @date 19. April 2017
6 ******************************************************************************/
7 /*
8 * Copyright (c) 2009-2017 ARM Limited. All rights reserved.
9 *
10 * SPDX-License-Identifier: Apache-2.0
11 *
12 * Licensed under the Apache License, Version 2.0 (the License); you may
13 * not use this file except in compliance with the License.
14 * You may obtain a copy of the License at
15 *
16 * www.apache.org/licenses/LICENSE-2.0
17 *
18 * Unless required by applicable law or agreed to in writing, software
19 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
20 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
21 * See the License for the specific language governing permissions and
22 * limitations under the License.
23 */
24
25 #if defined ( __ICCARM__ )
26 #pragma system_include /* treat file as system include file for MISRA check */
27 #elif defined (__clang__)
28 #pragma clang system_header /* treat file as system include file */
29 #endif
30
31 #ifndef __CMSIS_VERSION_H
32 #define __CMSIS_VERSION_H
33
34 /* CMSIS Version definitions */
35 #define __CM_CMSIS_VERSION_MAIN ( 5U) /*!< [31:16] CMSIS Core(M) main version */
36 #define __CM_CMSIS_VERSION_SUB ( 1U) /*!< [15:0] CMSIS Core(M) sub version */
37 #define __CM_CMSIS_VERSION ((__CM_CMSIS_VERSION_MAIN << 16U) | \
38 __CM_CMSIS_VERSION_SUB ) /*!< CMSIS Core(M) version number */
39 #endif
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1 /******************************************************************************
2 * @file tz_context.h
3 * @brief Context Management for Armv8-M TrustZone
4 * @version V1.0.1
5 * @date 10. January 2018
6 ******************************************************************************/
7 /*
8 * Copyright (c) 2017-2018 Arm Limited. All rights reserved.
9 *
10 * SPDX-License-Identifier: Apache-2.0
11 *
12 * Licensed under the Apache License, Version 2.0 (the License); you may
13 * not use this file except in compliance with the License.
14 * You may obtain a copy of the License at
15 *
16 * www.apache.org/licenses/LICENSE-2.0
17 *
18 * Unless required by applicable law or agreed to in writing, software
19 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
20 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
21 * See the License for the specific language governing permissions and
22 * limitations under the License.
23 */
24
25 #if defined ( __ICCARM__ )
26 #pragma system_include /* treat file as system include file for MISRA check */
27 #elif defined (__clang__)
28 #pragma clang system_header /* treat file as system include file */
29 #endif
30
31 #ifndef TZ_CONTEXT_H
32 #define TZ_CONTEXT_H
33
34 #include <stdint.h>
35
36 #ifndef TZ_MODULEID_T
37 #define TZ_MODULEID_T
38 /// \details Data type that identifies secure software modules called by a process.
39 typedef uint32_t TZ_ModuleId_t;
40 #endif
41
42 /// \details TZ Memory ID identifies an allocated memory slot.
43 typedef uint32_t TZ_MemoryId_t;
44
45 /// Initialize secure context memory system
46 /// \return execution status (1: success, 0: error)
47 uint32_t TZ_InitContextSystem_S (void);
48
49 /// Allocate context memory for calling secure software modules in TrustZone
50 /// \param[in] module identifies software modules called from non-secure mode
51 /// \return value != 0 id TrustZone memory slot identifier
52 /// \return value 0 no memory available or internal error
53 TZ_MemoryId_t TZ_AllocModuleContext_S (TZ_ModuleId_t module);
54
55 /// Free context memory that was previously allocated with \ref TZ_AllocModuleContext_S
56 /// \param[in] id TrustZone memory slot identifier
57 /// \return execution status (1: success, 0: error)
58 uint32_t TZ_FreeModuleContext_S (TZ_MemoryId_t id);
59
60 /// Load secure context (called on RTOS thread context switch)
61 /// \param[in] id TrustZone memory slot identifier
62 /// \return execution status (1: success, 0: error)
63 uint32_t TZ_LoadContext_S (TZ_MemoryId_t id);
64
65 /// Store secure context (called on RTOS thread context switch)
66 /// \param[in] id TrustZone memory slot identifier
67 /// \return execution status (1: success, 0: error)
68 uint32_t TZ_StoreContext_S (TZ_MemoryId_t id);
69
70 #endif // TZ_CONTEXT_H
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1 /**
2 ******************************************************************************
3 * @file stm32f0xx_hal_cortex.h
4 * @author MCD Application Team
5 * @brief Header file of CORTEX HAL module.
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
10 * All rights reserved.</center></h2>
11 *
12 * This software component is licensed by ST under BSD 3-Clause license,
13 * the "License"; You may not use this file except in compliance with the
14 * License. You may obtain a copy of the License at:
15 * opensource.org/licenses/BSD-3-Clause
16 *
17 ******************************************************************************
18 */
19
20 /* Define to prevent recursive inclusion -------------------------------------*/
21 #ifndef __STM32F0xx_HAL_CORTEX_H
22 #define __STM32F0xx_HAL_CORTEX_H
23
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27
28 /* Includes ------------------------------------------------------------------*/
29 #include "stm32f0xx_hal_def.h"
30
31 /** @addtogroup STM32F0xx_HAL_Driver
32 * @{
33 */
34
35 /** @addtogroup CORTEX CORTEX
36 * @{
37 */
38 /* Exported types ------------------------------------------------------------*/
39 /* Exported constants --------------------------------------------------------*/
40
41 /** @defgroup CORTEX_Exported_Constants CORTEX Exported Constants
42 * @{
43 */
44
45 /** @defgroup CORTEX_SysTick_clock_source CORTEX SysTick clock source
46 * @{
47 */
48 #define SYSTICK_CLKSOURCE_HCLK_DIV8 (0x00000000U)
49 #define SYSTICK_CLKSOURCE_HCLK (0x00000004U)
50
51 /**
52 * @}
53 */
54
55 /**
56 * @}
57 */
58
59 /* Exported Macros -----------------------------------------------------------*/
60
61 /* Exported functions --------------------------------------------------------*/
62 /** @addtogroup CORTEX_Exported_Functions CORTEX Exported Functions
63 * @{
64 */
65 /** @addtogroup CORTEX_Exported_Functions_Group1 Initialization and de-initialization functions
66 * @brief Initialization and Configuration functions
67 * @{
68 */
69 /* Initialization and de-initialization functions *******************************/
70 void HAL_NVIC_SetPriority(IRQn_Type IRQn,uint32_t PreemptPriority, uint32_t SubPriority);
71 void HAL_NVIC_EnableIRQ(IRQn_Type IRQn);
72 void HAL_NVIC_DisableIRQ(IRQn_Type IRQn);
73 void HAL_NVIC_SystemReset(void);
74 uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb);
75 /**
76 * @}
77 */
78
79 /** @addtogroup CORTEX_Exported_Functions_Group2 Peripheral Control functions
80 * @brief Cortex control functions
81 * @{
82 */
83
84 /* Peripheral Control functions *************************************************/
85 uint32_t HAL_NVIC_GetPriority(IRQn_Type IRQn);
86 uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn);
87 void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn);
88 void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn);
89 void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource);
90 void HAL_SYSTICK_IRQHandler(void);
91 void HAL_SYSTICK_Callback(void);
92 /**
93 * @}
94 */
95
96 /**
97 * @}
98 */
99
100 /* Private types -------------------------------------------------------------*/
101 /* Private variables ---------------------------------------------------------*/
102 /* Private constants ---------------------------------------------------------*/
103 /* Private macros ------------------------------------------------------------*/
104 /** @defgroup CORTEX_Private_Macros CORTEX Private Macros
105 * @{
106 */
107 #define IS_NVIC_PREEMPTION_PRIORITY(PRIORITY) ((PRIORITY) < 0x4)
108
109 #define IS_NVIC_DEVICE_IRQ(IRQ) ((IRQ) >= 0x00)
110
111 #define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SYSTICK_CLKSOURCE_HCLK) || \
112 ((SOURCE) == SYSTICK_CLKSOURCE_HCLK_DIV8))
113 /**
114 * @}
115 */
116
117 /**
118 * @}
119 */
120
121 /**
122 * @}
123 */
124
125 #ifdef __cplusplus
126 }
127 #endif
128
129 #endif /* __STM32F0xx_HAL_CORTEX_H */
130
131
132 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
133
1 /**
2 ******************************************************************************
3 * @file stm32f0xx_hal_def.h
4 * @author MCD Application Team
5 * @brief This file contains HAL common defines, enumeration, macros and
6 * structures definitions.
7 ******************************************************************************
8 * @attention
9 *
10 * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
11 * All rights reserved.</center></h2>
12 *
13 * This software component is licensed by ST under BSD 3-Clause license,
14 * the "License"; You may not use this file except in compliance with the
15 * License. You may obtain a copy of the License at:
16 * opensource.org/licenses/BSD-3-Clause
17 *
18 ******************************************************************************
19 */
20
21 /* Define to prevent recursive inclusion -------------------------------------*/
22 #ifndef __STM32F0xx_HAL_DEF
23 #define __STM32F0xx_HAL_DEF
24
25 #ifdef __cplusplus
26 extern "C" {
27 #endif
28
29 /* Includes ------------------------------------------------------------------*/
30 #include "stm32f0xx.h"
31 #if defined(USE_HAL_LEGACY)
32 #include "Legacy/stm32_hal_legacy.h"
33 #endif
34 #include <stddef.h>
35
36 /* Exported types ------------------------------------------------------------*/
37
38 /**
39 * @brief HAL Status structures definition
40 */
41 typedef enum
42 {
43 HAL_OK = 0x00U,
44 HAL_ERROR = 0x01U,
45 HAL_BUSY = 0x02U,
46 HAL_TIMEOUT = 0x03U
47 } HAL_StatusTypeDef;
48
49 /**
50 * @brief HAL Lock structures definition
51 */
52 typedef enum
53 {
54 HAL_UNLOCKED = 0x00U,
55 HAL_LOCKED = 0x01U
56 } HAL_LockTypeDef;
57
58 /* Exported macro ------------------------------------------------------------*/
59
60 #define HAL_MAX_DELAY 0xFFFFFFFFU
61
62 #define HAL_IS_BIT_SET(REG, BIT) (((REG) & (BIT)) == (BIT))
63 #define HAL_IS_BIT_CLR(REG, BIT) (((REG) & (BIT)) == 0U)
64
65 #define __HAL_LINKDMA(__HANDLE__, __PPP_DMA_FIELD_, __DMA_HANDLE_) \
66 do{ \
67 (__HANDLE__)->__PPP_DMA_FIELD_ = &(__DMA_HANDLE_); \
68 (__DMA_HANDLE_).Parent = (__HANDLE__); \
69 } while(0)
70
71 #define UNUSED(X) (void)X /* To avoid gcc/g++ warnings */
72
73 /** @brief Reset the Handle's State field.
74 * @param __HANDLE__ specifies the Peripheral Handle.
75 * @note This macro can be used for the following purpose:
76 * - When the Handle is declared as local variable; before passing it as parameter
77 * to HAL_PPP_Init() for the first time, it is mandatory to use this macro
78 * to set to 0 the Handle's "State" field.
79 * Otherwise, "State" field may have any random value and the first time the function
80 * HAL_PPP_Init() is called, the low level hardware initialization will be missed
81 * (i.e. HAL_PPP_MspInit() will not be executed).
82 * - When there is a need to reconfigure the low level hardware: instead of calling
83 * HAL_PPP_DeInit() then HAL_PPP_Init(), user can make a call to this macro then HAL_PPP_Init().
84 * In this later function, when the Handle's "State" field is set to 0, it will execute the function
85 * HAL_PPP_MspInit() which will reconfigure the low level hardware.
86 * @retval None
87 */
88 #define __HAL_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = 0)
89
90 #if (USE_RTOS == 1)
91 #error " USE_RTOS should be 0 in the current HAL release "
92 #else
93 #define __HAL_LOCK(__HANDLE__) \
94 do{ \
95 if((__HANDLE__)->Lock == HAL_LOCKED) \
96 { \
97 return HAL_BUSY; \
98 } \
99 else \
100 { \
101 (__HANDLE__)->Lock = HAL_LOCKED; \
102 } \
103 }while (0)
104
105 #define __HAL_UNLOCK(__HANDLE__) \
106 do{ \
107 (__HANDLE__)->Lock = HAL_UNLOCKED; \
108 }while (0)
109 #endif /* USE_RTOS */
110
111 #if defined ( __GNUC__ )
112 #ifndef __weak
113 #define __weak __attribute__((weak))
114 #endif /* __weak */
115 #ifndef __packed
116 #define __packed __attribute__((__packed__))
117 #endif /* __packed */
118 #endif /* __GNUC__ */
119
120
121 /* Macro to get variable aligned on 4-bytes, for __ICCARM__ the directive "#pragma data_alignment=4" must be used instead */
122 #if defined (__GNUC__) /* GNU Compiler */
123 #ifndef __ALIGN_END
124 #define __ALIGN_END __attribute__ ((aligned (4)))
125 #endif /* __ALIGN_END */
126 #ifndef __ALIGN_BEGIN
127 #define __ALIGN_BEGIN
128 #endif /* __ALIGN_BEGIN */
129 #else
130 #ifndef __ALIGN_END
131 #define __ALIGN_END
132 #endif /* __ALIGN_END */
133 #ifndef __ALIGN_BEGIN
134 #if defined (__CC_ARM) /* ARM Compiler */
135 #define __ALIGN_BEGIN __align(4)
136 #elif defined (__ICCARM__) /* IAR Compiler */
137 #define __ALIGN_BEGIN
138 #endif /* __CC_ARM */
139 #endif /* __ALIGN_BEGIN */
140 #endif /* __GNUC__ */
141
142 /**
143 * @brief __NOINLINE definition
144 */
145 #if defined ( __CC_ARM ) || defined ( __GNUC__ )
146 /* ARM & GNUCompiler
147 ----------------
148 */
149 #define __NOINLINE __attribute__ ( (noinline) )
150
151 #elif defined ( __ICCARM__ )
152 /* ICCARM Compiler
153 ---------------
154 */
155 #define __NOINLINE _Pragma("optimize = no_inline")
156
157 #endif
158
159 #ifdef __cplusplus
160 }
161 #endif
162
163 #endif /* ___STM32F0xx_HAL_DEF */
164
165 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
166
1 /**
2 ******************************************************************************
3 * @file stm32f0xx_hal_i2c_ex.h
4 * @author MCD Application Team
5 * @brief Header file of I2C HAL Extended module.
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
10 * All rights reserved.</center></h2>
11 *
12 * This software component is licensed by ST under BSD 3-Clause license,
13 * the "License"; You may not use this file except in compliance with the
14 * License. You may obtain a copy of the License at:
15 * opensource.org/licenses/BSD-3-Clause
16 *
17 ******************************************************************************
18 */
19
20 /* Define to prevent recursive inclusion -------------------------------------*/
21 #ifndef STM32F0xx_HAL_I2C_EX_H
22 #define STM32F0xx_HAL_I2C_EX_H
23
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27
28 /* Includes ------------------------------------------------------------------*/
29 #include "stm32f0xx_hal_def.h"
30
31 /** @addtogroup STM32F0xx_HAL_Driver
32 * @{
33 */
34
35 /** @addtogroup I2CEx
36 * @{
37 */
38
39 /* Exported types ------------------------------------------------------------*/
40 /* Exported constants --------------------------------------------------------*/
41
42 /** @defgroup I2CEx_Exported_Constants I2C Extended Exported Constants
43 * @{
44 */
45
46 /** @defgroup I2CEx_Analog_Filter I2C Extended Analog Filter
47 * @{
48 */
49 #define I2C_ANALOGFILTER_ENABLE 0x00000000U
50 #define I2C_ANALOGFILTER_DISABLE I2C_CR1_ANFOFF
51 /**
52 * @}
53 */
54
55 /** @defgroup I2CEx_FastModePlus I2C Extended Fast Mode Plus
56 * @{
57 */
58 #define I2C_FMP_NOT_SUPPORTED 0xAAAA0000U /*!< Fast Mode Plus not supported */
59 #if defined(SYSCFG_CFGR1_I2C_FMP_PA9)
60 #define I2C_FASTMODEPLUS_PA9 SYSCFG_CFGR1_I2C_FMP_PA9 /*!< Enable Fast Mode Plus on PA9 */
61 #define I2C_FASTMODEPLUS_PA10 SYSCFG_CFGR1_I2C_FMP_PA10 /*!< Enable Fast Mode Plus on PA10 */
62 #else
63 #define I2C_FASTMODEPLUS_PA9 (uint32_t)(0x00000001U | I2C_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus PA9 not supported */
64 #define I2C_FASTMODEPLUS_PA10 (uint32_t)(0x00000002U | I2C_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus PA10 not supported */
65 #endif
66 #define I2C_FASTMODEPLUS_PB6 SYSCFG_CFGR1_I2C_FMP_PB6 /*!< Enable Fast Mode Plus on PB6 */
67 #define I2C_FASTMODEPLUS_PB7 SYSCFG_CFGR1_I2C_FMP_PB7 /*!< Enable Fast Mode Plus on PB7 */
68 #define I2C_FASTMODEPLUS_PB8 SYSCFG_CFGR1_I2C_FMP_PB8 /*!< Enable Fast Mode Plus on PB8 */
69 #define I2C_FASTMODEPLUS_PB9 SYSCFG_CFGR1_I2C_FMP_PB9 /*!< Enable Fast Mode Plus on PB9 */
70 #if defined(SYSCFG_CFGR1_I2C_FMP_I2C1)
71 #define I2C_FASTMODEPLUS_I2C1 SYSCFG_CFGR1_I2C_FMP_I2C1 /*!< Enable Fast Mode Plus on I2C1 pins */
72 #else
73 #define I2C_FASTMODEPLUS_I2C1 (uint32_t)(0x00000100U | I2C_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus I2C1 not supported */
74 #endif
75 #if defined(SYSCFG_CFGR1_I2C_FMP_I2C2)
76 #define I2C_FASTMODEPLUS_I2C2 SYSCFG_CFGR1_I2C_FMP_I2C2 /*!< Enable Fast Mode Plus on I2C2 pins */
77 #else
78 #define I2C_FASTMODEPLUS_I2C2 (uint32_t)(0x00000200U | I2C_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus I2C2 not supported */
79 #endif
80 /**
81 * @}
82 */
83
84 /**
85 * @}
86 */
87
88 /* Exported macro ------------------------------------------------------------*/
89 /* Exported functions --------------------------------------------------------*/
90
91 /** @addtogroup I2CEx_Exported_Functions I2C Extended Exported Functions
92 * @{
93 */
94
95 /** @addtogroup I2CEx_Exported_Functions_Group1 Extended features functions
96 * @brief Extended features functions
97 * @{
98 */
99
100 /* Peripheral Control functions ************************************************/
101 HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter);
102 HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter);
103 #if defined(I2C_CR1_WUPEN)
104 HAL_StatusTypeDef HAL_I2CEx_EnableWakeUp(I2C_HandleTypeDef *hi2c);
105 HAL_StatusTypeDef HAL_I2CEx_DisableWakeUp(I2C_HandleTypeDef *hi2c);
106 #endif
107 void HAL_I2CEx_EnableFastModePlus(uint32_t ConfigFastModePlus);
108 void HAL_I2CEx_DisableFastModePlus(uint32_t ConfigFastModePlus);
109
110 /* Private constants ---------------------------------------------------------*/
111 /** @defgroup I2CEx_Private_Constants I2C Extended Private Constants
112 * @{
113 */
114
115 /**
116 * @}
117 */
118
119 /* Private macros ------------------------------------------------------------*/
120 /** @defgroup I2CEx_Private_Macro I2C Extended Private Macros
121 * @{
122 */
123 #define IS_I2C_ANALOG_FILTER(FILTER) (((FILTER) == I2C_ANALOGFILTER_ENABLE) || \
124 ((FILTER) == I2C_ANALOGFILTER_DISABLE))
125
126 #define IS_I2C_DIGITAL_FILTER(FILTER) ((FILTER) <= 0x0000000FU)
127
128 #define IS_I2C_FASTMODEPLUS(__CONFIG__) ((((__CONFIG__) & I2C_FMP_NOT_SUPPORTED) != I2C_FMP_NOT_SUPPORTED) && \
129 ((((__CONFIG__) & (I2C_FASTMODEPLUS_PA9)) == I2C_FASTMODEPLUS_PA9) || \
130 (((__CONFIG__) & (I2C_FASTMODEPLUS_PA10)) == I2C_FASTMODEPLUS_PA10) || \
131 (((__CONFIG__) & (I2C_FASTMODEPLUS_PB6)) == I2C_FASTMODEPLUS_PB6) || \
132 (((__CONFIG__) & (I2C_FASTMODEPLUS_PB7)) == I2C_FASTMODEPLUS_PB7) || \
133 (((__CONFIG__) & (I2C_FASTMODEPLUS_PB8)) == I2C_FASTMODEPLUS_PB8) || \
134 (((__CONFIG__) & (I2C_FASTMODEPLUS_PB9)) == I2C_FASTMODEPLUS_PB9) || \
135 (((__CONFIG__) & (I2C_FASTMODEPLUS_I2C1)) == I2C_FASTMODEPLUS_I2C1) || \
136 (((__CONFIG__) & (I2C_FASTMODEPLUS_I2C2)) == I2C_FASTMODEPLUS_I2C2)))
137 /**
138 * @}
139 */
140
141 /* Private Functions ---------------------------------------------------------*/
142 /** @defgroup I2CEx_Private_Functions I2C Extended Private Functions
143 * @{
144 */
145 /* Private functions are defined in stm32f0xx_hal_i2c_ex.c file */
146 /**
147 * @}
148 */
149
150 /**
151 * @}
152 */
153
154 /**
155 * @}
156 */
157
158 /**
159 * @}
160 */
161
162 /**
163 * @}
164 */
165
166 #ifdef __cplusplus
167 }
168 #endif
169
170 #endif /* STM32F0xx_HAL_I2C_EX_H */
171
172 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
1 /**
2 ******************************************************************************
3 * @file stm32f0xx_hal_pwr.h
4 * @author MCD Application Team
5 * @brief Header file of PWR HAL module.
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
10 * All rights reserved.</center></h2>
11 *
12 * This software component is licensed by ST under BSD 3-Clause license,
13 * the "License"; You may not use this file except in compliance with the
14 * License. You may obtain a copy of the License at:
15 * opensource.org/licenses/BSD-3-Clause
16 *
17 ******************************************************************************
18 */
19
20 /* Define to prevent recursive inclusion -------------------------------------*/
21 #ifndef __STM32F0xx_HAL_PWR_H
22 #define __STM32F0xx_HAL_PWR_H
23
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27
28 /* Includes ------------------------------------------------------------------*/
29 #include "stm32f0xx_hal_def.h"
30
31 /** @addtogroup STM32F0xx_HAL_Driver
32 * @{
33 */
34
35 /** @addtogroup PWR PWR
36 * @{
37 */
38
39 /* Exported types ------------------------------------------------------------*/
40 /* Exported constants --------------------------------------------------------*/
41
42 /** @defgroup PWR_Exported_Constants PWR Exported Constants
43 * @{
44 */
45
46 /** @defgroup PWR_Regulator_state_in_STOP_mode PWR Regulator state in STOP mode
47 * @{
48 */
49 #define PWR_MAINREGULATOR_ON (0x00000000U)
50 #define PWR_LOWPOWERREGULATOR_ON PWR_CR_LPDS
51
52 #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \
53 ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON))
54 /**
55 * @}
56 */
57
58 /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry
59 * @{
60 */
61 #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01U)
62 #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02U)
63 #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE))
64 /**
65 * @}
66 */
67
68 /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry
69 * @{
70 */
71 #define PWR_STOPENTRY_WFI ((uint8_t)0x01U)
72 #define PWR_STOPENTRY_WFE ((uint8_t)0x02U)
73 #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE))
74 /**
75 * @}
76 */
77
78
79 /**
80 * @}
81 */
82
83 /* Exported macro ------------------------------------------------------------*/
84 /** @defgroup PWR_Exported_Macro PWR Exported Macro
85 * @{
86 */
87
88 /** @brief Check PWR flag is set or not.
89 * @param __FLAG__ specifies the flag to check.
90 * This parameter can be one of the following values:
91 * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event
92 * was received from the WKUP pin or from the RTC alarm (Alarm A),
93 * RTC Tamper event, RTC TimeStamp event or RTC Wakeup.
94 * An additional wakeup event is detected if the WKUP pin is enabled
95 * (by setting the EWUP bit) when the WKUP pin level is already high.
96 * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was
97 * resumed from StandBy mode.
98 * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled
99 * by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode
100 * For this reason, this bit is equal to 0 after Standby or reset
101 * until the PVDE bit is set.
102 * Warning: this Flag is not available on STM32F030x8 products
103 * @arg PWR_FLAG_VREFINTRDY: This flag indicates that the internal reference
104 * voltage VREFINT is ready.
105 * Warning: this Flag is not available on STM32F030x8 products
106 * @retval The new state of __FLAG__ (TRUE or FALSE).
107 */
108 #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__))
109
110 /** @brief Clear the PWR's pending flags.
111 * @param __FLAG__ specifies the flag to clear.
112 * This parameter can be one of the following values:
113 * @arg PWR_FLAG_WU: Wake Up flag
114 * @arg PWR_FLAG_SB: StandBy flag
115 */
116 #define __HAL_PWR_CLEAR_FLAG(__FLAG__) (PWR->CR |= (__FLAG__) << 2U)
117
118
119 /**
120 * @}
121 */
122
123 /* Include PWR HAL Extension module */
124 #include "stm32f0xx_hal_pwr_ex.h"
125
126 /* Exported functions --------------------------------------------------------*/
127
128 /** @addtogroup PWR_Exported_Functions PWR Exported Functions
129 * @{
130 */
131
132 /** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions
133 * @{
134 */
135
136 /* Initialization and de-initialization functions *****************************/
137 void HAL_PWR_DeInit(void);
138
139 /**
140 * @}
141 */
142
143 /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions
144 * @{
145 */
146
147 /* Peripheral Control functions **********************************************/
148 void HAL_PWR_EnableBkUpAccess(void);
149 void HAL_PWR_DisableBkUpAccess(void);
150
151 /* WakeUp pins configuration functions ****************************************/
152 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx);
153 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx);
154
155 /* Low Power modes configuration functions ************************************/
156 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
157 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry);
158 void HAL_PWR_EnterSTANDBYMode(void);
159
160 void HAL_PWR_EnableSleepOnExit(void);
161 void HAL_PWR_DisableSleepOnExit(void);
162 void HAL_PWR_EnableSEVOnPend(void);
163 void HAL_PWR_DisableSEVOnPend(void);
164
165 /**
166 * @}
167 */
168
169 /**
170 * @}
171 */
172
173 /**
174 * @}
175 */
176
177 /**
178 * @}
179 */
180
181 #ifdef __cplusplus
182 }
183 #endif
184
185
186 #endif /* __STM32F0xx_HAL_PWR_H */
187
188 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
189
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1 /**
2 ******************************************************************************
3 * @file stm32f0xx_hal_pwr_ex.c
4 * @author MCD Application Team
5 * @brief Extended PWR HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the Power Controller (PWR) peripheral:
8 * + Extended Initialization and de-initialization functions
9 * + Extended Peripheral Control functions
10 *
11 ******************************************************************************
12 * @attention
13 *
14 * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
15 * All rights reserved.</center></h2>
16 *
17 * This software component is licensed by ST under BSD 3-Clause license,
18 * the "License"; You may not use this file except in compliance with the
19 * License. You may obtain a copy of the License at:
20 * opensource.org/licenses/BSD-3-Clause
21 *
22 ******************************************************************************
23 */
24
25 /* Includes ------------------------------------------------------------------*/
26 #include "stm32f0xx_hal.h"
27
28 /** @addtogroup STM32F0xx_HAL_Driver
29 * @{
30 */
31
32 /** @defgroup PWREx PWREx
33 * @brief PWREx HAL module driver
34 * @{
35 */
36
37 #ifdef HAL_PWR_MODULE_ENABLED
38
39 /* Private typedef -----------------------------------------------------------*/
40 /* Private define ------------------------------------------------------------*/
41 /** @defgroup PWREx_Private_Constants PWREx Private Constants
42 * @{
43 */
44 #define PVD_MODE_IT (0x00010000U)
45 #define PVD_MODE_EVT (0x00020000U)
46 #define PVD_RISING_EDGE (0x00000001U)
47 #define PVD_FALLING_EDGE (0x00000002U)
48 /**
49 * @}
50 */
51
52 /* Private macro -------------------------------------------------------------*/
53 /* Private variables ---------------------------------------------------------*/
54 /* Private function prototypes -----------------------------------------------*/
55 /* Exported functions ---------------------------------------------------------*/
56
57 /** @defgroup PWREx_Exported_Functions PWREx Exported Functions
58 * @{
59 */
60
61 /** @defgroup PWREx_Exported_Functions_Group1 Peripheral Extended Control Functions
62 * @brief Extended Peripheral Control functions
63 *
64 @verbatim
65
66 ===============================================================================
67 ##### Peripheral extended control functions #####
68 ===============================================================================
69
70 *** PVD configuration ***
71 =========================
72 [..]
73 (+) The PVD is used to monitor the VDD power supply by comparing it to a
74 threshold selected by the PVD Level (PLS[2:0] bits in the PWR_CR).
75 (+) A PVDO flag is available to indicate if VDD/VDDA is higher or lower
76 than the PVD threshold. This event is internally connected to the EXTI
77 line16 and can generate an interrupt if enabled. This is done through
78 HAL_PWR_ConfigPVD(), HAL_PWR_EnablePVD() functions.
79 (+) The PVD is stopped in Standby mode.
80 -@- PVD is not available on STM32F030x4/x6/x8
81
82 *** VDDIO2 Monitor Configuration ***
83 ====================================
84 [..]
85 (+) VDDIO2 monitor is used to monitor the VDDIO2 power supply by comparing it
86 to VREFInt Voltage
87 (+) This monitor is internally connected to the EXTI line31
88 and can generate an interrupt if enabled. This is done through
89 HAL_PWREx_EnableVddio2Monitor() function.
90 -@- VDDIO2 is available on STM32F07x/09x/04x
91
92 @endverbatim
93 * @{
94 */
95
96 #if defined (STM32F031x6) || defined (STM32F051x8) || \
97 defined (STM32F071xB) || defined (STM32F091xC) || \
98 defined (STM32F042x6) || defined (STM32F072xB)
99 /**
100 * @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD).
101 * @param sConfigPVD pointer to an PWR_PVDTypeDef structure that contains the configuration
102 * information for the PVD.
103 * @note Refer to the electrical characteristics of your device datasheet for
104 * more details about the voltage threshold corresponding to each
105 * detection level.
106 * @retval None
107 */
108 void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD)
109 {
110 /* Check the parameters */
111 assert_param(IS_PWR_PVD_LEVEL(sConfigPVD->PVDLevel));
112 assert_param(IS_PWR_PVD_MODE(sConfigPVD->Mode));
113
114 /* Set PLS[7:5] bits according to PVDLevel value */
115 MODIFY_REG(PWR->CR, PWR_CR_PLS, sConfigPVD->PVDLevel);
116
117 /* Clear any previous config. Keep it clear if no event or IT mode is selected */
118 __HAL_PWR_PVD_EXTI_DISABLE_EVENT();
119 __HAL_PWR_PVD_EXTI_DISABLE_IT();
120 __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE();
121
122 /* Configure interrupt mode */
123 if((sConfigPVD->Mode & PVD_MODE_IT) == PVD_MODE_IT)
124 {
125 __HAL_PWR_PVD_EXTI_ENABLE_IT();
126 }
127
128 /* Configure event mode */
129 if((sConfigPVD->Mode & PVD_MODE_EVT) == PVD_MODE_EVT)
130 {
131 __HAL_PWR_PVD_EXTI_ENABLE_EVENT();
132 }
133
134 /* Configure the edge */
135 if((sConfigPVD->Mode & PVD_RISING_EDGE) == PVD_RISING_EDGE)
136 {
137 __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();
138 }
139
140 if((sConfigPVD->Mode & PVD_FALLING_EDGE) == PVD_FALLING_EDGE)
141 {
142 __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();
143 }
144 }
145
146 /**
147 * @brief Enables the Power Voltage Detector(PVD).
148 * @retval None
149 */
150 void HAL_PWR_EnablePVD(void)
151 {
152 PWR->CR |= (uint32_t)PWR_CR_PVDE;
153 }
154
155 /**
156 * @brief Disables the Power Voltage Detector(PVD).
157 * @retval None
158 */
159 void HAL_PWR_DisablePVD(void)
160 {
161 PWR->CR &= ~((uint32_t)PWR_CR_PVDE);
162 }
163
164 /**
165 * @brief This function handles the PWR PVD interrupt request.
166 * @note This API should be called under the PVD_IRQHandler() or PVD_VDDIO2_IRQHandler().
167 * @retval None
168 */
169 void HAL_PWR_PVD_IRQHandler(void)
170 {
171 /* Check PWR exti flag */
172 if(__HAL_PWR_PVD_EXTI_GET_FLAG() != RESET)
173 {
174 /* PWR PVD interrupt user callback */
175 HAL_PWR_PVDCallback();
176
177 /* Clear PWR Exti pending bit */
178 __HAL_PWR_PVD_EXTI_CLEAR_FLAG();
179 }
180 }
181
182 /**
183 * @brief PWR PVD interrupt callback
184 * @retval None
185 */
186 __weak void HAL_PWR_PVDCallback(void)
187 {
188 /* NOTE : This function Should not be modified, when the callback is needed,
189 the HAL_PWR_PVDCallback could be implemented in the user file
190 */
191 }
192
193 #endif /* defined (STM32F031x6) || defined (STM32F051x8) || */
194 /* defined (STM32F071xB) || defined (STM32F091xC) || */
195 /* defined (STM32F042x6) || defined (STM32F072xB) */
196
197 #if defined (STM32F042x6) || defined (STM32F048xx) || \
198 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
199 defined (STM32F091xC) || defined (STM32F098xx)
200 /**
201 * @brief Enable VDDIO2 monitor: enable Exti 31 and falling edge detection.
202 * @note If Exti 31 is enable correlty and VDDIO2 voltage goes below Vrefint,
203 an interrupt is generated Irq line 1.
204 NVIS has to be enable by user.
205 * @retval None
206 */
207 void HAL_PWREx_EnableVddio2Monitor(void)
208 {
209 __HAL_PWR_VDDIO2_EXTI_ENABLE_IT();
210 __HAL_PWR_VDDIO2_EXTI_ENABLE_FALLING_EDGE();
211 }
212
213 /**
214 * @brief Disable the Vddio2 Monitor.
215 * @retval None
216 */
217 void HAL_PWREx_DisableVddio2Monitor(void)
218 {
219 __HAL_PWR_VDDIO2_EXTI_DISABLE_IT();
220 __HAL_PWR_VDDIO2_EXTI_DISABLE_FALLING_EDGE();
221
222 }
223
224 /**
225 * @brief This function handles the PWR Vddio2 monitor interrupt request.
226 * @note This API should be called under the VDDIO2_IRQHandler() PVD_VDDIO2_IRQHandler().
227 * @retval None
228 */
229 void HAL_PWREx_Vddio2Monitor_IRQHandler(void)
230 {
231 /* Check PWR exti flag */
232 if(__HAL_PWR_VDDIO2_EXTI_GET_FLAG() != RESET)
233 {
234 /* PWR Vddio2 monitor interrupt user callback */
235 HAL_PWREx_Vddio2MonitorCallback();
236
237 /* Clear PWR Exti pending bit */
238 __HAL_PWR_VDDIO2_EXTI_CLEAR_FLAG();
239 }
240 }
241
242 /**
243 * @brief PWR Vddio2 Monitor interrupt callback
244 * @retval None
245 */
246 __weak void HAL_PWREx_Vddio2MonitorCallback(void)
247 {
248 /* NOTE : This function Should not be modified, when the callback is needed,
249 the HAL_PWREx_Vddio2MonitorCallback could be implemented in the user file
250 */
251 }
252
253 #endif /* defined (STM32F042x6) || defined (STM32F048xx) || \
254 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
255 defined (STM32F091xC) || defined (STM32F098xx) */
256
257 /**
258 * @}
259 */
260
261 /**
262 * @}
263 */
264
265 #endif /* HAL_PWR_MODULE_ENABLED */
266 /**
267 * @}
268 */
269
270 /**
271 * @}
272 */
273
274 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
This diff could not be displayed because it is too large.
1 /*
2 ******************************************************************************
3 **
4 ** File : LinkerScript.ld
5 **
6 ** Author : Auto-generated by STM32CubeIDE
7 **
8 ** Abstract : Linker script for STM32F030C8Tx Device from STM32F0 series
9 ** 64Kbytes FLASH
10 ** 8Kbytes RAM
11 **
12 ** Set heap size, stack size and stack location according
13 ** to application requirements.
14 **
15 ** Set memory bank area and size if external memory is used.
16 **
17 ** Target : STMicroelectronics STM32
18 **
19 ** Distribution: The file is distributed as is without any warranty
20 ** of any kind.
21 **
22 *****************************************************************************
23 ** @attention
24 **
25 ** <h2><center>&copy; COPYRIGHT(c) 2019 STMicroelectronics</center></h2>
26 **
27 ** Redistribution and use in source and binary forms, with or without modification,
28 ** are permitted provided that the following conditions are met:
29 ** 1. Redistributions of source code must retain the above copyright notice,
30 ** this list of conditions and the following disclaimer.
31 ** 2. Redistributions in binary form must reproduce the above copyright notice,
32 ** this list of conditions and the following disclaimer in the documentation
33 ** and/or other materials provided with the distribution.
34 ** 3. Neither the name of STMicroelectronics nor the names of its contributors
35 ** may be used to endorse or promote products derived from this software
36 ** without specific prior written permission.
37 **
38 ** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
39 ** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
40 ** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
41 ** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
42 ** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
43 ** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
44 ** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
45 ** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
46 ** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
47 ** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
48 **
49 *****************************************************************************
50 */
51
52 /* Entry Point */
53 ENTRY(Reset_Handler)
54
55 /* Highest address of the user mode stack */
56 _estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
57
58 _Min_Heap_Size = 0x200; /* required amount of heap */
59 _Min_Stack_Size = 0x400; /* required amount of stack */
60
61 /* Memories definition */
62 MEMORY
63 {
64 RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 8K
65 FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 64K
66 }
67
68 /* Sections */
69 SECTIONS
70 {
71 /* The startup code into "FLASH" Rom type memory */
72 .isr_vector :
73 {
74 . = ALIGN(4);
75 KEEP(*(.isr_vector)) /* Startup code */
76 . = ALIGN(4);
77 } >FLASH
78
79 /* The program code and other data into "FLASH" Rom type memory */
80 .text :
81 {
82 . = ALIGN(4);
83 *(.text) /* .text sections (code) */
84 *(.text*) /* .text* sections (code) */
85 *(.glue_7) /* glue arm to thumb code */
86 *(.glue_7t) /* glue thumb to arm code */
87 *(.eh_frame)
88
89 KEEP (*(.init))
90 KEEP (*(.fini))
91
92 . = ALIGN(4);
93 _etext = .; /* define a global symbols at end of code */
94 } >FLASH
95
96 /* Constant data into "FLASH" Rom type memory */
97 .rodata :
98 {
99 . = ALIGN(4);
100 *(.rodata) /* .rodata sections (constants, strings, etc.) */
101 *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
102 . = ALIGN(4);
103 } >FLASH
104
105 .ARM.extab : {
106 . = ALIGN(4);
107 *(.ARM.extab* .gnu.linkonce.armextab.*)
108 . = ALIGN(4);
109 } >FLASH
110
111 .ARM : {
112 . = ALIGN(4);
113 __exidx_start = .;
114 *(.ARM.exidx*)
115 __exidx_end = .;
116 . = ALIGN(4);
117 } >FLASH
118
119 .preinit_array :
120 {
121 . = ALIGN(4);
122 PROVIDE_HIDDEN (__preinit_array_start = .);
123 KEEP (*(.preinit_array*))
124 PROVIDE_HIDDEN (__preinit_array_end = .);
125 . = ALIGN(4);
126 } >FLASH
127
128 .init_array :
129 {
130 . = ALIGN(4);
131 PROVIDE_HIDDEN (__init_array_start = .);
132 KEEP (*(SORT(.init_array.*)))
133 KEEP (*(.init_array*))
134 PROVIDE_HIDDEN (__init_array_end = .);
135 . = ALIGN(4);
136 } >FLASH
137
138 .fini_array :
139 {
140 . = ALIGN(4);
141 PROVIDE_HIDDEN (__fini_array_start = .);
142 KEEP (*(SORT(.fini_array.*)))
143 KEEP (*(.fini_array*))
144 PROVIDE_HIDDEN (__fini_array_end = .);
145 . = ALIGN(4);
146 } >FLASH
147
148 /* Used by the startup to initialize data */
149 _sidata = LOADADDR(.data);
150
151 /* Initialized data sections into "RAM" Ram type memory */
152 .data :
153 {
154 . = ALIGN(4);
155 _sdata = .; /* create a global symbol at data start */
156 *(.data) /* .data sections */
157 *(.data*) /* .data* sections */
158
159 . = ALIGN(4);
160 _edata = .; /* define a global symbol at data end */
161
162 } >RAM AT> FLASH
163
164 /* Uninitialized data section into "RAM" Ram type memory */
165 . = ALIGN(4);
166 .bss :
167 {
168 /* This is used by the startup in order to initialize the .bss section */
169 _sbss = .; /* define a global symbol at bss start */
170 __bss_start__ = _sbss;
171 *(.bss)
172 *(.bss*)
173 *(COMMON)
174
175 . = ALIGN(4);
176 _ebss = .; /* define a global symbol at bss end */
177 __bss_end__ = _ebss;
178 } >RAM
179
180 /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
181 ._user_heap_stack :
182 {
183 . = ALIGN(8);
184 PROVIDE ( end = . );
185 PROVIDE ( _end = . );
186 . = . + _Min_Heap_Size;
187 . = . + _Min_Stack_Size;
188 . = ALIGN(8);
189 } >RAM
190
191 /* Remove information from the compiler libraries */
192 /DISCARD/ :
193 {
194 libc.a ( * )
195 libm.a ( * )
196 libgcc.a ( * )
197 }
198
199 .ARM.attributes 0 : { *(.ARM.attributes) }
200 }
1 #MicroXplorer Configuration settings - do not modify
2 FREERTOS.IPParameters=Tasks01
3 FREERTOS.Tasks01=defaultTask,24,128,StartDefaultTask,Default,NULL,Dynamic,NULL,NULL
4 File.Version=6
5 KeepUserPlacement=false
6 Mcu.Family=STM32F0
7 Mcu.IP0=FREERTOS
8 Mcu.IP1=NVIC
9 Mcu.IP2=RCC
10 Mcu.IP3=SYS
11 Mcu.IPNb=4
12 Mcu.Name=STM32F030C8Tx
13 Mcu.Package=LQFP48
14 Mcu.Pin0=PC14-OSC32_IN
15 Mcu.Pin1=PC15-OSC32_OUT
16 Mcu.Pin2=PF0-OSC_IN
17 Mcu.Pin3=PF1-OSC_OUT
18 Mcu.Pin4=PB7
19 Mcu.Pin5=VP_FREERTOS_VS_CMSIS_V2
20 Mcu.Pin6=VP_SYS_VS_Systick
21 Mcu.PinsNb=7
22 Mcu.ThirdPartyNb=0
23 Mcu.UserConstants=
24 Mcu.UserName=STM32F030C8Tx
25 MxCube.Version=5.4.0
26 MxDb.Version=DB.5.0.40
27 NVIC.ForceEnableDMAVector=true
28 NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
29 NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
30 NVIC.PendSV_IRQn=true\:3\:0\:false\:false\:false\:true\:false\:false
31 NVIC.SVC_IRQn=true\:0\:0\:false\:false\:false\:false\:false\:false
32 NVIC.SysTick_IRQn=true\:3\:0\:false\:false\:true\:true\:false\:true
33 PB7.GPIOParameters=GPIO_Label
34 PB7.GPIO_Label=LED1
35 PB7.Locked=true
36 PB7.Signal=GPIO_Output
37 PC14-OSC32_IN.Mode=LSE-External-Oscillator
38 PC14-OSC32_IN.Signal=RCC_OSC32_IN
39 PC15-OSC32_OUT.Mode=LSE-External-Oscillator
40 PC15-OSC32_OUT.Signal=RCC_OSC32_OUT
41 PCC.Checker=false
42 PCC.Line=STM32F0x0 Value Line
43 PCC.MCU=STM32F030C8Tx
44 PCC.PartNumber=STM32F030C8Tx
45 PCC.Seq0=0
46 PCC.Series=STM32F0
47 PCC.Temperature=25
48 PCC.Vdd=3.6
49 PF0-OSC_IN.Mode=HSE-External-Oscillator
50 PF0-OSC_IN.Signal=RCC_OSC_IN
51 PF1-OSC_OUT.Mode=HSE-External-Oscillator
52 PF1-OSC_OUT.Signal=RCC_OSC_OUT
53 PinOutPanel.RotationAngle=0
54 ProjectManager.AskForMigrate=true
55 ProjectManager.BackupPrevious=false
56 ProjectManager.CompilerOptimize=6
57 ProjectManager.ComputerToolchain=false
58 ProjectManager.CoupleFile=false
59 ProjectManager.CustomerFirmwarePackage=
60 ProjectManager.DefaultFWLocation=true
61 ProjectManager.DeletePrevious=true
62 ProjectManager.DeviceId=STM32F030C8Tx
63 ProjectManager.FirmwarePackage=STM32Cube FW_F0 V1.11.0
64 ProjectManager.FreePins=false
65 ProjectManager.HalAssertFull=false
66 ProjectManager.HeapSize=0x200
67 ProjectManager.KeepUserCode=true
68 ProjectManager.LastFirmware=true
69 ProjectManager.LibraryCopy=1
70 ProjectManager.MainLocation=Core/Src
71 ProjectManager.NoMain=false
72 ProjectManager.PreviousToolchain=
73 ProjectManager.ProjectBuild=false
74 ProjectManager.ProjectFileName=STM32Test.ioc
75 ProjectManager.ProjectName=STM32Test
76 ProjectManager.StackSize=0x400
77 ProjectManager.TargetToolchain=STM32CubeIDE
78 ProjectManager.ToolChainLocation=
79 ProjectManager.UnderRoot=true
80 ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false
81 RCC.AHBFreq_Value=48000000
82 RCC.APB1Freq_Value=48000000
83 RCC.APB1TimFreq_Value=48000000
84 RCC.FCLKCortexFreq_Value=48000000
85 RCC.FamilyName=M
86 RCC.HCLKFreq_Value=48000000
87 RCC.IPParameters=AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,MCOFreq_Value,PLLCLKFreq_Value,PLLMCOFreq_Value,PLLMUL,SYSCLKFreq_VALUE,SYSCLKSource,TimSysFreq_Value,USART1Freq_Value
88 RCC.MCOFreq_Value=48000000
89 RCC.PLLCLKFreq_Value=48000000
90 RCC.PLLMCOFreq_Value=24000000
91 RCC.PLLMUL=RCC_PLL_MUL12
92 RCC.SYSCLKFreq_VALUE=48000000
93 RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
94 RCC.TimSysFreq_Value=48000000
95 RCC.USART1Freq_Value=48000000
96 VP_FREERTOS_VS_CMSIS_V2.Mode=CMSIS_V2
97 VP_FREERTOS_VS_CMSIS_V2.Signal=FREERTOS_VS_CMSIS_V2
98 VP_SYS_VS_Systick.Mode=SysTick
99 VP_SYS_VS_Systick.Signal=SYS_VS_Systick
100 board=custom
101 isbadioc=false